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compare: Chaos:bb415210e9748734a59456e4c5c26754ecd94a83
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3 changed files with 2 additions and 67 deletions
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1
.gitignore vendored
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@ -1,4 +1,5 @@
*.dat *.dat
*.ckt
*~ *~
*# *#
*.tab *.tab

2
Makefile
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@ -6,7 +6,7 @@ SPICE = ngspice
%.ckt: %.sch %.ckt: %.sch
$(GNETLIST) $(GNETLIST-SPICE) $< -o $@ $(GNETLIST) $(GNETLIST-SPICE) $< -o $@
.PRECIOUS: %.dat %.ckt .PRECIOUS: %.dat
%.dat: %.ckt %.dat: %.ckt
$(SPICE) < $< > $@ $(SPICE) < $< > $@

66
hvosc-spice-1.ckt
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@ -1,66 +0,0 @@
* gnetlist -g spice-sdb -o hvosc-spice-1.ckt hvosc-spice-1.sch
*********************************************************
* Spice file generated by gnetlist *
* spice-sdb version 4.28.2007 by SDB -- *
* provides advanced spice netlisting capability. *
* Documentation at http://www.brorson.com/gEDA/SPICE/ *
*********************************************************
*============== Begin SPICE netlist of main design ============
R13 HV 3 1000kΩ
D7 6 dyn4 1N4148
D6 dyn3 6 1N4148
D5 5 dyn3 1N4148
D4 dyn2 5 1N4148
D3 4 dyn2 1N4148
D2 dyn1 4 1N4148
VIHV VC2 HV DC 0V
C10 6 5 10nF
C8 5 4 10nF
C6 4 3 10nF
C12 dyn4 dyn3 10nF
C11 dyn3 dyn2 10nF
C9 dyn2 dyn1 10nF
C7 dyn1 0 10nF
D1 3 dyn1 1N4148
R12 VR9 1 10Ω
R11 VR8 2 10Ω
C3 VR6 VR7 1pF
C5 VL1 2 2.2nF
R10 0 VC1 100kΩ
.include BSS138P_2011.txt
R9 VR7 VR9 100Ω
R8 VR6 VR8 100Ω
C4 VL1 1 2.2nF
R7 VQ1D VR7 10Ω
R6 VQ2D VR6 10Ω
VIQ2 L2P VR8 DC 0V
VIQ1 L1N VR9 DC 0V
K13 L1 L3 0.999
K12 L1 L2 0.999
R4 V2 VQ2G 100Ω
V2 V2 0 pulse 0V 3.3V 10us 100ns 100ns 1.8us 8us
L2 L2P VL1 2.2mH
X2 VQ2D VQ2G 0 BSS138P
R3 VPRIM VQ3D 100Ω
X3 VQ3D VREF VC1 BSS138P
R5 V1 VQ1G 100Ω
R1 VC1 VL1 10Ω
C1 0 VC1 1uF
.model 1N4148 D N = 1.906 BV = 110 IBV = 0.0001 RS = 0.6458 CJO = 7.048E-13 VJ = 0.869 M = 0.03 FC = 0.5 TT = 3.48E-9
VPRIM VPRIM 0 DC 28V
.include 2N7002.prm
VREF VREF 0 PULSE 7V 10V 20us 500us 100us 200us
V1 V1 0 pulse 0V 3.3V 14us 100ns 100ns 1.8us 8us
X1 VQ1D VQ1G 0 BSS138P
L4 VL4 VC2 16mH
R2 VR2 VL4 1kΩ
K23 L2 L3 0.999
*# set width=512
*# set nobreak
.print tran V(VREF) V(VC1) V(V1) V(V2) V(VQ1D) V(VQ2D) V(VL1,VR9) V(VL1,VR8) V(VL1) V(VL3) V(VL4) V(VC2) V(dyn1) V(dyn4) I(VPRIM) I(VIQ) I(VIQ1) I(VIQ2) I(VIHV)
.tran 10ns 1ms
VIQ VL3 VR2 DC 0V
C2 0 VC2 100pF
L3 VL3 0 22mH
L1 VL1 L1N 2.2mH
.end