The `freq` argument of step_pulser was missing. The intended positional `sel`
arguments were passed as `freq`
The TESTREG write schedule collided with regular IX REG writes.
The VERSION was set in each config.*, which is not what the VERSION is
associated with. It is now set as a module attribute
solo.step.base_config.VERSION
The unused table argument scratch is now set to solo.step.base_config.SUBVERSION
There is still an optional argument version= to override.
New formal arguments: step_ppss.do_step_config(…, acq_time=1, **kwargs)
New default: step_config.ppss(…, acq_time=6, …)
The acq_time parameter tells the FPGA how many additional ADC cycles
(1µs) to wait before a digitization from the idef-x output is accepted.
The old default acq_time=1 gives a total of 2µs settling time for the
idef-x analog output. acq_time=6 extends the settling time to 7µs.
There are two digitizations per trigger. The new default adds 10µs to
the total readout time.
The readout time shall be extended to test, in orbit, if that expels the
ghosts from the haunted channels.
Extending the readout time by increasing acq_time has the least impact
on the calibration and morphology of the signal in the presence of
pileup.
Fire a test pulse to each channel at the beginning of each PHA_cadence.
The test_regs are reset every second with the usual ix config.
Each large or small pixel gets enabled in both test_regs
once during the first 16 seconds of the PHA cadence.
For the first 30 seconds of the PHA_cadence both test pulsers are fired
once per second @5000µs.
ppss_modulus learns to fire on consecutive ranges of seconds. length
must be a valid cadence, phase must be aligned to length.
New step_pixels.pixels() enumerates physical STEP pixels.
PHA_candence is set to 600s.
.do_pulser() default is enabled.
TODO? To fire 16 times instead of 30, three entries are required for
each ix:
ppss_modules(PHA_cadence, 0, 10)
ppss_modules(PHA_cadence, 10, 5)
ppss_modules(PHA_cadence, 15)
All this is untested.
The aim, of this patch is to keep the Idef-X temperatures constant
during the orbit so that the calibration is always reliable.
Fix the opheater reference temperature reading. It was set to T_DIG(13). Now
it is T₁(14), one of the sensors on the titanium cover. The original
intention was probably to use T₁, which is entry [13] in the telemetry
packet. The mismatch in the order of data items in the ITF packet with
the numbering in the temperature spy may have caused this mixup.
Add parameter HK_SOLO.T_to_ADC(dc_estimate=0) to reduce the target
temperature to accomodate the estimated opheater duty cycle.
The opheater target temperature is set to -35°C at 70% duty cycle.
During the first year the duty cycle was always around 70% and the T₁
temperature between -36°C and -34°C.
Set the nominal calib Temperatur to -36°C. This is the IDef-X temperature
reached when T₁ was -35°C.
When the sensor units are commanded to nominal mode they shall receive a
command to reset the PPSS clock at the end of the OBC hour, to synchronize
the data products to an hour boundary.
STEP was sychronized to a minute instead.
