Compare commits
2 commits
d30b6ab622
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63c677865f
| Author | SHA1 | Date | |
|---|---|---|---|
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63c677865f | ||
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183c0815d5 |
24 changed files with 9851 additions and 99 deletions
7
.gitignore
vendored
7
.gitignore
vendored
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@ -1,2 +1,9 @@
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|||
*~
|
||||
*#
|
||||
fp.py
|
||||
*.pcb.bak*
|
||||
*.new.pcb
|
||||
*.cmd
|
||||
__pycache__
|
||||
PCB.*.save
|
||||
dlrena/fp
|
||||
|
|
|
|||
195
dlrena/dlrena.net
Normal file
195
dlrena/dlrena.net
Normal file
|
|
@ -0,0 +1,195 @@
|
|||
AD0.1 U2-13
|
||||
AD0.2 U2-14
|
||||
AD0.3 U2-15
|
||||
AD1.2 C600-2 CONN2-51 R691-2 U2-35
|
||||
AD1.3 C601-2 CONN2-49 R693-2 U2-38
|
||||
AD1.4 C605-2 R611-2 U2-39
|
||||
AD1.5 C604-2 R608-2 U2-45
|
||||
AD1.6 C603-2 R605-2 R607-1 U2-1
|
||||
AD1.7 C602-2 R604-2 U2-2
|
||||
ADC_REFCAP C930-1 C932-1 C934-1 U95-7
|
||||
ADC_REFIO C929-1 C931-1 C933-1 U95-5
|
||||
AIN0 CONN20-9 U95-16
|
||||
AIN1 CONN20-13 U95-18
|
||||
AIN2 CONN20-15 U95-21
|
||||
AIN3 CONN20-11 U95-23
|
||||
AIN4 CONN20-7 U95-25
|
||||
AIN5 CONN20-3 U95-27
|
||||
AIN6 CONN20-1 U95-12
|
||||
AIN7 CONN20-5 U95-14
|
||||
ARMGND C200-2 C201-2 C400-1 C401-1 C402-1 C403-1 C404-1 C405-1 C406-1 C407-1 C408-1 C409-1 C410-2 C411-2 C412-1 C600-1 C601-1 C602-1 C603-1 C604-1 C605-1 C615-1 C690-1 C691-1 CONN2-2 CONN2-4 CONN2-6 CONN2-8 \
|
||||
CONN2-10 CONN2-12 CONN2-14 CONN2-16 CONN2-18 CONN2-20 CONN2-50 CONN2-52 CONN2-54 JTAG-4 JTAG-6 JTAG-8 JTAG-10 JTAG-12 JTAG-14 JTAG-16 R1-1 R2-2 R203-3 R203-4 R407-1 R607-2 R618-1 R624-1 U2-3 U2-6 \
|
||||
U2-18 U2-25 U2-42 U2-50 U2-59 U10-3 U11-2 U601-3 X20/C1-1 X20/C2-1 X20/C3-2 X20/C4-2 X41/C3-2 X41/C4-1 X41/R4-1 X41/R5-1 X41/R7-1 X42/C3-2 X42/C4-1 X42/R4-1 X42/R5-1 X42/R7-1
|
||||
AinoutFEE C612-2 R621-2 R622-1
|
||||
BATE_MCLK U101-10
|
||||
BATE_MISO U101-8
|
||||
BATE_MOSI U101-11
|
||||
BATE_SCK U101-12
|
||||
CLK_12 C1-1 U11-3
|
||||
DAC U2-9
|
||||
EINT1 CONN2-11 R201-2 U2-41
|
||||
GND BOARD-1 C606-1 C608-1 C609-1 C610-1 C612-1 C613-1 C614-1 C902-2 C903-2 C904-2 C910-2 C911-2 C912-1 C913-1 C914-1 C918-2 C920-2 C921-1 C922-2 C923-1 C924-2 C925-2 C926-2 C927-2 C928-2 C929-2 C930-2 \
|
||||
C931-2 C932-2 C933-2 C934-2 C935-2 C936-2 CONN2-34 CONN2-36 CONN2-38 CONN2-40 CONN2-42 CONN2-44 CONN2-46 CONN2-48 CONN2-65 CONN2-66 CONN20-2 CONN20-4 CONN20-6 CONN20-8 CONN20-10 CONN20-12 CONN20-14 \
|
||||
CONN20-16 CONN20-17 CONN20-18 CONN20-23 CONN20-24 CONN20-31 CONN20-32 CONN20-37 CONN20-38 CONN20-40 CONN20-42 CONN20-44 CONN20-46 CONN20-48 CONN20-50 CONN20-52 CONN20-53 CONN20-54 CONN20-63 CONN20-64 \
|
||||
CONN20-65 CONN20-66 R1-2 R619-1 R623-1 R908-2 R910-2 R912-2 R918-2 U90-15 U92-1 U93-0 U93-1 U93-20 U95-3 U95-4 U95-6 U95-8 U95-11 U95-13 U95-15 U95-17 U95-19 U95-20 U95-22 U95-24 U95-26 U95-28 U95-29 \
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||||
U95-31 U95-32 U95-33 U100-6 U100-7 U101-6 U101-7 X31/C1-2 X31/C3-2 X31/R2-1 X32/C1-2 X32/C3-2 X32/R2-1 X33/C1-1 X33/C3-1 X33/R2-1 X34/C1-2 X34/C3-2 X34/R2-1
|
||||
MCLK U2-46 U100-4 U101-4
|
||||
MISO U2-53 U95-36 U100-5 U101-5
|
||||
MISO0 CONN2-5 U2-29
|
||||
MOSI U2-54 U93-11 U95-1 U100-3 U101-3
|
||||
MOSI0 CONN2-3 U2-30
|
||||
P1.16 U2-16
|
||||
P1.17 U2-12
|
||||
P1.18 U2-8
|
||||
P1.19 U2-4
|
||||
P1.20 U2-48
|
||||
P1.21 U2-44
|
||||
P1.22 U2-40 U90-10
|
||||
P1.23 U2-36
|
||||
PT_DIN U92-4 U100-11
|
||||
PT_DOUT U92-3 U100-8
|
||||
PT_MCLK U92-5 U100-10
|
||||
PT_SCLK U92-2 U100-12
|
||||
PWRGND C202-2 CONN2-57 CONN2-58 CONN2-61 CONN2-62 R2-1 R206-2
|
||||
RESETARM CONN2-9 JTAG-15 U2-57 U10-1
|
||||
RTCK JTAG-11 R203-6 U2-24
|
||||
RXD0 CONN2-13 U2-21
|
||||
Rx1 U90-13
|
||||
Rx2 U90-8
|
||||
RxD U2-33 U90-12
|
||||
SCK U2-47 U93-10 U95-37 U100-2 U101-2
|
||||
SCK0 CONN2-7 U2-27
|
||||
SPI_CS1 U2-22 X20/R4-2
|
||||
SPI_CS2 U2-26 X20/R5-1
|
||||
SSEL0 CONN2-1 U2-31
|
||||
TCK JTAG-9 R203-5 U2-56
|
||||
TDI JTAG-5 R202-7 U2-60
|
||||
TDO JTAG-13 R203-7 U2-64
|
||||
TMS JTAG-7 R202-8 U2-52
|
||||
TRST JTAG-3 R202-6 U2-20
|
||||
TXD0 CONN2-15 U2-19
|
||||
Tx1 U90-14
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||||
Tx2 U90-7
|
||||
TxD U2-34 U90-11
|
||||
U600inv R618-2 R620-1 U600-4
|
||||
U600ninv R617-2 R619-2 U600-3
|
||||
U600out R620-2 R621-1 U600-1
|
||||
U601inv R610-2 R612-1 U601-4
|
||||
U601inv1 R609-2 R610-1
|
||||
U601out R608-1 R612-2 U601-1
|
||||
U603inv R623-2 R625-1 U603-4
|
||||
U603ninv R622-2 R624-2 U603-3
|
||||
U603out R625-2 R626-1 U603-1
|
||||
UP_LED CONN2-56 U2-17
|
||||
USB+5V C202-1 CONN2-55 R200-1 R206-1
|
||||
USBD+ C200-1 R204-2 U2-10
|
||||
USBD+F CONN2-59 R204-1
|
||||
USBD- C201-1 R205-2 U2-11
|
||||
USBD-F CONN2-60 R205-1
|
||||
V3.0 C910-1 C911-1 U92-6 U100-13 U101-13 X31/C2-2 X31/C3-1 X31/R1-1
|
||||
V3.3 C904-1 C918-1 C924-1 U90-16
|
||||
V5.0 C925-1 C926-1 C927-1 C936-1 U93-19 U95-9 U95-30 X34/C2-2 X34/C3-1 X34/R1-1
|
||||
V+6 C606-2 C610-2 C613-2 CONN2-33 CONN2-35 U600-5 U601-5 U603-5 X31/C1-1 X34/C1-1
|
||||
V+11 C920-1 C922-1 U94-4 X32/C2-2 X32/C3-1 X32/R1-1
|
||||
V+12 CONN2-41 CONN2-43 X32/C1-1 X41/C3-1 X41/R1-1 X41/U1-5 X42/C3-1 X42/U1-5
|
||||
V-6 C608-2 C609-2 C614-2 CONN2-37 CONN2-39 U600-2 U601-2 U603-2
|
||||
V-11 C921-2 C923-2 U94-11 X33/C2-2 X33/C3-2 X33/R1-1
|
||||
V-12 CONN2-45 CONN2-47 X33/C1-2 X41/C4-2 X41/U1-2 X42/C4-2 X42/R1-2 X42/U1-2
|
||||
VBUS R200-2 U2-58
|
||||
VDACA C915-2 CONN20-51 R919-2 R920-2
|
||||
VDACB C916-2 CONN20-49 R909-2 R914-2
|
||||
VDACC C917-2 CONN20-47 R911-2 R915-2
|
||||
VDACD C919-2 CONN20-45 R913-2 R916-2
|
||||
VDACE CONN20-43 R917-5
|
||||
VDACF CONN20-41 R917-6
|
||||
VDACG CONN20-39 R917-7
|
||||
VDACH R917-8
|
||||
Varm C400-2 C401-2 C402-2 C403-2 C404-2 C405-2 C408-2 C409-2 C410-1 C412-2 C928-1 C935-1 CONN2-17 CONN2-19 JTAG-1 JTAG-2 L400-2 R201-1 R202-1 R202-2 R202-3 R203-2 R406-2 R?-1 U2-23 U2-43 U2-49 U2-51 U10-2 \
|
||||
U11-1 U11-4 U93-8 U93-13 U93-14 U95-34 X20/L1-2 X20/L2-1
|
||||
VarmA C406-2 C411-1 L400-1 R690-1 R692-1 U2-7 U100-1 U101-1
|
||||
VarmR C407-2 L401-1 U2-63
|
||||
VarmRdiv L401-2 R406-1 R407-2
|
||||
Vneg R609-1 X42/R1-1
|
||||
Vpos R605-1 X41/R1-2
|
||||
X20/DAT1 X20/R2-2
|
||||
X20/DAT2 X20/R1-2
|
||||
X20/VCC_FLASH X20/C1-2 X20/C4-1 X20/L1-1 X20/R4-1
|
||||
X20/VCC_SD X20/C2-2 X20/C3-1 X20/L2-2 X20/R1-1 X20/R2-1 X20/R5-2
|
||||
X31/adj X31/R1-2 X31/R2-2
|
||||
X31/byp X31/C2-1
|
||||
X32/adj X32/R1-2 X32/R2-2
|
||||
X32/byp X32/C2-1
|
||||
X33/adj X33/R1-2 X33/R2-2
|
||||
X33/byp X33/C2-1
|
||||
X34/adj X34/R1-2 X34/R2-2
|
||||
X34/byp X34/C2-1
|
||||
X41/Vsense+K X41/R1-3 X41/R2-2
|
||||
X41/Vsense-K X41/R1-4 X41/R3-2
|
||||
X41/inv X41/C1-1 X41/R3-1 X41/R6-1 X41/R7-2 X41/U1-4
|
||||
X41/ninv X41/R2-1 X41/R4-2 X41/R5-2 X41/U1-3
|
||||
X41out R604-1 X41/C1-2 X41/R6-2 X41/U1-1
|
||||
X42/Vsense+K X42/R1-3 X42/R2-2
|
||||
X42/Vsense-K X42/R1-4 X42/R3-2
|
||||
X42/inv X42/C1-1 X42/R3-1 X42/R6-1 X42/R7-2 X42/U1-4
|
||||
X42/ninv X42/R2-1 X42/R4-2 X42/R5-2 X42/U1-3
|
||||
X42out R611-1 X42/C1-2 X42/R6-2 X42/U1-1
|
||||
XTAL1 C1-2 U2-62
|
||||
daca R900-1 U93-2
|
||||
dacb R902-1 U93-3
|
||||
dacc R904-1 U93-5
|
||||
dacd R906-1 U93-6
|
||||
dace R917-4 U93-15
|
||||
dacf R917-3 U93-16
|
||||
dacg R917-2 U93-17
|
||||
dach R901-1 R903-1 R905-1 R907-1 R917-1 U93-18
|
||||
nSSELA U2-55 U95-38
|
||||
nSSEL_D U2-37 U93-9
|
||||
nSSEL_P1 U2-28 U2-32 U100-14 U101-14
|
||||
refcomp C913-2 C914-2 U93-4
|
||||
refout C912-2 U93-7
|
||||
u94ainv C915-1 R901-2 R919-1 U94-2
|
||||
u94aninv R900-2 R918-1 U94-3
|
||||
u94aout R920-1 U94-1
|
||||
u94binv C916-1 R903-2 R909-1 U94-6
|
||||
u94bninv R902-2 R908-1 U94-5
|
||||
u94bout R914-1 U94-7
|
||||
u94cinv C917-1 R905-2 R911-1 U94-9
|
||||
u94cninv R904-2 R910-1 U94-10
|
||||
u94cout R915-1 U94-8
|
||||
u94dinv C919-1 R907-2 R913-1 U94-13
|
||||
u94dninv R906-2 R912-1 U94-12
|
||||
u94dout R916-1 U94-14
|
||||
unnamed_net1 R617-1
|
||||
unnamed_net2 C615-2 R626-2
|
||||
unnamed_net3 CONN20-20
|
||||
unnamed_net4 CONN20-19
|
||||
unnamed_net5 CONN20-22
|
||||
unnamed_net6 CONN20-21
|
||||
unnamed_net7 CONN20-26
|
||||
unnamed_net8 CONN20-25
|
||||
unnamed_net9 CONN20-28
|
||||
unnamed_net10 CONN20-27
|
||||
unnamed_net11 CONN20-30
|
||||
unnamed_net12 CONN20-29
|
||||
unnamed_net13 CONN20-34
|
||||
unnamed_net14 CONN20-33
|
||||
unnamed_net15 CONN20-36
|
||||
unnamed_net16 CONN20-35
|
||||
unnamed_net17 CONN20-56
|
||||
unnamed_net18 CONN20-55
|
||||
unnamed_net19 CONN20-58
|
||||
unnamed_net20 CONN20-57
|
||||
unnamed_net21 CONN20-60
|
||||
unnamed_net22 CONN20-59
|
||||
unnamed_net23 CONN20-62
|
||||
unnamed_net24 CONN20-61
|
||||
unnamed_net25 R?-2 U95-2
|
||||
unnamed_net26 C691-2 R692-2 R693-1
|
||||
unnamed_net27 C690-2 R690-2 R691-1
|
||||
unnamed_net28 C902-1 U90-2
|
||||
unnamed_net29 C900-1 U90-3
|
||||
unnamed_net30 C901-2 U90-4
|
||||
unnamed_net31 C901-1 U90-5
|
||||
unnamed_net32 C903-1 U90-6
|
||||
unnamed_net33 U90-9
|
||||
unnamed_net34 C900-2 U90-1
|
||||
8678
dlrena/dlrena.pcb
Normal file
8678
dlrena/dlrena.pcb
Normal file
File diff suppressed because it is too large
Load diff
6
dlrena/dlrena.proj
Normal file
6
dlrena/dlrena.proj
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
schematics dlrena.sch
|
||||
output-name dlrena
|
||||
elements-dir sym/fp
|
||||
elements-dir fp
|
||||
use-files
|
||||
skip-m4
|
||||
|
|
@ -1174,16 +1174,8 @@ T 69900 31800 5 10 0 1 90 0 1
|
|||
footprint=c0603
|
||||
}
|
||||
N 41300 56400 42500 56400 4
|
||||
{
|
||||
T 41800 56500 5 10 1 1 0 0 1
|
||||
netname=AD0.2
|
||||
}
|
||||
N 41500 56400 41500 56300 4
|
||||
N 30800 56800 31700 56800 4
|
||||
{
|
||||
T 30800 56900 5 10 1 1 0 0 1
|
||||
netname=AOUT
|
||||
}
|
||||
C 38200 54700 1 0 1 armgnd.sym
|
||||
C 36200 55600 1 270 1 capacitor-1.sym
|
||||
{
|
||||
|
|
@ -1206,8 +1198,6 @@ C 34500 41000 1 0 0 generic-power.sym
|
|||
T 35000 41350 5 10 1 1 180 1 1
|
||||
net=Varm:1
|
||||
}
|
||||
N 39700 31300 39700 30300 4
|
||||
N 38800 31300 38800 30300 4
|
||||
N 43900 60800 44900 60800 4
|
||||
N 47700 59200 47300 59200 4
|
||||
N 52900 61100 53200 61100 4
|
||||
|
|
@ -1294,28 +1284,6 @@ refdes=U11
|
|||
T 48100 52500 5 10 1 1 0 0 1
|
||||
value=12 MHz
|
||||
}
|
||||
C 38800 31100 1 0 0 diode-1.sym
|
||||
{
|
||||
T 39200 31700 5 10 0 0 0 0 1
|
||||
device=DIODE
|
||||
T 39200 31500 5 10 1 1 270 0 1
|
||||
refdes=D1
|
||||
T 39000 31400 5 10 0 1 270 0 1
|
||||
footprint=SOD80
|
||||
T 38800 31100 5 10 0 1 90 0 1
|
||||
value=none
|
||||
}
|
||||
C 39700 31100 1 180 0 diode-1.sym
|
||||
{
|
||||
T 39300 30500 5 10 0 0 180 0 1
|
||||
device=DIODE
|
||||
T 39300 30700 5 10 1 1 90 0 1
|
||||
refdes=D2
|
||||
T 39500 30800 5 10 0 1 90 0 1
|
||||
footprint=SOD80
|
||||
T 39700 31100 5 10 0 1 90 0 1
|
||||
value=none
|
||||
}
|
||||
C 44000 31200 1 0 0 inductor-1.sym
|
||||
{
|
||||
T 44200 31700 5 10 0 0 0 0 1
|
||||
|
|
@ -2373,11 +2341,6 @@ C 56700 36600 1 180 1 gnd-1.sym
|
|||
C 55900 36600 1 180 1 gnd-1.sym
|
||||
C 56100 36600 1 180 1 gnd-1.sym
|
||||
C 56300 36600 1 180 1 gnd-1.sym
|
||||
C 55600 36300 1 0 0 generic-power.sym
|
||||
{
|
||||
T 55750 36600 5 10 1 1 90 1 1
|
||||
net=Vdio:1
|
||||
}
|
||||
C 56900 32100 1 0 1 capacitor-1.sym
|
||||
{
|
||||
T 56700 32800 5 10 0 0 0 6 1
|
||||
|
|
@ -2566,11 +2529,6 @@ T 54100 33000 5 10 1 1 0 1 1
|
|||
value=100nF
|
||||
}
|
||||
C 54800 33000 1 90 0 gnd-1.sym
|
||||
C 53600 32900 1 90 0 generic-power.sym
|
||||
{
|
||||
T 53350 33100 5 10 1 1 180 1 1
|
||||
net=Vdio:1
|
||||
}
|
||||
N 55200 33500 55200 33700 4
|
||||
C 70100 33100 1 0 0 gnd-1.sym
|
||||
C 69100 33100 1 0 0 gnd-1.sym
|
||||
|
|
@ -2886,101 +2844,82 @@ device=none
|
|||
}
|
||||
N 67800 57400 67800 57700 4
|
||||
C 55300 33400 1 0 0 gnd-1.sym
|
||||
C 50600 38700 1 0 1 output-2.sym
|
||||
C 49800 37100 1 0 1 resistor-1.sym
|
||||
{
|
||||
T 49800 38800 5 10 1 1 0 7 1
|
||||
net=HK_Vfet:1
|
||||
T 50400 39400 5 10 0 0 180 2 1
|
||||
device=none
|
||||
T 49700 38800 5 10 0 1 180 1 1
|
||||
value=OUTPUT
|
||||
}
|
||||
C 50600 37000 1 0 1 output-2.sym
|
||||
{
|
||||
T 49800 37100 5 10 1 1 0 7 1
|
||||
net=HK_Ifet:1
|
||||
T 50400 37700 5 10 0 0 180 2 1
|
||||
device=none
|
||||
T 49700 37100 5 10 0 1 180 1 1
|
||||
value=OUTPUT
|
||||
}
|
||||
C 51500 37000 1 0 1 resistor-1.sym
|
||||
{
|
||||
T 51200 36800 5 10 1 1 0 6 1
|
||||
T 49500 36900 5 10 1 1 0 6 1
|
||||
refdes=R693
|
||||
T 51200 37200 5 10 1 1 0 6 1
|
||||
T 49500 37300 5 10 1 1 0 6 1
|
||||
value=470kΩ
|
||||
T 51300 36800 5 10 0 1 0 6 1
|
||||
T 49600 36900 5 10 0 1 0 6 1
|
||||
footprint=c0603
|
||||
}
|
||||
C 51600 36200 1 270 1 capacitor-1.sym
|
||||
C 49900 36300 1 270 1 capacitor-1.sym
|
||||
{
|
||||
T 51700 36100 5 10 1 1 270 7 1
|
||||
T 50000 36200 5 10 1 1 270 7 1
|
||||
refdes=C691
|
||||
T 51700 36700 5 10 1 1 270 7 1
|
||||
T 50000 36800 5 10 1 1 270 7 1
|
||||
value=100nF
|
||||
T 52300 36400 5 10 0 0 270 6 1
|
||||
T 50600 36500 5 10 0 0 270 6 1
|
||||
device=CAPACITOR
|
||||
T 52500 36400 5 10 0 0 270 6 1
|
||||
T 50800 36500 5 10 0 0 270 6 1
|
||||
symversion=0.1
|
||||
T 51600 36700 5 10 0 1 270 6 1
|
||||
T 49900 36800 5 10 0 1 270 6 1
|
||||
footprint=c0603
|
||||
}
|
||||
C 51900 35900 1 0 1 armgnd.sym
|
||||
N 51500 37100 53100 37100 4
|
||||
C 52500 36200 1 180 0 generic-power.sym
|
||||
C 50200 36000 1 0 1 armgnd.sym
|
||||
N 49800 37200 51400 37200 4
|
||||
C 50800 36300 1 180 0 generic-power.sym
|
||||
{
|
||||
T 52300 35850 5 10 1 1 0 4 1
|
||||
T 50600 35950 5 10 1 1 0 4 1
|
||||
net=VarmA:1
|
||||
}
|
||||
C 52400 36200 1 90 0 resistor-1.sym
|
||||
C 50700 36300 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 52600 36500 5 10 1 1 90 0 1
|
||||
T 50900 36600 5 10 1 1 90 0 1
|
||||
refdes=R692
|
||||
T 52200 36500 5 10 1 1 90 0 1
|
||||
T 50500 36600 5 10 1 1 90 0 1
|
||||
value=3.3kΩ
|
||||
T 52600 36400 5 10 0 1 90 0 1
|
||||
T 50900 36500 5 10 0 1 90 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
C 51500 38700 1 0 1 resistor-1.sym
|
||||
C 49800 38800 1 0 1 resistor-1.sym
|
||||
{
|
||||
T 51300 38500 5 10 0 1 0 6 1
|
||||
T 49600 38600 5 10 0 1 0 6 1
|
||||
footprint=c0603
|
||||
T 51200 38500 5 10 1 1 0 6 1
|
||||
T 49500 38600 5 10 1 1 0 6 1
|
||||
refdes=R691
|
||||
T 51200 38900 5 10 1 1 0 6 1
|
||||
T 49500 39000 5 10 1 1 0 6 1
|
||||
value=470kΩ
|
||||
}
|
||||
C 51500 37900 1 270 1 capacitor-1.sym
|
||||
C 49800 38000 1 270 1 capacitor-1.sym
|
||||
{
|
||||
T 52200 38100 5 10 0 0 270 6 1
|
||||
T 50500 38200 5 10 0 0 270 6 1
|
||||
device=CAPACITOR
|
||||
T 52400 38100 5 10 0 0 270 6 1
|
||||
T 50700 38200 5 10 0 0 270 6 1
|
||||
symversion=0.1
|
||||
T 51500 38400 5 10 0 1 270 6 1
|
||||
T 49800 38500 5 10 0 1 270 6 1
|
||||
footprint=c0603
|
||||
T 51600 37800 5 10 1 1 270 7 1
|
||||
T 49900 37900 5 10 1 1 270 7 1
|
||||
refdes=C690
|
||||
T 51600 38400 5 10 1 1 270 7 1
|
||||
T 49900 38500 5 10 1 1 270 7 1
|
||||
value=100nF
|
||||
}
|
||||
C 51800 37600 1 0 1 armgnd.sym
|
||||
N 51500 38800 52300 38800 4
|
||||
C 52500 37900 1 180 0 generic-power.sym
|
||||
C 50100 37700 1 0 1 armgnd.sym
|
||||
N 49800 38900 51400 38900 4
|
||||
C 50800 38000 1 180 0 generic-power.sym
|
||||
{
|
||||
T 52300 37550 5 10 1 1 0 4 1
|
||||
T 50600 37650 5 10 1 1 0 4 1
|
||||
net=VarmA:1
|
||||
}
|
||||
C 52400 37900 1 90 0 resistor-1.sym
|
||||
C 50700 38000 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 52600 38100 5 10 0 1 90 0 1
|
||||
T 50900 38200 5 10 0 1 90 0 1
|
||||
footprint=c0603
|
||||
T 52600 38200 5 10 1 1 90 0 1
|
||||
T 50900 38300 5 10 1 1 90 0 1
|
||||
refdes=R690
|
||||
T 52200 38200 5 10 1 1 90 0 1
|
||||
T 50500 38300 5 10 1 1 90 0 1
|
||||
value=3.3kΩ
|
||||
}
|
||||
N 52300 38800 52300 39200 4
|
||||
N 44500 42400 44500 41900 4
|
||||
N 44500 41900 47200 41900 4
|
||||
N 43700 47400 43700 49600 4
|
||||
|
|
@ -3695,7 +3634,7 @@ C 51200 48300 1 0 0 74LVC4T33144.sym
|
|||
T 52200 51800 5 10 1 1 0 4 1
|
||||
refdes=U100
|
||||
T 52600 51700 5 10 1 1 0 0 1
|
||||
footprint=TSSOP14
|
||||
footprint=TSSOP_4_14
|
||||
T 52600 51500 5 10 1 1 0 0 1
|
||||
device=74LVC4T3144
|
||||
T 52600 52400 5 10 0 0 0 0 1
|
||||
|
|
@ -3783,7 +3722,7 @@ value=74LVC4T3144PW
|
|||
T 57200 51800 5 10 1 1 0 4 1
|
||||
refdes=U101
|
||||
T 57600 51700 5 10 1 1 0 0 1
|
||||
footprint=TSSOP14
|
||||
footprint=TSSOP_4_14
|
||||
T 57600 51500 5 10 1 1 0 0 1
|
||||
device=74LVC4T3144
|
||||
}
|
||||
|
|
@ -3902,3 +3841,49 @@ value=OUTPUT
|
|||
T 58050 49100 5 5 1 1 0 1 1
|
||||
description=BATE_MISO
|
||||
}
|
||||
C 54400 37200 1 90 1 resistor-1.sym
|
||||
{
|
||||
T 54550 36850 5 10 1 1 90 0 1
|
||||
refdes=R?
|
||||
T 54550 36800 5 10 1 1 90 6 1
|
||||
value=10kΩ
|
||||
T 54600 37000 5 10 0 1 90 6 1
|
||||
footprint=c0603
|
||||
}
|
||||
C 55600 36300 1 0 0 generic-power.sym
|
||||
{
|
||||
T 55800 36550 5 8 1 1 90 1 1
|
||||
net=Varm:1
|
||||
}
|
||||
C 54100 37200 1 0 0 generic-power.sym
|
||||
{
|
||||
T 54300 37450 5 8 1 1 90 1 1
|
||||
net=Varm:1
|
||||
}
|
||||
C 53600 32900 1 90 0 generic-power.sym
|
||||
{
|
||||
T 53350 33100 5 8 1 1 180 1 1
|
||||
net=Varm:1
|
||||
}
|
||||
C 48900 38800 1 0 1 output-2.sym
|
||||
{
|
||||
T 48100 38900 5 10 0 1 0 7 1
|
||||
net=AD1.2:1
|
||||
T 48700 39500 5 10 0 0 180 2 1
|
||||
device=none
|
||||
T 48000 38900 5 10 0 1 180 1 1
|
||||
value=OUTPUT
|
||||
T 48650 38900 5 8 1 1 180 1 1
|
||||
description=AD1.2
|
||||
}
|
||||
C 48900 37100 1 0 1 output-2.sym
|
||||
{
|
||||
T 48100 37200 5 10 0 1 0 7 1
|
||||
net=AD1.3:1
|
||||
T 48700 37800 5 10 0 0 180 2 1
|
||||
device=none
|
||||
T 48000 37200 5 10 0 1 180 1 1
|
||||
value=OUTPUT
|
||||
T 48650 37200 5 8 1 1 180 1 1
|
||||
description=AD1.3
|
||||
}
|
||||
|
|
|
|||
10
dlrena/make-fp.py
Executable file
10
dlrena/make-fp.py
Executable file
|
|
@ -0,0 +1,10 @@
|
|||
#! /usr/bin/python3
|
||||
|
||||
from fp import *
|
||||
|
||||
make(TSSOP, (14,))
|
||||
make(TSSOP, (20,), name="TSSOP_PAD", th_pad=True)
|
||||
make(TFSOP, (38,))
|
||||
make(SOT, (3,5))
|
||||
make(SOD, ("C0603", "C0805", "C1206", "P1206"))
|
||||
make(SOIC, (8,16))
|
||||
133
dlrena/sym/LDO+1.sch
Normal file
133
dlrena/sym/LDO+1.sch
Normal file
|
|
@ -0,0 +1,133 @@
|
|||
v 20220529 2
|
||||
C 40800 43800 0 0 0 title-A3.sym
|
||||
{
|
||||
T 49700 45300 15 10 1 1 0 0 1
|
||||
title=Low noise positive LDO regulator
|
||||
T 50300 44500 15 10 1 1 0 0 1
|
||||
Date=$Date: 2024-02-12 21:27:06 +0100 (Mo, 12 Feb 2024) $
|
||||
T 54400 44200 15 10 1 1 0 0 1
|
||||
revision=$Revision: 8853 $
|
||||
T 54400 43900 15 10 1 1 0 0 1
|
||||
author=$Author: stephan $
|
||||
T 49900 44900 15 10 1 1 0 0 1
|
||||
id=$Id: LDO+1.sch 8853 2024-02-12 20:27:06Z stephan $
|
||||
T 50300 44200 15 10 1 1 0 0 1
|
||||
Filename=LDO+1.sch
|
||||
}
|
||||
C 54800 47900 1 0 0 out-1.sym
|
||||
{
|
||||
T 54800 48200 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 55500 48000 5 10 1 1 0 0 1
|
||||
refdes=out
|
||||
}
|
||||
C 51200 46500 1 0 0 LT1761ES5-BYP.sym
|
||||
{
|
||||
T 52700 48100 5 10 0 1 0 0 1
|
||||
device=LT1761ES5-BYP
|
||||
T 51700 47500 5 10 1 1 0 0 1
|
||||
refdes=U1
|
||||
T 51700 47200 5 5 1 1 0 2 1
|
||||
footprint=SOT23_5
|
||||
T 51400 48300 5 10 1 1 0 0 1
|
||||
value=LT1761ES5-BYP
|
||||
}
|
||||
C 54300 47100 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 54300 47700 5 10 1 1 90 0 1
|
||||
refdes=C2
|
||||
T 54000 47300 5 10 1 1 180 0 1
|
||||
value=100nF
|
||||
T 54300 47000 5 10 1 1 90 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
N 52900 48000 54800 48000 4
|
||||
{
|
||||
T 52800 48000 5 10 1 1 0 0 1
|
||||
netname=out
|
||||
}
|
||||
N 54100 47100 52900 47100 4
|
||||
{
|
||||
T 52800 47100 5 10 1 1 0 0 1
|
||||
netname=byp
|
||||
}
|
||||
C 53100 46000 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 53300 46500 5 10 1 1 90 0 1
|
||||
refdes=R2
|
||||
T 53200 46300 5 10 1 1 0 0 1
|
||||
value=120kΩ
|
||||
T 52800 46200 5 10 1 1 90 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
C 53900 47900 1 180 0 resistor-1.sym
|
||||
{
|
||||
T 53400 47700 5 10 1 1 180 0 1
|
||||
refdes=R1
|
||||
T 53600 48300 5 10 1 1 180 0 1
|
||||
value=$R1
|
||||
T 53700 47500 5 10 1 1 180 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
N 52900 47800 53000 47800 4
|
||||
{
|
||||
T 52800 47800 5 10 1 1 0 0 1
|
||||
netname=adj
|
||||
}
|
||||
N 53900 47800 53900 48000 4
|
||||
N 53000 47800 53000 46900 4
|
||||
N 54800 47100 54800 46000 4
|
||||
N 50900 46000 54800 46000 4
|
||||
{
|
||||
T 51000 46000 5 10 1 1 0 0 1
|
||||
netname=gnd
|
||||
}
|
||||
N 52100 46000 52100 46500 4
|
||||
C 50300 45900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 46200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 46000 5 10 1 1 0 7 1
|
||||
refdes=GND
|
||||
}
|
||||
C 50300 47900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 48200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 48000 5 10 1 1 0 7 1
|
||||
refdes=in
|
||||
}
|
||||
N 50900 48000 51300 48000 4
|
||||
{
|
||||
T 51100 48000 5 10 1 1 0 0 1
|
||||
netname=in
|
||||
}
|
||||
N 50900 47100 50900 46000 4
|
||||
C 50700 48000 1 270 0 capacitor-4.sym
|
||||
{
|
||||
T 51800 47800 5 10 0 0 270 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 50800 47700 5 10 1 1 90 0 1
|
||||
refdes=C1
|
||||
T 51400 47800 5 10 0 0 270 0 1
|
||||
symversion=0.1
|
||||
T 50800 46800 5 10 1 1 90 0 1
|
||||
footprint=p1206
|
||||
T 49900 47400 5 10 1 1 0 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
C 54600 48000 1 270 0 capacitor-4.sym
|
||||
{
|
||||
T 55700 47800 5 10 0 0 270 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 54700 47700 5 10 1 1 90 0 1
|
||||
refdes=C3
|
||||
T 55300 47800 5 10 0 0 270 0 1
|
||||
symversion=0.1
|
||||
T 54700 46800 5 10 1 1 90 0 1
|
||||
footprint=p1206
|
||||
T 55100 47500 5 10 1 1 0 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
T 50100 48900 9 10 1 0 0 0 1
|
||||
IRENA: R2=2k, R1=6k2 (way lower than necessary)
|
||||
131
dlrena/sym/LDO-1.sch
Normal file
131
dlrena/sym/LDO-1.sch
Normal file
|
|
@ -0,0 +1,131 @@
|
|||
v 20150930 2
|
||||
C 40800 43800 0 0 0 title-A3.sym
|
||||
{
|
||||
T 49700 45300 15 10 1 1 0 0 1
|
||||
title=Low noise negative LDO regulator
|
||||
T 50300 44500 15 10 1 1 0 0 1
|
||||
Date=$Date: 2018-06-27 14:57:49 +0200 (Mi, 27 Jun 2018) $
|
||||
T 54400 44200 15 10 1 1 0 0 1
|
||||
revision=$Revision: 6895 $
|
||||
T 54400 43900 15 10 1 1 0 0 1
|
||||
author=$Author: stephan $
|
||||
T 49900 44900 15 10 1 1 0 0 1
|
||||
id=$Id: LDO-1.sch 6895 2018-06-27 12:57:49Z stephan $
|
||||
T 50300 44200 15 10 1 1 0 0 1
|
||||
Filename=LDO-1.sch
|
||||
}
|
||||
C 54800 47900 1 0 0 out-1.sym
|
||||
{
|
||||
T 54800 48200 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 55500 48000 5 10 1 1 0 0 1
|
||||
refdes=out
|
||||
}
|
||||
C 54300 47100 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 54300 47700 5 10 1 1 90 0 1
|
||||
refdes=C2
|
||||
T 54000 47300 5 10 1 1 180 0 1
|
||||
value=10nF
|
||||
T 54300 47000 5 10 1 1 90 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
N 52900 48000 54800 48000 4
|
||||
{
|
||||
T 52800 48000 5 10 1 1 0 0 1
|
||||
netname=out
|
||||
}
|
||||
N 54100 47100 52900 47100 4
|
||||
{
|
||||
T 52800 47100 5 10 1 1 0 0 1
|
||||
netname=byp
|
||||
}
|
||||
C 53100 46000 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 53300 46500 5 10 1 1 90 0 1
|
||||
refdes=R2
|
||||
T 53200 46300 5 10 1 1 0 0 1
|
||||
value=120kΩ
|
||||
T 52800 46200 5 10 1 1 90 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
C 53900 47900 1 180 0 resistor-1.sym
|
||||
{
|
||||
T 53400 47700 5 10 1 1 180 0 1
|
||||
refdes=R1
|
||||
T 53200 48100 5 10 1 1 0 0 1
|
||||
value=$R1
|
||||
T 53700 47500 5 10 1 1 180 0 1
|
||||
footprint=c0603
|
||||
}
|
||||
N 52900 47800 53000 47800 4
|
||||
{
|
||||
T 52800 47800 5 10 1 1 0 0 1
|
||||
netname=adj
|
||||
}
|
||||
N 53900 47800 53900 48000 4
|
||||
N 53000 47800 53000 46900 4
|
||||
N 54800 47100 54800 46000 4
|
||||
N 50900 46000 54800 46000 4
|
||||
{
|
||||
T 51000 46000 5 10 1 1 0 0 1
|
||||
netname=gnd
|
||||
}
|
||||
N 52100 46000 52100 46500 4
|
||||
C 50300 45900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 46200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 46000 5 10 1 1 0 7 1
|
||||
refdes=GND
|
||||
}
|
||||
C 50300 47900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 48200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 48000 5 10 1 1 0 7 1
|
||||
refdes=in
|
||||
}
|
||||
N 50900 48000 51300 48000 4
|
||||
{
|
||||
T 51100 48000 5 10 1 1 0 0 1
|
||||
netname=in
|
||||
}
|
||||
N 50900 47100 50900 46000 4
|
||||
C 51100 47100 1 90 0 capacitor-4.sym
|
||||
{
|
||||
T 50000 47300 5 10 0 0 90 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 51100 47700 5 10 1 1 90 0 1
|
||||
refdes=C1
|
||||
T 50400 47300 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 51100 46800 5 10 1 1 90 0 1
|
||||
footprint=p1206
|
||||
T 50600 47500 5 10 1 1 180 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
C 55000 47100 1 90 0 capacitor-4.sym
|
||||
{
|
||||
T 53900 47300 5 10 0 0 90 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 55000 47700 5 10 1 1 90 0 1
|
||||
refdes=C3
|
||||
T 54300 47300 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 55000 46600 5 10 1 1 90 0 1
|
||||
footprint=p1206
|
||||
T 55700 47300 5 10 1 1 180 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
C 51200 46500 1 0 0 LT1964ES5-BYP.sym
|
||||
{
|
||||
T 52700 48100 5 10 0 1 0 0 1
|
||||
device=LT1964ES5-BYP
|
||||
T 51700 47500 5 10 1 1 0 0 1
|
||||
refdes=U1
|
||||
T 51700 47200 5 5 1 1 0 2 1
|
||||
footprint=SOT23_5
|
||||
T 51400 48300 5 10 1 1 0 0 1
|
||||
value=LT1964ES5-BYP
|
||||
}
|
||||
18
dlrena/sym/fp/BCN16.fp
Normal file
18
dlrena/sym/fp/BCN16.fp
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
|
||||
Element["" "" "" "" 78400 377200 0 0 0 100 ""]
|
||||
(
|
||||
Pad[-4800 -4400 -4800 -2000 1600 2000 3600 "" "8" "square"]
|
||||
Pad[-1600 -4400 -1600 -2000 1600 2000 3600 "" "7" "square"]
|
||||
Pad[1600 -4400 1600 -2000 1600 2000 3600 "" "6" "square"]
|
||||
Pad[4800 -4400 4800 -2000 1600 2000 3600 "" "5" "square"]
|
||||
Pad[-4800 2000 -4800 4400 1600 2000 3600 "" "1" "square,edge2"]
|
||||
Pad[-1600 2000 -1600 4400 1600 2000 3600 "" "2" "square,edge2"]
|
||||
Pad[1600 2000 1600 4400 1600 2000 3600 "" "3" "square,edge2"]
|
||||
Pad[4800 2000 4800 4400 1600 2000 3600 "" "4" "square,edge2"]
|
||||
ElementLine [-6300 -3200 6300 -3200 800]
|
||||
ElementLine [6300 -3200 6300 3200 800]
|
||||
ElementLine [6300 3200 -6300 3200 800]
|
||||
ElementLine [-6300 3200 -6300 -3200 800]
|
||||
ElementLine [-6300 2200 -5500 3200 800]
|
||||
|
||||
)
|
||||
25
dlrena/sym/fp/HE2x8_50mil.fp
Normal file
25
dlrena/sym/fp/HE2x8_50mil.fp
Normal file
|
|
@ -0,0 +1,25 @@
|
|||
|
||||
Element["" "" "" "" 87500 260000 0 0 0 100 ""]
|
||||
(
|
||||
Pin[0 -5000 4000 2000 4600 2000 "" "2" "square,edge2"]
|
||||
Pin[5000 -5000 4000 2000 4600 2000 "" "4" "square,edge2"]
|
||||
Pin[10000 -5000 4000 2000 4600 2000 "" "6" "square,edge2"]
|
||||
Pin[15000 -5000 4000 2000 4600 2000 "" "8" "square,edge2"]
|
||||
Pin[20000 -5000 4000 2000 4600 2000 "" "10" "square,edge2"]
|
||||
Pin[25000 -5000 4000 2000 4600 2000 "" "12" "square,edge2"]
|
||||
Pin[30000 -5000 4000 2000 4600 2000 "" "14" "square,edge2"]
|
||||
Pin[35000 -5000 4000 2000 4600 2000 "" "16" "square,edge2"]
|
||||
Pin[0 0 4000 2000 4600 2000 "" "1" "square,edge2"]
|
||||
Pin[5000 0 4000 2000 4600 2000 "" "3" "square,edge2"]
|
||||
Pin[10000 0 4000 2000 4600 2000 "" "5" "square,edge2"]
|
||||
Pin[15000 0 4000 2000 4600 2000 "" "7" "square,edge2"]
|
||||
Pin[20000 0 4000 2000 4600 2000 "" "9" "square,edge2"]
|
||||
Pin[25000 0 4000 2000 4600 2000 "" "11" "square,edge2"]
|
||||
Pin[30000 0 4000 2000 4600 2000 "" "13" "square,edge2"]
|
||||
Pin[35000 0 4000 2000 4600 2000 "" "15" "square,edge2"]
|
||||
ElementLine [-2500 2500 37500 2500 800]
|
||||
ElementLine [37500 2500 37500 -7500 800]
|
||||
ElementLine [37500 -7500 -2500 -7500 800]
|
||||
ElementLine [-2500 -7500 -2500 2500 800]
|
||||
|
||||
)
|
||||
17
dlrena/sym/fp/KC1206-4.fp
Normal file
17
dlrena/sym/fp/KC1206-4.fp
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
|
||||
Element["" "" "R?" "" 21000 508000 -1500 -1500 0 56 ""]
|
||||
(
|
||||
Pad[-7500 3000 -1500 3000 999 2000 1399 "" "3" "square"]
|
||||
Pad[4700 0 6300 0 3398 2000 3798 "" "2" "square,edge2"]
|
||||
Pad[1500 -3000 7500 -3000 999 2000 1399 "" "4" "square,edge2"]
|
||||
Pad[1500 3000 7500 3000 999 2000 1399 "" "4" "square,edge2"]
|
||||
Pad[-7500 -3000 -1500 -3000 999 2000 1399 "" "3" "square"]
|
||||
Pad[-6300 0 -4700 0 3398 2000 3798 "" "1" "square"]
|
||||
Pad[-1500 -3000 -1500 3000 999 2000 1399 "" "3" "square"]
|
||||
Pad[1500 -3000 1500 3000 999 2000 1399 "" "4" "square"]
|
||||
ElementLine [-5500 -2500 -5500 2500 1000]
|
||||
ElementLine [-5500 2500 5500 2500 1000]
|
||||
ElementLine [5500 2500 5500 -2500 1000]
|
||||
ElementLine [5500 -2500 -5500 -2500 1000]
|
||||
|
||||
)
|
||||
75
dlrena/sym/fp/LQFP64.fp
Normal file
75
dlrena/sym/fp/LQFP64.fp
Normal file
|
|
@ -0,0 +1,75 @@
|
|||
|
||||
Element["" "Square Quad-side flat pack" "" "LQFP64_10" 96600 101700 -2000 -6000 0 100 ""]
|
||||
(
|
||||
Pad[-24134 -14763 -20736 -14763 1102 3000 1402 "1" "1" "square"]
|
||||
Pad[-24134 -12795 -20736 -12795 1102 3000 1402 "2" "2" "square"]
|
||||
Pad[-24134 -10826 -20736 -10826 1102 3000 1402 "3" "3" "square"]
|
||||
Pad[-24134 -8858 -20736 -8858 1102 3000 1402 "4" "4" "square"]
|
||||
Pad[-24134 -6889 -20736 -6889 1102 3000 1402 "5" "5" "square"]
|
||||
Pad[-24134 -4921 -20736 -4921 1102 3000 1402 "6" "6" "square"]
|
||||
Pad[-24134 -2952 -20736 -2952 1102 3000 1402 "7" "7" "square"]
|
||||
Pad[-24134 -984 -20736 -984 1102 3000 1402 "8" "8" "square"]
|
||||
Pad[-24134 985 -20736 985 1102 3000 1402 "9" "9" "square"]
|
||||
Pad[-24134 2953 -20736 2953 1102 3000 1402 "10" "10" "square"]
|
||||
Pad[-24134 4922 -20736 4922 1102 3000 1402 "11" "11" "square"]
|
||||
Pad[-24134 6890 -20736 6890 1102 3000 1402 "12" "12" "square"]
|
||||
Pad[-24134 8859 -20736 8859 1102 3000 1402 "13" "13" "square"]
|
||||
Pad[-24134 10827 -20736 10827 1102 3000 1402 "14" "14" "square"]
|
||||
Pad[-24134 12796 -20736 12796 1102 3000 1402 "15" "15" "square"]
|
||||
Pad[-24134 14764 -20736 14764 1102 3000 1402 "16" "16" "square"]
|
||||
Pad[-14763 20736 -14763 24134 1102 3000 1402 "17" "17" "square,octagon,edge2"]
|
||||
Pad[-12795 20736 -12795 24134 1102 3000 1402 "18" "18" "square,octagon,edge2"]
|
||||
Pad[-10826 20736 -10826 24134 1102 3000 1402 "19" "19" "square,octagon,edge2"]
|
||||
Pad[-8858 20736 -8858 24134 1102 3000 1402 "20" "20" "square,octagon,edge2"]
|
||||
Pad[-6889 20736 -6889 24134 1102 3000 1402 "21" "21" "square,octagon,edge2"]
|
||||
Pad[-4921 20736 -4921 24134 1102 3000 1402 "22" "22" "square,octagon,edge2"]
|
||||
Pad[-2952 20736 -2952 24134 1102 3000 1402 "23" "23" "square,octagon,edge2"]
|
||||
Pad[-984 20736 -984 24134 1102 3000 1402 "24" "24" "square,octagon,edge2"]
|
||||
Pad[985 20736 985 24134 1102 3000 1402 "25" "25" "square,octagon,edge2"]
|
||||
Pad[2953 20736 2953 24134 1102 3000 1402 "26" "26" "square,octagon,edge2"]
|
||||
Pad[4922 20736 4922 24134 1102 3000 1402 "27" "27" "square,octagon,edge2"]
|
||||
Pad[6890 20736 6890 24134 1102 3000 1402 "28" "28" "square,octagon,edge2"]
|
||||
Pad[8859 20736 8859 24134 1102 3000 1402 "29" "29" "square,octagon,edge2"]
|
||||
Pad[10827 20736 10827 24134 1102 3000 1402 "30" "30" "square,octagon,edge2"]
|
||||
Pad[12796 20736 12796 24134 1102 3000 1402 "31" "31" "square,octagon,edge2"]
|
||||
Pad[14764 20736 14764 24134 1102 3000 1402 "32" "32" "square,octagon,edge2"]
|
||||
Pad[20736 14763 24134 14763 1102 3000 1402 "33" "33" "square,edge2"]
|
||||
Pad[20736 12795 24134 12795 1102 3000 1402 "34" "34" "square,edge2"]
|
||||
Pad[20736 10826 24134 10826 1102 3000 1402 "35" "35" "square,edge2"]
|
||||
Pad[20736 8858 24134 8858 1102 3000 1402 "36" "36" "square,edge2"]
|
||||
Pad[20736 6889 24134 6889 1102 3000 1402 "37" "37" "square,edge2"]
|
||||
Pad[20736 4921 24134 4921 1102 3000 1402 "38" "38" "square,edge2"]
|
||||
Pad[20736 2952 24134 2952 1102 3000 1402 "39" "39" "square,edge2"]
|
||||
Pad[20736 984 24134 984 1102 3000 1402 "40" "40" "square,edge2"]
|
||||
Pad[20736 -985 24134 -985 1102 3000 1402 "41" "41" "square,edge2"]
|
||||
Pad[20736 -2953 24134 -2953 1102 3000 1402 "42" "42" "square,edge2"]
|
||||
Pad[20736 -4922 24134 -4922 1102 3000 1402 "43" "43" "square,edge2"]
|
||||
Pad[20736 -6890 24134 -6890 1102 3000 1402 "44" "44" "square,edge2"]
|
||||
Pad[20736 -8859 24134 -8859 1102 3000 1402 "45" "45" "square,edge2"]
|
||||
Pad[20736 -10827 24134 -10827 1102 3000 1402 "46" "46" "square,edge2"]
|
||||
Pad[20736 -12796 24134 -12796 1102 3000 1402 "47" "47" "square,edge2"]
|
||||
Pad[20736 -14764 24134 -14764 1102 3000 1402 "48" "48" "square,edge2"]
|
||||
Pad[14763 -24134 14763 -20736 1102 3000 1402 "49" "49" "square,octagon"]
|
||||
Pad[12795 -24134 12795 -20736 1102 3000 1402 "50" "50" "square,octagon"]
|
||||
Pad[10826 -24134 10826 -20736 1102 3000 1402 "51" "51" "square,octagon"]
|
||||
Pad[8858 -24134 8858 -20736 1102 3000 1402 "52" "52" "square,octagon"]
|
||||
Pad[6889 -24134 6889 -20736 1102 3000 1402 "53" "53" "square,octagon"]
|
||||
Pad[4921 -24134 4921 -20736 1102 3000 1402 "54" "54" "square,octagon"]
|
||||
Pad[2952 -24134 2952 -20736 1102 3000 1402 "55" "55" "square,octagon"]
|
||||
Pad[984 -24134 984 -20736 1102 3000 1402 "56" "56" "square,octagon"]
|
||||
Pad[-985 -24134 -985 -20736 1102 3000 1402 "57" "57" "square,octagon"]
|
||||
Pad[-2953 -24134 -2953 -20736 1102 3000 1402 "58" "58" "square,octagon"]
|
||||
Pad[-4922 -24134 -4922 -20736 1102 3000 1402 "59" "59" "square,octagon"]
|
||||
Pad[-6890 -24134 -6890 -20736 1102 3000 1402 "60" "60" "square,octagon"]
|
||||
Pad[-8859 -24134 -8859 -20736 1102 3000 1402 "61" "61" "square,octagon"]
|
||||
Pad[-10827 -24134 -10827 -20736 1102 3000 1402 "62" "62" "square,octagon"]
|
||||
Pad[-12796 -24134 -12796 -20736 1102 3000 1402 "63" "63" "square,octagon"]
|
||||
Pad[-14764 -24134 -14764 -20736 1102 3000 1402 "64" "64" "square,octagon"]
|
||||
ElementLine [-16385 -19285 19285 -19285 800]
|
||||
ElementLine [19285 -19285 19285 19285 800]
|
||||
ElementLine [19285 19285 -19285 19285 800]
|
||||
ElementLine [-19285 19285 -19285 -16385 800]
|
||||
ElementLine [-19285 -16385 -16385 -19285 800]
|
||||
ElementArc [-16385 -16385 1000 1000 0 360 800]
|
||||
|
||||
)
|
||||
36
dlrena/sym/fp/MS5534C.fp
Normal file
36
dlrena/sym/fp/MS5534C.fp
Normal file
|
|
@ -0,0 +1,36 @@
|
|||
|
||||
Element["" "" "U?" "" 9.0000mm 82.0000mm -1.0000mm -1.0000mm 0 100 ""]
|
||||
(
|
||||
Pad[3.6000mm 1.9100mm 5.4000mm 1.9100mm 1.0000mm 20.00mil 1.5080mm "" "2" "square,edge2"]
|
||||
Pad[3.6000mm 3.1800mm 5.4000mm 3.1800mm 1.0000mm 20.00mil 1.5080mm "" "1" "square,edge2"]
|
||||
Pad[3.6000mm 0.6400mm 5.4000mm 0.6400mm 1.0000mm 20.00mil 1.5080mm "" "3" "square,edge2"]
|
||||
Pad[3.6000mm -1.9100mm 5.4000mm -1.9100mm 1.0000mm 20.00mil 1.5080mm "" "5" "square,edge2"]
|
||||
Pad[3.6000mm -3.1800mm 5.4000mm -3.1800mm 1.0000mm 20.00mil 1.5080mm "" "6" "square,edge2"]
|
||||
Pad[3.6000mm -0.6400mm 5.4000mm -0.6400mm 1.0000mm 20.00mil 1.5080mm "" "4" "square,edge2"]
|
||||
Pad[-1.9000mm -4.5000mm -1.9000mm -4.2000mm 1.0000mm 20.00mil 1.5080mm "" "7" "square"]
|
||||
Pad[-5.1000mm 1.9100mm -4.6000mm 1.9100mm 1.0000mm 20.00mil 1.5080mm "" "13" "square"]
|
||||
Pad[-5.1000mm 3.1800mm -4.8000mm 3.1800mm 1.0000mm 20.00mil 1.5080mm "" "14" "square"]
|
||||
Pad[-5.1000mm 0.6400mm -4.6000mm 0.6400mm 1.0000mm 20.00mil 1.5080mm "" "12" "square"]
|
||||
Pad[-5.1000mm -1.9100mm -4.6000mm -1.9100mm 1.0000mm 20.00mil 1.5080mm "" "10" "square"]
|
||||
Pad[-5.1000mm -3.1800mm -4.6000mm -3.1800mm 1.0000mm 20.00mil 1.5080mm "" "9" "square"]
|
||||
Pad[-5.1000mm -0.6400mm -4.6000mm -0.6400mm 1.0000mm 20.00mil 1.5080mm "" "11" "square"]
|
||||
Pad[-3.5000mm 4.2000mm -3.5000mm 4.5000mm 1.0000mm 20.00mil 1.5080mm "" "8" "square,edge2"]
|
||||
Pad[-3.6500mm 3.0500mm -3.6500mm 4.6500mm 27.56mil 20.00mil 1.2080mm "" "8" "square,edge2"]
|
||||
ElementLine [4.0000mm -4.5000mm -4.0000mm -4.5000mm 0.2000mm]
|
||||
ElementLine [-4.5000mm -4.0000mm -4.5000mm 4.0000mm 0.2000mm]
|
||||
ElementLine [-4.0000mm 4.5000mm 4.0000mm 4.5000mm 0.2000mm]
|
||||
ElementLine [4.5000mm 4.0000mm 4.5000mm -4.0000mm 0.2000mm]
|
||||
ElementLine [4.5000mm -4.0000mm 4.0000mm -4.5000mm 0.2000mm]
|
||||
ElementLine [-4.0000mm -4.5000mm -4.5000mm -4.0000mm 0.2000mm]
|
||||
ElementLine [-4.5000mm 4.0000mm -4.0000mm 4.5000mm 0.2000mm]
|
||||
ElementLine [4.5000mm 4.0000mm 4.0000mm 4.5000mm 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 3.5000mm 3.5000mm 180 90 0.2000mm]
|
||||
ElementArc [-0.0000mm -0.0000mm 3.5000mm 3.5000mm 90 90 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 3.5000mm 3.5000mm 0 90 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 3.5000mm 3.5000mm 270 90 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 2.5000mm 2.5000mm 180 90 0.2000mm]
|
||||
ElementArc [-0.0000mm -0.0000mm 2.5000mm 2.5000mm 90 90 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 2.5000mm 2.5000mm 0 90 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 2.5000mm 2.5000mm 270 90 0.2000mm]
|
||||
|
||||
)
|
||||
75
dlrena/sym/fp/MezzIEEE1386-64L.fp
Normal file
75
dlrena/sym/fp/MezzIEEE1386-64L.fp
Normal file
|
|
@ -0,0 +1,75 @@
|
|||
|
||||
Element["" "" "" "" 106299 157480 0 0 0 100 ""]
|
||||
(
|
||||
Pin[0 -67717 7874 2000 8474 5511 "" "65" ""]
|
||||
Pin[0 67716 7874 2000 8474 5511 "" "66" ""]
|
||||
Pad[-10630 -61024 -4724 -61024 2362 2000 2962 "" "1" "square"]
|
||||
Pad[4724 -61024 10630 -61024 2362 2000 2962 "" "2" "square,edge2"]
|
||||
Pad[-10630 -57087 -4724 -57087 2362 2000 2962 "" "3" "square"]
|
||||
Pad[4724 -57087 10630 -57087 2362 2000 2962 "" "4" "square,edge2"]
|
||||
Pad[-10630 -53150 -4724 -53150 2362 2000 2962 "" "5" "square"]
|
||||
Pad[4724 -53150 10630 -53150 2362 2000 2962 "" "6" "square,edge2"]
|
||||
Pad[-10630 -49213 -4724 -49213 2362 2000 2962 "" "7" "square"]
|
||||
Pad[4724 -49213 10630 -49213 2362 2000 2962 "" "8" "square,edge2"]
|
||||
Pad[-10630 -45276 -4724 -45276 2362 2000 2962 "" "9" "square"]
|
||||
Pad[4724 -45276 10630 -45276 2362 2000 2962 "" "10" "square,edge2"]
|
||||
Pad[-10630 -41339 -4724 -41339 2362 2000 2962 "" "11" "square"]
|
||||
Pad[4724 -41339 10630 -41339 2362 2000 2962 "" "12" "square,edge2"]
|
||||
Pad[-10630 -37402 -4724 -37402 2362 2000 2962 "" "13" "square"]
|
||||
Pad[4724 -37402 10630 -37402 2362 2000 2962 "" "14" "square,edge2"]
|
||||
Pad[-10630 -33465 -4724 -33465 2362 2000 2962 "" "15" "square"]
|
||||
Pad[4724 -33465 10630 -33465 2362 2000 2962 "" "16" "square,edge2"]
|
||||
Pad[-10630 -29528 -4724 -29528 2362 2000 2962 "" "17" "square"]
|
||||
Pad[4724 -29528 10630 -29528 2362 2000 2962 "" "18" "square,edge2"]
|
||||
Pad[-10630 -25591 -4724 -25591 2362 2000 2962 "" "19" "square"]
|
||||
Pad[4724 -25591 10630 -25591 2362 2000 2962 "" "20" "square,edge2"]
|
||||
Pad[-10630 -21654 -4724 -21654 2362 2000 2962 "" "21" "square"]
|
||||
Pad[4724 -21654 10630 -21654 2362 2000 2962 "" "22" "square,edge2"]
|
||||
Pad[-10630 -17717 -4724 -17717 2362 2000 2962 "" "23" "square"]
|
||||
Pad[4724 -17717 10630 -17717 2362 2000 2962 "" "24" "square,edge2"]
|
||||
Pad[-10630 -13780 -4724 -13780 2362 2000 2962 "" "25" "square"]
|
||||
Pad[4724 -13780 10630 -13780 2362 2000 2962 "" "26" "square,edge2"]
|
||||
Pad[-10630 -9843 -4724 -9843 2362 2000 2962 "" "27" "square"]
|
||||
Pad[4724 -9843 10630 -9843 2362 2000 2962 "" "28" "square,edge2"]
|
||||
Pad[-10630 -5906 -4724 -5906 2362 2000 2962 "" "29" "square"]
|
||||
Pad[4724 -5906 10630 -5906 2362 2000 2962 "" "30" "square,edge2"]
|
||||
Pad[-10630 -1969 -4724 -1969 2362 2000 2962 "" "31" "square"]
|
||||
Pad[4724 -1969 10630 -1969 2362 2000 2962 "" "32" "square,edge2"]
|
||||
Pad[-10630 1968 -4724 1968 2362 2000 2962 "" "33" "square"]
|
||||
Pad[4724 1968 10630 1968 2362 2000 2962 "" "34" "square,edge2"]
|
||||
Pad[-10630 5905 -4724 5905 2362 2000 2962 "" "35" "square"]
|
||||
Pad[4724 5905 10630 5905 2362 2000 2962 "" "36" "square,edge2"]
|
||||
Pad[-10630 9842 -4724 9842 2362 2000 2962 "" "37" "square"]
|
||||
Pad[4724 9842 10630 9842 2362 2000 2962 "" "38" "square,edge2"]
|
||||
Pad[-10630 13779 -4724 13779 2362 2000 2962 "" "39" "square"]
|
||||
Pad[4724 13779 10630 13779 2362 2000 2962 "" "40" "square,edge2"]
|
||||
Pad[-10630 17716 -4724 17716 2362 2000 2962 "" "41" "square"]
|
||||
Pad[4724 17716 10630 17716 2362 2000 2962 "" "42" "square,edge2"]
|
||||
Pad[-10630 21653 -4724 21653 2362 2000 2962 "" "43" "square"]
|
||||
Pad[4724 21653 10630 21653 2362 2000 2962 "" "44" "square,edge2"]
|
||||
Pad[-10630 25590 -4724 25590 2362 2000 2962 "" "45" "square"]
|
||||
Pad[4724 25590 10630 25590 2362 2000 2962 "" "46" "square,edge2"]
|
||||
Pad[-10630 29527 -4724 29527 2362 2000 2962 "" "47" "square"]
|
||||
Pad[4724 29527 10630 29527 2362 2000 2962 "" "48" "square,edge2"]
|
||||
Pad[-10630 33464 -4724 33464 2362 2000 2962 "" "49" "square"]
|
||||
Pad[4724 33464 10630 33464 2362 2000 2962 "" "50" "square,edge2"]
|
||||
Pad[-10630 37401 -4724 37401 2362 2000 2962 "" "51" "square"]
|
||||
Pad[4724 37401 10630 37401 2362 2000 2962 "" "52" "square,edge2"]
|
||||
Pad[-10630 41338 -4724 41338 2362 2000 2962 "" "53" "square"]
|
||||
Pad[4724 41338 10630 41338 2362 2000 2962 "" "54" "square,edge2"]
|
||||
Pad[-10630 45275 -4724 45275 2362 2000 2962 "" "55" "square"]
|
||||
Pad[4724 45275 10630 45275 2362 2000 2962 "" "56" "square,edge2"]
|
||||
Pad[-10630 49212 -4724 49212 2362 2000 2962 "" "57" "square"]
|
||||
Pad[4724 49212 10630 49212 2362 2000 2962 "" "58" "square,edge2"]
|
||||
Pad[-10630 53149 -4724 53149 2362 2000 2962 "" "59" "square"]
|
||||
Pad[4724 53149 10630 53149 2362 2000 2962 "" "60" "square,edge2"]
|
||||
Pad[-10630 57086 -4724 57086 2362 2000 2962 "" "61" "square"]
|
||||
Pad[4724 57086 10630 57086 2362 2000 2962 "" "62" "square,edge2"]
|
||||
Pad[-10630 61023 -4724 61023 2362 2000 2962 "" "63" "square"]
|
||||
Pad[4724 61023 10630 61023 2362 2000 2962 "" "64" "square,edge2"]
|
||||
ElementLine [-12205 -70866 12205 -70866 1000]
|
||||
ElementLine [12205 -70866 12205 70866 1000]
|
||||
ElementLine [12205 70866 -12205 70866 1000]
|
||||
ElementLine [-12205 70866 -12205 -70866 1000]
|
||||
|
||||
)
|
||||
73
dlrena/sym/fp/SO16.fp
Normal file
73
dlrena/sym/fp/SO16.fp
Normal file
|
|
@ -0,0 +1,73 @@
|
|||
# number of pads
|
||||
# pad width in 1/1000 mil
|
||||
# pad length in 1/1000 mil
|
||||
# pad pitch 1/1000 mil
|
||||
# seperation between pads on opposite sides 1/1000 mil
|
||||
# X coordinates for the right hand column of pads (1/100 mils)
|
||||
# pad clearance to plane layer in 1/100 mil
|
||||
# pad soldermask width in 1/100 mil
|
||||
# silk screen width (1/100 mils)
|
||||
# figure out if we have an even or odd number of pins per side
|
||||
# silk bounding box is -XMAX,-YMAX, XMAX,YMAX (1/100 mils)
|
||||
# element_flags, description, pcb-name, value, mark_x, mark_y,
|
||||
# text_x, text_y, text_direction, text_scale, text_flags
|
||||
Element[0x00000000 "Small outline package, narrow (150mil)" "" "SO16" 0 0 -2000 -6000 0 100 0x00000000]
|
||||
(
|
||||
#
|
||||
# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags]
|
||||
Pad[ -13500 -17500
|
||||
-7000 -17500
|
||||
2000 1000 3000 "1" "1" 0x00000100]
|
||||
Pad[ -13500 -12500
|
||||
-7000 -12500
|
||||
2000 1000 3000 "2" "2" 0x00000100]
|
||||
Pad[ -13500 -7500
|
||||
-7000 -7500
|
||||
2000 1000 3000 "3" "3" 0x00000100]
|
||||
Pad[ -13500 -2500
|
||||
-7000 -2500
|
||||
2000 1000 3000 "4" "4" 0x00000100]
|
||||
Pad[ -13500 2500
|
||||
-7000 2500
|
||||
2000 1000 3000 "5" "5" 0x00000100]
|
||||
Pad[ -13500 7500
|
||||
-7000 7500
|
||||
2000 1000 3000 "6" "6" 0x00000100]
|
||||
Pad[ -13500 12500
|
||||
-7000 12500
|
||||
2000 1000 3000 "7" "7" 0x00000100]
|
||||
Pad[ -13500 17500
|
||||
-7000 17500
|
||||
2000 1000 3000 "8" "8" 0x00000100]
|
||||
Pad[ 13500 17500
|
||||
7000 17500
|
||||
2000 1000 3000 "9" "9" 0x00000100]
|
||||
Pad[ 13500 12500
|
||||
7000 12500
|
||||
2000 1000 3000 "10" "10" 0x00000100]
|
||||
Pad[ 13500 7500
|
||||
7000 7500
|
||||
2000 1000 3000 "11" "11" 0x00000100]
|
||||
Pad[ 13500 2500
|
||||
7000 2500
|
||||
2000 1000 3000 "12" "12" 0x00000100]
|
||||
Pad[ 13500 -2500
|
||||
7000 -2500
|
||||
2000 1000 3000 "13" "13" 0x00000100]
|
||||
Pad[ 13500 -7500
|
||||
7000 -7500
|
||||
2000 1000 3000 "14" "14" 0x00000100]
|
||||
Pad[ 13500 -12500
|
||||
7000 -12500
|
||||
2000 1000 3000 "15" "15" 0x00000100]
|
||||
Pad[ 13500 -17500
|
||||
7000 -17500
|
||||
2000 1000 3000 "16" "16" 0x00000100]
|
||||
ElementLine[-15500 -19500 -15500 19500 1000]
|
||||
ElementLine[-15500 19500 15500 19500 1000]
|
||||
ElementLine[ 15500 19500 15500 -19500 1000]
|
||||
ElementLine[-15500 -19500 -2500 -19500 1000]
|
||||
ElementLine[ 15500 -19500 2500 -19500 1000]
|
||||
# punt on the arc on small parts as it can cover the pads
|
||||
ElementArc[0 -19500 2500 2500 0 180 1000]
|
||||
)
|
||||
18
dlrena/sym/fp/SOIC8.fp
Normal file
18
dlrena/sym/fp/SOIC8.fp
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
|
||||
Element["" "" "U?" "" 143000 158000 3000 -3000 3 100 ""]
|
||||
(
|
||||
Pad[-12500 -2500 -9500 -2500 2999 1998 4997 "" "2" "square"]
|
||||
Pad[9500 -7500 12500 -7500 2999 1998 4997 "" "8" "square,edge2"]
|
||||
Pad[9500 2500 12500 2500 2999 1998 4997 "" "6" "square,edge2"]
|
||||
Pad[9500 -2500 12500 -2500 2999 1998 4997 "" "7" "square,edge2"]
|
||||
Pad[-12500 2500 -9500 2500 2999 1998 4997 "" "3" "square"]
|
||||
Pad[-12500 -7500 -9500 -7500 2999 1998 4997 "" "1" ""]
|
||||
Pad[-12500 7500 -9500 7500 2999 1998 4997 "" "4" "square"]
|
||||
Pad[9500 7500 12500 7500 2999 1998 4997 "" "5" "square,edge2"]
|
||||
ElementLine [-7500 -10000 7500 -10000 984]
|
||||
ElementLine [7500 -10000 7500 10000 984]
|
||||
ElementLine [7500 10000 -7500 10000 984]
|
||||
ElementLine [-7500 10000 -7500 -10000 984]
|
||||
ElementLine [-6000 -10000 -6000 10000 1000]
|
||||
|
||||
)
|
||||
11
dlrena/sym/fp/SOT23.fp
Normal file
11
dlrena/sym/fp/SOT23.fp
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
|
||||
Element["" "" "" "" 116000 118500 0 0 0 100 ""]
|
||||
(
|
||||
Pad[3750 4700 3750 5900 2800 3000 5800 "D" "2" "square,edge2"]
|
||||
Pad[-3850 4700 -3850 5900 2800 3000 5800 "S" "1" "square,edge2"]
|
||||
Pad[-50 -5500 -50 -4300 2800 3000 5800 "G" "3" "square"]
|
||||
ElementLine [5950 -2100 5950 2300 1000]
|
||||
ElementLine [5950 2300 -6050 2300 1000]
|
||||
ElementLine [-5950 -2100 5850 -2100 1000]
|
||||
ElementLine [-6050 2300 -6050 -2000 1000]
|
||||
)
|
||||
13
dlrena/sym/fp/SOT23_5.fp
Normal file
13
dlrena/sym/fp/SOT23_5.fp
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
|
||||
Element(0x00000000 "" "U1" "" 1126 3073 -129 -18 0 100 0x00000000)
|
||||
(
|
||||
Pad(37 -6 37 6 28 30 58 "Out" "1" 0x00000100)
|
||||
Pad(-1 6 -1 -6 28 30 58 "V-" "2" 0x00000100)
|
||||
Pad(-39 -6 -39 6 28 30 58 "In+" "3" 0x00000100)
|
||||
Pad(-39 96 -39 108 28 30 58 "In-" "4" 0x00000100)
|
||||
Pad(37 96 37 108 28 30 58 "V+" "5" 0x00000100)
|
||||
ElementLine (59 28 59 72 10)
|
||||
ElementLine (59 72 -61 72 10)
|
||||
ElementLine (-60 28 58 28 10)
|
||||
ElementLine (-61 72 -61 29 10)
|
||||
)
|
||||
11
dlrena/sym/fp/c0603.fp
Normal file
11
dlrena/sym/fp/c0603.fp
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
|
||||
Element["" "" "" "" 120500 132500 0 0 0 100 ""]
|
||||
(
|
||||
Pad[3200 -200 3200 200 3500 1994 4100 "" "2" "square"]
|
||||
Pad[-3200 -200 -3200 200 3500 1994 4100 "" "1" "square"]
|
||||
ElementLine [-3000 -1500 3000 -1500 1000]
|
||||
ElementLine [3000 -1500 3000 1500 1000]
|
||||
ElementLine [3000 1500 -3000 1500 1000]
|
||||
ElementLine [-3000 1500 -3000 -1500 1000]
|
||||
|
||||
)
|
||||
11
dlrena/sym/fp/c0805.fp
Normal file
11
dlrena/sym/fp/c0805.fp
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
|
||||
Element["" "" "" "" 113750 59250 0 0 0 100 ""]
|
||||
(
|
||||
Pad[-3500 -1000 -3500 1000 3935 2000 5935 "" "1" "square"]
|
||||
Pad[3500 -1000 3500 1000 3935 2000 5935 "" "2" "square"]
|
||||
ElementLine [-3500 -2000 3500 -2000 983]
|
||||
ElementLine [3500 -2000 3500 2000 983]
|
||||
ElementLine [3500 2000 -3500 2000 983]
|
||||
ElementLine [-3500 2000 -3500 -2000 983]
|
||||
|
||||
)
|
||||
11
dlrena/sym/fp/c1206.fp
Normal file
11
dlrena/sym/fp/c1206.fp
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
|
||||
Element["" "" "" "" 113750 51250 0 0 0 100 ""]
|
||||
(
|
||||
Pad[5500 -1000 5500 1000 5000 1994 5600 "" "2" "square"]
|
||||
Pad[-5500 -1000 -5500 1000 5000 1994 5600 "" "1" "square"]
|
||||
ElementLine [-5500 -2500 -5500 2500 1000]
|
||||
ElementLine [-5500 2500 5500 2500 1000]
|
||||
ElementLine [5500 2500 5500 -2500 1000]
|
||||
ElementLine [5500 -2500 -5500 -2500 1000]
|
||||
|
||||
)
|
||||
177
dlrena/sym/fp/iras_106x70mm_tb.fp
Normal file
177
dlrena/sym/fp/iras_106x70mm_tb.fp
Normal file
|
|
@ -0,0 +1,177 @@
|
|||
|
||||
Element["hidename" "" "" "" 11500 295500 0 500 0 100 ""]
|
||||
(
|
||||
Pin[385500 -266500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[267500 -8500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[267500 -266500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[31500 -266500 13000 4400 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[149500 -266500 13000 4400 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[149500 -8500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[408500 -196500 13000 2402 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[408500 -78500 13000 2002 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[31500 -8500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[8500 -78500 13000 3202 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[8500 -196500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -221500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[374500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[366500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[278500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[286500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[294500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[302500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[310500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -45500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[318500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[326500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[334500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -53500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -213500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -205500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -69500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -61500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -53500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -45500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -229500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[342500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[350500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[358500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[138500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[130500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[42500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[50500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[58500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[66500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[74500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[82500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[90500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -229500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -237500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -245500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -121500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -253500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -261500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -29500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[98500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[106500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[114500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[122500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[374500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[366500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[278500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[286500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[294500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[302500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[310500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[318500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -21500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -13500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[21500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[13500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -61500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -69500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[326500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[334500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[342500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[350500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[358500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[256500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[248500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[160500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[168500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[176500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[184500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[192500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -185500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -205500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -37500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -213500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -221500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -105500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[200500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[208500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[216500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[224500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[232500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[240500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[138500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[130500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[42500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[50500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[58500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[66500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -113500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -97500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -121500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -129500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -137500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -145500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -113500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[74500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[82500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[90500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[98500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[106500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[114500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[122500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -37500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[256500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[248500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[160500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -29500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -105500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -261500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -253500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -245500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -237500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -153500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[168500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[176500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[184500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[192500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[200500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[208500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[216500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -21500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[224500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[232500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[240500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -13500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -161500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -169500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -129500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -137500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -145500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -153500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -177500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[21500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[13500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[395500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[403500 -269500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[395500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[403500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -89500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -5500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -97500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -185500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[411500 -177500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -89500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -169500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[5500 -161500 5000 2000 5000 2400 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pin[385500 -8500 13000 3200 13000 9000 "" "1" "edge2,thermal(0S,2S,3S,5S)"]
|
||||
Pad[9000 -266000 9000 -9000 14000 2000 14600 "" "1" "square"]
|
||||
Pad[9000 -9000 408000 -9000 14000 2000 14600 "" "1" "square"]
|
||||
Pad[408000 -266000 408000 -9000 14000 2000 14600 "" "1" "square"]
|
||||
Pad[9000 -266000 408000 -266000 14000 2000 14600 "" "1" "square"]
|
||||
Pad[9000 -266000 408000 -266000 14000 2000 14600 "" "1" "onsolder,square"]
|
||||
Pad[9000 -266000 9000 -9000 14000 2000 14600 "" "1" "onsolder,square"]
|
||||
Pad[9000 -9000 408000 -9000 14000 2000 14600 "" "1" "onsolder,square"]
|
||||
Pad[408000 -266000 408000 -9000 14000 2000 14600 "" "1" "onsolder,square"]
|
||||
ElementLine [0 0 417000 0 800]
|
||||
ElementLine [417000 0 417000 -275000 800]
|
||||
ElementLine [417000 -275000 0 -275000 800]
|
||||
ElementLine [0 -275000 0 0 800]
|
||||
|
||||
)
|
||||
23
dlrena/sym/fp/microsd_molex.fp
Normal file
23
dlrena/sym/fp/microsd_molex.fp
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
|
||||
Element["" "" "" "" 146063 108465 0 0 0 100 ""]
|
||||
(
|
||||
Pad[-9054 -38386 -9054 -35630 3150 2000 5150 "" "8" "square"]
|
||||
Pad[-13385 -38386 -13385 -35630 3150 2000 5150 "" "7" "square"]
|
||||
Pad[-17716 -39173 -17716 -35630 3150 2000 5150 "" "6" "square"]
|
||||
Pad[-39369 -38386 -39369 -35630 3150 2000 5150 "" "1" "square"]
|
||||
Pad[-26377 -39173 -26377 -35629 3150 2000 5150 "" "4" "square"]
|
||||
Pad[-30708 -38385 -30708 -35629 3150 2000 5150 "" "3" "square"]
|
||||
Pad[-35039 -34055 -35038 -38385 3150 2000 5150 "" "2" "square"]
|
||||
Pad[-22046 -38385 -22046 -35629 3150 2000 5150 "" "5" "square"]
|
||||
Pad[-53740 -48425 -53740 -46062 5512 2000 7512 "" "16" "square"]
|
||||
Pad[197 -48425 197 -46062 5512 2000 7512 "" "17" "square"]
|
||||
Pad[-53740 -14960 -53740 -13385 5512 2000 7512 "" "15" "square,edge2"]
|
||||
Pad[198 -14960 198 -13385 5512 2000 7512 "" "14" "square,edge2"]
|
||||
ElementLine [-45079 -59055 -8465 -59056 800]
|
||||
ElementLine [-53543 -52363 -53543 0 800]
|
||||
ElementLine [-53543 0 0 0 800]
|
||||
ElementLine [0 -52363 0 -1 800]
|
||||
ElementArc [-8463 -55710 3346 3346 180 90 800]
|
||||
ElementArc [-45079 -55709 3346 3346 270 90 800]
|
||||
|
||||
)
|
||||
13
dlrena/sym/fp/p1206.fp
Normal file
13
dlrena/sym/fp/p1206.fp
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
|
||||
Element["" "" "" "" 321200 337800 0 0 0 100 ""]
|
||||
(
|
||||
Pad[-5500 -1000 -5500 1000 5000 1994 5600 "" "1" "square"]
|
||||
Pad[5500 -1000 5500 1000 5000 1994 5600 "" "2" "square"]
|
||||
ElementLine [-5500 -2500 -5500 2500 1000]
|
||||
ElementLine [-5500 2500 5500 2500 1000]
|
||||
ElementLine [5500 2500 5500 -2500 1000]
|
||||
ElementLine [5500 -2500 -5500 -2500 1000]
|
||||
ElementLine [-4000 0 -2000 0 1000]
|
||||
ElementLine [-3000 -1000 -3000 1000 1000]
|
||||
|
||||
)
|
||||
Loading…
Add table
Add a link
Reference in a new issue