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No commits in common. "6cea8bb18e0b60c6f0dc774569ff100e1885ae8c" and "231d64480d41e3c2f6a53a102c7826c1bc92267c" have entirely different histories.

4 changed files with 6 additions and 61 deletions

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@ -1,8 +1,6 @@
@clock/short
@v S=sec%12
@s/if hk_mes>1: v hk_c=1
@s/if !S: nm/cou/re/cl/fl; s/exit
@s/if S&1 and I: al/cmd/inj I; s/exit
@s/if S&2: pres/inj; s/exit
@s/if S&4: v hk_c=1; s/exit
@s/if S&8 and H: al/cmd/inj H; s/exit
@s/if sec & 1 and I: al/cmd/inj I; s/exit
@s/if sec==0: nm/cou/re/cl/fl; s/exit
@s/if sec==2 and H: al/cmd/inj H
@s/if sec==4: v hk_c=1; s/exit
@s/if sec==6 and hk_mes>1: v hk_c=hk_mes-1; s/exit

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@ -93,23 +93,7 @@ def hk(sl, what="print", data=None):
sys.stderr.write(r)
return r
def TBITS(t):
return sum([1<<n for n in t])
def AHBGO():
global BGO, UNTEN, OBEN, SSD
BGO = 6,7,13,15,22,23
UNTEN = 2,3,4,11,12,19,20,21
OBEN = 0,1,8,9,10,16,17,18
# ch 18 has a problem?
OBEN = 0,1,8,9,10,16,17
SSD = OBEN + UNTEN
default_config()
atriggers(1, TBITS(BGO))
for c in SSD: thres(1, c, 8)
for c in BGO: thres(1, c, 8)
def aenable(sl=None, hk=True, ev=True, **aa):
def aenable(sl=1, hk=True, ev=True, **aa):
cmd("s/cron 'CRON.RC'")
fifo_enable(sl=sl, hk=hk, ev=ev, **aa)
enable()

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@ -1,37 +0,0 @@
def wavestr(b, n=16, lr=("__", "/ ", "\\_", " ")):
bb = [ (b >> (n-2-i)) & 3 for i in range(n-1) ]
return "".join([lr[bbb] for bbb in bb])
class plltest:
def __init__(self, ifc=None):
if ifc:
self._connect(ifc)
self.read()
def _connect(self, ifc):
if isinstance(ifc, list):
self.default = ifc
self.Areg = lambda i: self.default[i&3]
return
try:
self.Areg = ifc.Areg
except:
self.Areg = ifc
base_addr = 0x400
names = ["96MHz", "64MHz", "32MHz", "16MHz"]
def read(self):
n = len(self.names)
self.bits = list(map(self.Areg, range(self.base_addr, self.base_addr+n)))
def __repr__(self):
r = []
for i,b in enumerate(self.bits):
nn = self.names[i]
r.append(f"{'':8.8s} {wavestr(b, 16, (" ", " _", " ", "__"))}")
r.append(f"{nn:8.8s} {wavestr(b, 16, ("__", "/ ", "\\_", " "))}")
return "\n".join(r)