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3 commits

Author SHA1 Message Date
Stephan I. Böttcher
8d99d529f5 leia: control all RESET_PORT bits 2025-10-26 17:08:17 +01:00
Stephan I. Böttcher
6e1ccd4bce leia: peek ram, flash, eeprom 2025-10-26 16:39:03 +01:00
Stephan I. Böttcher
ad35f866aa leia: fix conf padding 2025-10-25 22:13:10 +02:00

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@ -26,6 +26,7 @@ const char revision[] = Id;
#include <avr/interrupt.h>
#include <avr/sleep.h>
#include <avr/pgmspace.h>
#define SPI_Rx_SLEEP
#include "spi_slave.h"
@ -72,10 +73,13 @@ struct conf {
uint8_t reset; // 12
uint8_t dir; // 13
uint16_t n_steps; // 14
uint16_t dac_ramp; // 18
uint16_t dac_step; // 20
uint8_t adc_incr; // 23
uint8_t adc_period; // 24
uint16_t dac_ramp; // 16
uint16_t dac_step; // 18
uint8_t adc_incr; // 20
uint8_t adc_period; // 21
uint8_t awake; // 22
uint8_t ledoff; // 23
uint8_t disable; // 24
uint8_t pad[7]; // 25
uint8_t adc_ch[16]; // 32
};
@ -119,7 +123,10 @@ const struct conf runcon = {
.lmask = LIMIT1 | LIMIT2 | FAULT1 | FAULT2,
.lval = FAULT1 | FAULT2,
.enable = SLEEP | RESET,
.reset = RESET,
.disable = ENABLE,
.ledoff = LEDON,
.awake = SLEEP,
.reset = RESET,
.adc_ch = {
ADC_BG|ADC_SR, ADC_BG|ADC_R, ADC_GND|ADC_R,
ADC_Iprim|ADC_SR, ADC_Iprim|ADC_R,
@ -130,6 +137,7 @@ const struct conf runcon = {
.adc_incr = 16, // one conversions per channel
.adc_period = TICK_NS(1000000),
.dac_step = 0x20,
.pad = "\xff\xff\xff\xff\xff\xff\xff"
};
void stepper_init()
@ -673,6 +681,21 @@ uint8_t eeprom_load(uint16_t a)
return 0;
}
static inline
uint8_t eeprom_read_byte(uint16_t a, uint8_t *r)
{
cli();
if (EECR & 1<<EEWE) {
sei();
return 1;
}
EEAR = a;
EECR |= 1<<EERE;
*r = EEDR;
sei();
return 0;
}
static inline
void reg16(uint16_t *v, unsigned char *r, const unsigned char *c)
{
@ -863,16 +886,22 @@ int main()
v.conf.n_steps = cmd[2] << ((cmd[1]>>4) & 7);
// fall through, return n_steps
case 's': reg16(&v.conf.n_steps, resp, cmd); break;
case 'r': reg8(&v.conf.reset, resp, cmd);
resp[2] = cmd[2];
if (cmd[2]) {
v.conf.step = 0;
if (cmd[2] & 0x80)
stepper_init();
if (cmd[2] & 1)
stepper_start(v.conf.reset);
case 'r': resp[2] = cmd[2];
switch (cmd[2] & 0x3) {
case 0: reg8(&v.conf.reset, resp, cmd);
case 1: reg8(&v.conf.disable, resp, cmd);
case 2: reg8(&v.conf.awake, resp, cmd);
case 3: reg8(&v.conf.ledoff, resp, cmd);
}
break;
if (up && cmd[2] & 0x3)
v.conf.enable = v.conf.awake | v.conf.ledoff | v.conf.disable;
if (cmd[2] & 0x40)
RESET_PORT = v.conf.enable;
if (cmd[2] & 0x80)
stepper_init();
if (cmd[2] & 0x10)
stepper_start(v.conf.reset);
break;
case 'd': reg16(&v.stat.dac, resp, cmd);
dac_ramp(v.stat.dac);
break;
@ -935,8 +964,13 @@ int main()
if (cmd[1] && upcase(cmd[1]))
conf_init();
break;
case 'x': // conf Byte
case 'x': // read/write conf Byte, read eeprom byte
resp[2] = cmd[1];
if (!up && cmd[2] & 0xf) {
if (eeprom_read_byte(frame2int(cmd+1) & 0x7ff, resp+1))
resp[0] = 'E';
break;
}
if (cmd[1] >= sizeof(struct vars)) {
resp[0] = 'E';
resp[1] = sizeof(struct vars);
@ -946,11 +980,17 @@ int main()
if (up)
((unsigned char *)(&v))[cmd[1]] = cmd[2];
break;
case 'y': // peek, poke
case 'y': // peek, poke IO space, read RAM, flash
resp[2] = cmd[1];
resp[1] = *(unsigned char *)(cmd[1]+0);
if (up)
if (!up)
if (cmd[2]&0x80)
resp[1] = pgm_read_u8((uint8_t*)(frame2int(cmd+1)& 0x7fff));
else
resp[1] = *(unsigned char *)(frame2int(cmd+1));
else {
resp[1] = *(unsigned char *)(cmd[1]+0);
*(unsigned char *)(cmd[1]+0) = cmd[2];
}
break;
}
spi_slave_Tx(resp, 3);