.gitignore

@@ -6,4 +6,3 @@
 *.o
 revision.h*
 *~
-docs

leia/leia.c

@@ -6,7 +6,7 @@
 // PCINT2: disable interrupts when SSEL toggles.  Allows the SPI to work undisturbed.
 // TIMER1: Motor step period, 23µs resolution, 1.5s range
 //         OCR1A: interrupt: assert STEP
-//         OCR1B: interrupt: deassert STEP, RESET
+//         OCR2B: interrupt: deassert STEP, RESET
 // ADC:    Three NTCs ADC8,9,10, Iprim ADC3, internals.
 //         Interrupt stores conversionresults and advances channels.
 // DAC:    Motor current reference.
@@ -99,12 +99,12 @@ const struct conf runcon = {
 	.period = STEP_NS(100000000),
 	.slen = STEP_NS(25000),
 	.lmask = LIMIT1 | LIMIT2 | FAULT1 | FAULT2,
-	.lval =  FAULT1 | FAULT2,
+	.lval =  LIMIT1 | LIMIT2 | FAULT1 | FAULT2,
 	.enable = SLEEP | RESET,
 	.reset  = RESET,
-	.adc_ch = {0, 3, 8, 9, 10,	11+0x80, 12+0x80, 17, 18,},
+	.adc_ch = {3, 8, 9, 10,	11+0x80, 12+0x80, 17, 18,},
 	.adc_incr = 8, // two conversions per channel
-	.adc_period = TICK_NS(1000000),
+	.adc_period = TICK_NS(1000),
 	.dac_step = 0x20,
 };
 
@@ -149,7 +149,7 @@ char stepper_status()
 	return TIMSK1;
 }
 
-#if 1
+#if 0
 ISR(TIMER1_COMPA_vect)
 {
 	if (!conf.n_steps || (LIMIT_PORT & conf.lmask) != conf.lval) {
@@ -209,7 +209,7 @@ ISR(TIMER1_COMPA_vect, ISR_NAKED)
 }
 #endif
 
-#if 1
+#if 0
 ISR(TIMER1_COMPB_vect)
 {
 	STEP_PORT = 0;
@@ -229,7 +229,7 @@ ISR(TIMER1_COMPB_vect, ISR_NAKED)
 		"out %[IFR], r24"	"\n\t"
 		"sts %[MSK], r24"	"\n\t"
 		"pop r24"		"\n\t"
-		"reti"			"\n\t"
+		"reti"	"\n\t"
 		:
 		:[MSK] "n" (_SFR_MEM_ADDR(TIMSK1)),
 		 [IFR] "n" (_SFR_IO_ADDR(TIFR1)),
@@ -241,7 +241,7 @@ ISR(TIMER1_COMPB_vect, ISR_NAKED)
 }
 #endif
 
-#if 1
+#if 0
 ISR(TIMER0_COMPB_vect)
 {
 	uint16_t d = conf.dac;
@@ -382,7 +382,7 @@ void adc_stop()
 
 uint16_t adc[16];
 
-#if 1
+#if 0
 ISR(ADC_vect)
 {
 	uint16_t a = ADCL | ADMUX & 0x1f | (ADMUX>>(REFS1-5)) & 0x20;
@@ -490,7 +490,7 @@ static void conf_init()
 uint8_t eewr_n;  // number of bytes to write 
 uint16_t eewr_a; // EEPROM conf base address
 
-#if 1
+#if 0
 ISR(EE_READY_vect)
 {
 	uint8_t n = eewr_n;

spi_slave.h

@@ -3,12 +3,6 @@
 #include <avr/interrupt.h>
 #define SPSR_IF (1<<SPIF)
 
-#ifndef PIN_SSEL
-// ATmega32M1
-# define PIN_SSEL (PIND & 8)
-# define PCIF_SSEL 4
-#endif
-
 static inline void spi_slave_init()
 {
 	SPCR = (1<<SPE)|(0<<CPOL)|(0<<CPHA);
@@ -33,14 +27,30 @@ static inline char spi_slave_Rx_n(unsigned char d[], unsigned char n)
 		b = SPDR;
 	} while (b&0x80);
 	*d++ = b;
-	unsigned char s = 0;
 	while (--n) {
+		while (!(SPSR & SPSR_IF));
+		SPDR = 0xff;
+		*d++ = SPDR;
+	}
+	return 0;
+}
+
+static inline char spi_slave_Rx_cli(unsigned char d[], unsigned char n)
+{
+	SPSR;
+	SPDR;
+	register unsigned char b;
+	do {
 		while (!(SPSR & SPSR_IF))
-			if (PIN_SSEL) {
-				if (s)
-					return n;
-				s = n;
-			}
+			if (!(PIND & 8))
+				cli();
+		SPDR = 0xff;
+		b = SPDR;
+	} while (b&0x80);
+	cli();
+	*d++ = b;
+	while (--n) {
+		while (!(SPSR & SPSR_IF));
 		SPDR = 0xff;
 		*d++ = SPDR;
 	}
@@ -60,14 +70,8 @@ static inline char spi_slave_Rx_wdt(unsigned char d[], unsigned char n)
 		b = SPDR;
 	} while (b&0x80);
 	*d++ = b;
-	unsigned char s=0;
 	while (--n) {
-		while (!(SPSR & SPSR_IF))
-			if (PIN_SSEL) {
-				if (s)
-					return n;
-				s = n;
-			}
+		while (!(SPSR & SPSR_IF));
 		SPDR = 0xff;
 		*d++ = SPDR;
 	}
@@ -75,30 +79,24 @@ static inline char spi_slave_Rx_wdt(unsigned char d[], unsigned char n)
 }
 
 #define spi_slave_Tx spi_slave_Tx_n
-static inline
-unsigned char spi_slave_Tx_n(const unsigned char d[], unsigned char n)
+static inline void spi_slave_Tx_n(const unsigned char d[], unsigned char n)
 {
 	SPSR;
 	SPDR;
 	while (n) {
 		register unsigned char b = *d++;
-		while (!(SPSR & SPSR_IF))
-			if (PIN_SSEL)
-				return n;
+		while (!(SPSR & SPSR_IF));
 		SPDR = b;
 		n--;
 	}
-	return n;
 }
 
-static inline
-void int2frame(unsigned int i, unsigned char *f)
+static inline void int2frame(unsigned int i, unsigned char *f)
 {
 	f[0] = i;
 	f[1] = i>>8;
 }
-static inline
-unsigned int frame2int(const unsigned char *f)
+static inline unsigned int frame2int(const unsigned char *f)
 {
 	return f[1]<<8 | f[0];
 }
@@ -110,8 +108,8 @@ static inline
 void spi_busy_init()
 {
 	PCMSK2 |= 8; // PIND3 PCINT19
-	while (!PIN_SSEL);
-	PCIFR |= PCIF_SSEL;
+	while (!(PIND & 8));
+	PCIFR = 4;
 }
 
 static inline
@@ -134,8 +132,12 @@ void clear_spi_busy(const char *busy_msg)
 
 #ifdef SPI_Rx_SEI
 
+#ifndef PIN_SSEL
 // ATmega32M1
 
+# define PIN_SSEL (PIND & 8)
+# define PCIF_SSEL 4
+
 // TODO: avoid output in a header file?
 
 ISR(PCINT2_vect, ISR_NAKED)
@@ -151,6 +153,7 @@ void spi_slave_init_sei()
 	PCMSK2 |= 8;
 	PCICR |= PCIF_SSEL;
 }
+#endif
 
 #undef spi_slave_Rx
 #define spi_slave_Rx spi_slave_Rx_sei
@@ -159,11 +162,13 @@ char spi_slave_Rx_sei(unsigned char d[], unsigned char n)
 {
 	if (!PIN_SSEL)
 		return 1;
-	PCIFR |= PCIF_SSEL;
+	if (PCIFR & PCIF_SSEL)
+		return 1;
+	PCIFR = PCIF_SSEL;
 	sei();
-	n = spi_slave_Rx_n(d, n);
+	spi_slave_Rx_n(d, n);
 	cli();
-	return n;
+	return 0;
 }
 
 #undef spi_slave_Tx
@@ -171,11 +176,20 @@ char spi_slave_Rx_sei(unsigned char d[], unsigned char n)
 static inline
 char spi_slave_Tx_sei(const unsigned char d[], unsigned char n)
 {
-	n = spi_slave_Tx_n(d, n);
+	SPSR;
+	SPDR;
+	while (n) {
+		register unsigned char b = *d++;
+		while (!(SPSR & SPSR_IF))
+			if (!PIN_SSEL)
+				return 1;
+		SPDR = b;
+		n--;
+	}
 	while (!PIN_SSEL);
-	PCIFR |= PCIF_SSEL;
+	PCIFR = PCIF_SSEL;
 	sei();
-	return n;
+	return 0;
 }
 
 #endif