leia: 'V'

leia/leia.c

@@ -27,7 +27,7 @@ const char revision[] = Id;
 #include <avr/interrupt.h>
 #include <avr/sleep.h>
 
-#define SPI_Rx_SEI
+#define SPI_Rx_SLEEP
 #include "spi_slave.h"
 
 #define upcase(c) (!((c)&0x20))
@@ -80,7 +80,6 @@ struct conf {
 	uint8_t       adc_period;     // 24
 	uint8_t       pad[7];         // 25
 	uint8_t       adc_ch[16];     // 32
-	uint8_t       tail[16];       // 48
 } conf;                               // 64
 
 enum {
@@ -570,6 +569,7 @@ ISR(EE_READY_vect)
 		EEDR = d;
 		EECR |= 1<<EEMWE;
 		EECR |= 1<<EEWE;
+		GPIOR2++;
 		return;
 	}
 	EECR &=~ (1<<EERIE); // clear EERIE
@@ -611,7 +611,10 @@ ISR(EE_READY_vect, ISR_NAKED)
 		"sbi %[C], %[IE]"	"\n\t"
 		"out %[D], r30"		"\n\t"
 		"sbi %[C], %[MWE]"	"\n\t"
-		"sbi %[C], %[WE]"	"\n"
+		"sbi %[C], %[WE]"	"\n\t"
+		"in r30, %[CC]"		"\n\t"
+		"subi r30, -1"		"\n\t"
+		"out %[CC], r30"	"\n\t"
 		"2:"			"\n\t"
 		"sts eewr_n, r24"	"\n\t"
 		"pop r31"		"\n\t"
@@ -625,12 +628,12 @@ ISR(EE_READY_vect, ISR_NAKED)
 		 [AL]  "n"  (_SFR_IO_ADDR(EEARL)),
 		 [AH]  "n"  (_SFR_IO_ADDR(EEARH)),
 		 [D]   "n"  (_SFR_IO_ADDR(EEDR)),
+		 [CC]  "n"  (_SFR_IO_ADDR(GPIOR2)),
 		 [IE]  "n"  (EERIE),
 		 [RE]  "n"  (EERE),
 		 [WE]  "n"  (EEWE),
 		 [MWE] "n"  (EEMWE)
 		);
-
 }
 #endif
 
@@ -643,6 +646,7 @@ uint8_t eeprom_save(uint16_t a)
 		return 1;
 	eewr_a = a;
 	eewr_n = sizeof(conf);
+	GPIOR2 = 0;
 	EECR = 1<<EERIE;
 	return 0;
 }
@@ -807,18 +811,15 @@ void reg88(uint8_t *v1, uint8_t *v2, unsigned char *r, const unsigned char *c)
 int main()
 {
 	MCUSR = 0;
-	
-	// turn of unused IO modules
 	PRR = (1<<PRPSC)|(1<<PRCAN)|(1<<PRLIN);
 	
-	spi_slave_init_sei();
+	spi_slave_init_sleep();
 	DDRB = MISO;
 	eeprom_load(0);
 	adc_init();
-	
+	if (conf.magic == MAGIC && conf.version == VERSION)
-	if (conf.magic == MAGIC && conf.version == VERSION) {
 		conf_init();
-	}
+
 	while (1) {
 		unsigned char cmd[3];
 		unsigned char resp[3];
@@ -893,11 +894,20 @@ int main()
 				else
 					adc_stop();
 			break;
+		case 'V':
+			resp[1] = 0;
+			resp[2] = cmd[1];
+			while (revision[resp[1]] && resp[2]) {
+				resp[1]++;
+				resp[2]--;
+			}
+			resp[1] = revision[resp[1]];
+			break;
 		case 'z': // Load/Save conf
 			resp[1] = cmd[1];
 			resp[2] = sizeof(conf);
 			if (!up) {
-				if (eeprom_save(cmd[2]*4)) {
+				if (cmd[1]!='W' || eeprom_save(cmd[2]*4)) {
 					resp[0] = 'E';
 					resp[1] = 'W';
 					resp[2] = 'Y';

spi_slave.h

@@ -9,23 +9,30 @@
 # define PCIF_SSEL 4
 #endif
 
-static inline void spi_slave_init()
+static inline
+void spi_slave_init()
 {
 	SPCR = (1<<SPE)|(0<<CPOL)|(0<<CPHA);
 	SPSR;
 	SPDR;
 }
 
-static inline unsigned char spi_slave_Rx_status()
+static inline
+unsigned char spi_slave_Rx_status()
 {
 	return SPSR & SPSR_IF && !(SPDR & 0x80);
 }
 
 #define spi_slave_Rx spi_slave_Rx_n
-static inline char spi_slave_Rx_n(unsigned char d[], unsigned char n)
+static inline
+unsigned char spi_slave_Rx_n(unsigned char d[], unsigned char n)
 {
-	SPSR;
+	d[0] = 0xff;
-	SPDR;
+	if (SPSR & SPSR_IF) {
+		SPSR;
+		SPDR;
+		return n;
+	}
 	register unsigned char b;
 	do {
 		while (!(SPSR & SPSR_IF));
@@ -48,7 +55,8 @@ static inline char spi_slave_Rx_n(unsigned char d[], unsigned char n)
 }
 
 extern volatile unsigned char wdt_tick;
-static inline char spi_slave_Rx_wdt(unsigned char d[], unsigned char n)
+static inline
+unsigned char spi_slave_Rx_wdt(unsigned char d[], unsigned char n)
 {
 	SPSR;
 	SPDR;
@@ -132,6 +140,10 @@ void clear_spi_busy(const char *busy_msg)
 	spi_was_busy = 0;
 }
 
+#ifdef SPI_Rx_SLEEP
+# define SPI_Rx_SEI
+#endif
+
 #ifdef SPI_Rx_SEI
 
 // ATmega32M1
@@ -147,15 +159,19 @@ ISR(PCINT2_vect, ISR_NAKED)
 static inline
 void spi_slave_init_sei()
 {
-	spi_slave_init();
 	PCMSK2 |= 8;
 	PCICR |= PCIF_SSEL;
+	spi_slave_init();
 }
 
-#undef spi_slave_Rx
+# undef spi_slave_Rx
-#define spi_slave_Rx spi_slave_Rx_sei
+# define spi_slave_Rx spi_slave_Rx_sei
+
+# undef spi_slave_Tx
+# define spi_slave_Tx spi_slave_Tx_sei
+
 static inline
-char spi_slave_Rx_sei(unsigned char d[], unsigned char n)
+unsigned char spi_slave_Rx_sei(unsigned char d[], unsigned char n)
 {
 	if (!PIN_SSEL)
 		return 1;
@@ -166,10 +182,8 @@ char spi_slave_Rx_sei(unsigned char d[], unsigned char n)
 	return n;
 }
 
-#undef spi_slave_Tx
-#define spi_slave_Tx spi_slave_Tx_sei
 static inline
-char spi_slave_Tx_sei(const unsigned char d[], unsigned char n)
+unsigned char spi_slave_Tx_sei(const unsigned char d[], unsigned char n)
 {
 	n = spi_slave_Tx_n(d, n);
 	while (!PIN_SSEL);
@@ -179,3 +193,46 @@ char spi_slave_Tx_sei(const unsigned char d[], unsigned char n)
 }
 
 #endif
+
+
+#ifdef SPI_Rx_SLEEP
+#include <avr/sleep.h>
+
+static inline
+void spi_slave_init_sleep()
+{
+	SMCR = 1<<SE | 0<<SM0;
+	spi_slave_init_sei();
+}
+
+# undef spi_slave_Rx
+# define spi_slave_Rx spi_slave_Rx_sleep
+
+static inline
+unsigned char spi_slave_Rx_sleep(unsigned char d[], unsigned char n)
+{
+	cli();
+	if (!PIN_SSEL) {
+		while (!PIN_SSEL) {
+			if (SPSR & SPSR_IF) {
+				SPSR;
+				SPDR;
+			}
+			sei();
+			sleep_cpu();
+			cli();
+		}
+		d[0] = 0xff;
+		return n;
+	}
+	SPSR;
+	SPDR;
+	while (PIN_SSEL) {
+		sei();
+		sleep_cpu();
+		cli();
+	}
+	return spi_slave_Rx_n(d, n);
+}
+
+#endif