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10 commits

Author SHA1 Message Date
Stephan I. Böttcher
a9d1fd32af use updi232 as template for sethat 2025-01-02 15:59:43 +01:00
Stephan I. Böttcher
fc79b41509 README board size 2024-02-18 14:33:27 +01:00
Stephan I. Böttcher
a380336fe5 checkout scripts 2024-02-18 13:45:56 +01:00
Stephan I. Böttcher
b5d21a58fd Merge branch 'master' of git://git.psjt.org/atfuses 2024-02-16 14:03:49 +01:00
Stephan I. Böttcher
ca2915735d UPDI232, plain links 2024-01-24 13:14:41 +00:00
Stephan I. Böttcher
464f2536d2 add bom to git, for history 2024-01-23 22:55:18 +01:00
Stephan I. Böttcher
2887114cf7 checkout updi232 2024-01-23 22:53:57 +01:00
Stephan I. Böttcher
4472581208 updi232: move UPDI header for 90° thru housing 2024-01-23 13:56:30 +01:00
Stephan I. Böttcher
a9f04a9b32 sch text fix 2024-01-23 00:44:44 +01:00
Stephan I. Böttcher
85cbf8e95a updi232: power via DTR, finishing touches 2024-01-23 00:15:01 +01:00
37 changed files with 808 additions and 5845 deletions

1
.gitignore vendored
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@ -12,3 +12,4 @@ gerber/*.pdf
gerber/*.png
*.save
fp.py
__pycache__/

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@ -1,36 +0,0 @@
******
* Spice Model
* Item: 1N4148
* Date: 12/07/11
* Revision History: REV A
*==========================================================
* This model was developed by:
* Central Semiconductor Corp.
* 145 Adams Avenue
* Hauppauge, NY 11788
*
* These models are subject to change without notice.
* Users may not directly or indirectly re-sell or
* re-distribute this model. This model may not
* be modified, or altered without the consent of Central Semiconductor Corp.
*
* For more information on this model contact
* Central Semiconductor Corp. at:
* (631) 435-1110 or Engineering@centralsemi.com
* http://www.centralsemi.com
*==========================================================
******
*SRC=1N4148;1N4148;Diodes;Si;100V 150mA 4.0ns Central Semi Central Semi
.MODEL 1N4148 D ( IS=6.2229E-9
+ N=1.9224
+ RS=.33636
+ IKF=42.843E-3
+ CJO=764.38E-15
+ M=.1001
+ VJ=9.9900
+ ISR=11.526E-9
+ NR=4.9950
+ BV=100.14
+ IBV=.25951
+ TT=2.8854E-9 )
******

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@ -1,13 +0,0 @@
.SUBCKT BSS84 1 2 3
* 1=drain 2=gate 3=source
Cgs 2 3 20.6E-12
Cgd1 2 4 56.1E-12
Cgd2 1 4 3.5E-12
M1 1 2 3 3 MOST1
M2 4 2 1 3 MOST2
D1 1 3 Dbody
.MODEL MOST1 PMOS(LEVEL=3 VTO=-1.7 W=12m L=2u KP=10.07u RD=3.952 RS=20m)
.MODEL MOST2 PMOS(VTO=3.25 W=12m L=2u KP=10.07u RS=20m)
.MODEL Dbody D(CJO=45.35p VJ=462.4m M=325.5m IS=442f N=1.051 RS=1.243
+ TT=105n BV=50 IBV=10u)
.ENDS

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@ -1,9 +1,17 @@
# ATfuses
# UPDI HV programmer on an RS232
AT µC High Voltage Serial Programmer
ATtiny µC High Voltage Serial Programmer
New develpoment, completely untested, not yet implemented.
![Layout](https://codeberg.org/SiB64/atfuses/raw/branch/master/atfuses.png)
[![Schematics](https://codeberg.org/SiB64/atfuses/raw/branch/master/atfuses_sch.png)](https://codeberg.org/SiB64/atfuses/raw/branch/master/atfuses_sch.pdf)
![Simulation](https://codeberg.org/SiB64/atfuses/raw/branch/master/atfuses_spice.png)
![Layout](sethat.png)
[![Schematics](sethat_sch.png)](sethat_sch.pdf)
# The old ideas
![Layout](atfuses.png)
[![Schematics](atfuses_sch.png)](atfuses_sch.pdf)
![Simulation](atfuses_spice.png)

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@ -1,141 +0,0 @@
* lepton-netlist -g spice-sdb atfuses_spice.sch -o atfuses.ckt
*********************************************************
* Spice file generated by lepton-netlist *
* spice-sdb by SDB *
* provides advanced spice netlisting capability. *
* Documentation at wiki.geda-project.org/geda:csygas *
*********************************************************
*vvvvvvvv Included SPICE model from 1N4148.LIB vvvvvvvv
******
* Spice Model
* Item: 1N4148
* Date: 12/07/11
* Revision History: REV A
*==========================================================
* This model was developed by:
* Central Semiconductor Corp.
* 145 Adams Avenue
* Hauppauge, NY 11788
*
* These models are subject to change without notice.
* Users may not directly or indirectly re-sell or
* re-distribute this model. This model may not
* be modified, or altered without the consent of Central Semiconductor Corp.
*
* For more information on this model contact
* Central Semiconductor Corp. at:
* (631) 435-1110 or Engineering@centralsemi.com
* http://www.centralsemi.com
*==========================================================
******
*SRC=1N4148;1N4148;Diodes;Si;100V 150mA 4.0ns Central Semi Central Semi
.MODEL 1N4148 D ( IS=6.2229E-9
+ N=1.9224
+ RS=.33636
+ IKF=42.843E-3
+ CJO=764.38E-15
+ M=.1001
+ VJ=9.9900
+ ISR=11.526E-9
+ NR=4.9950
+ BV=100.14
+ IBV=.25951
+ TT=2.8854E-9 )
*******^^^^^^^^ End of included SPICE model from 1N4148.LIB ^^^^^^^^
*
*vvvvvvvv Included SPICE model from bc846.ckt vvvvvvvv
.MODEL BC846 NPN(
+ IS = 1.822E-14
+ NF = 0.9932
+ ISE = 2.894E-16
+ NE = 1.4
+ BF = 324.4
+ IKF = 0.109
+ VAF = 82
+ NR = 0.9931
+ ISC = 9.982E-12
+ NC = 1.763
+ BR = 8.29
+ IKR = 0.09
+ VAR = 17.9
+ RB = 10
+ IRB = 5E-06
+ RBM = 5
+ RE = 0.649
+ RC = 0.7014
+ XTB = 0
+ EG = 1.11
+ XTI = 3
+ CJE = 1.244E-11
+ VJE = 0.7579
+ MJE = 0.3656
+ TF = 4.908E-10
+ XTF = 9.51
+ VTF = 2.927
+ ITF = 0.3131
+ PTF = 0
+ CJC = 3.347E-12
+ VJC = 0.5463
+ MJC = 0.391
+ XCJC = 0.6193
+ TR = 9E-08
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.979)
*^^^^^^^^ End of included SPICE model from bc846.ckt ^^^^^^^^
*
*vvvvvvvv Included SPICE model from BSS84.prm vvvvvvvv
.SUBCKT BSS84 1 2 3
* 1=drain 2=gate 3=source
Cgs 2 3 20.6E-12
Cgd1 2 4 56.1E-12
Cgd2 1 4 3.5E-12
M1 1 2 3 3 MOST1
M2 4 2 1 3 MOST2
D1 1 3 Dbody
.MODEL MOST1 PMOS(LEVEL=3 VTO=-1.7 W=12m L=2u KP=10.07u RD=3.952 RS=20m)
.MODEL MOST2 PMOS(VTO=3.25 W=12m L=2u KP=10.07u RS=20m)
.MODEL Dbody D(CJO=45.35p VJ=462.4m M=325.5m IS=442f N=1.051 RS=1.243
+ TT=105n BV=50 IBV=10u)
.ENDS
*^^^^^^^^ End of included SPICE model from BSS84.prm ^^^^^^^^
*
*============== Begin SPICE netlist of main design ============
.tran 100ns 1000ms
.width out=255
.print tran V(PWM) V(ON) V(OFF) V(HVM) V(HVR) V(HRM) V(pwmd2) V(pwmd3) V(hv)
*# set nobreak
C1 pwmc1 pwmr 100nF
C2 pwmc2 pwmr 100nF
C3 pwmc3 pwmr 100nF
C4 hv 0 1uF
C5 0 pwmd2 100nF
C6 0 pwmd3 100nF
C7 0 HVM 100nF
C8 0 HRM 100nF
D1 pwmv1 hv 1N4148
D2 pwmc1 pwmd2 1N4148
D3 pwmc2 pwmd3 1N4148
D4 pwmc3 hv 1N4148
Q2 HVR q2b 0 BC846
Q3 q1g q3b 0 BC846
R1 Vcc pwmv1 10kΩ
R2 pwmc1 Vcc 10kΩ
R3 PWM pwmr 100Ω
R4 pwmd2 pwmc2 10kΩ
R5 pwmd3 pwmc3 10kΩ
R6 1 HVR 10kΩ
R7 q1g hv 1MegΩ
R8 HVM hv 1MegΩ
R9 HRM HVR 1MegΩ
R10 ON q3b 100kΩ
R11 0 HVM 121kΩ
R12 0 HRM 121kΩ
R20 OFF q2b 100kΩ
VCC Vcc 0 DC 5V
VOFF OFF 0 pulse(5V 0V 0.1ms 100ns 100ns 900ms 1000ms 0)
VON ON 0 pulse(0V 5V 500ms 100ns 100ns 390ms 1000ms 0)
VPWM PWM 0 pulse(0V 5V 0 100ns 100ns 40us 100us 0)
X1 1 q1g hv BSS84
.end

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@ -1,58 +0,0 @@
SCL J10-1 U1-28
SDA J11-1 U1-27
OFF U1-26 R20-1
ON U1-25 R10-1
AIN U1-23 J2-1 C12-2 R14-2 R13-1
PD6 U1-10 R18-2
d7a R18-1 D7-2
PD5 U1-9 R16-2
d6a R16-1 D6-2
PD4 U1-2 R15-2
AVCC R13-2 U1-18 C20-1 C21-2 L1-2
aref U1-20 C18-1 C19-2
ICR U1-14 J7-1
RES U1-29 J9-1
SCI U1-12 J4-3
vcc4 J6-2 J4-2
vcc_mon C17-2 U1-24 R19-2 R17-1
HRM U1-22 C8-2 R12-2 R9-1
MC1+ C13-2 U2-1
CTS U1-32 U2-12
TxD U1-31 U2-11
RTS U1-1 U2-10
RxD U1-30 U2-9
MV- C16-1 U2-6
MC2- C15-1 U2-5
MC2+ C15-2 U2-4
MC1- C13-1 U2-3
MV+ C14-1 U2-2
TxDD U2-14 CONN1-2
CTSD U2-13 CONN1-7
RxDD U2-8 CONN1-3
RTSD U2-7 CONN1-8
Q4.PB6 C22-2 U1-7 Q4-1
Q4.PB7 U1-8 Q4-3 C23-2
pwmv1 R1-2 D1-1
q3b R10-2 Q3-1
q2b R20-2 Q2-1
HVR J8-1 R9-2 R6-2 Q2-3
unnamed_net1 R6-1 Q1-3
q1g R7-1 Q3-3 Q1-1
HVM U1-19 U1-11 C7-2 R11-2 R8-1
hv R7-2 D1-2 Q1-2 R8-2 C4-1 D4-2
pwmc3 C3-1 D4-1 R5-2
pwmd3 C6-2 R5-1 D3-2
pwmc2 C2-1 D3-1 R4-2
pwmd2 C5-2 R4-1 D2-2
pwmc1 R2-1 D2-1 C1-1
d5a R15-1 D5-2
reset J9-2 J8-2 J7-2 J3-5
MOSI U1-15 J3-4
SCK U1-17 J3-3
vcc3 J5-2 J3-2
MISO U1-16 J3-1
GND BOARD-1 J11-2 U1-21 U1-5 U1-3 J2-2 C12-1 R14-1 C10-1 C17-1 C20-2 D7-1 D6-1 C21-1 C7-1 C8-1 C18-2 C19-1 J4-6 J4-4 J4-1 J1-2 R19-1 R12-1 C16-2 C14-2 U2-15 CONN1-11 CONN1-10 CONN1-5 C22-1 Q4-4 Q4-2 \
C23-1 Q3-2 Q2-2 R11-1 C4-2 C6-1 C5-1 C11-1 D5-1 J3-6 C9-2
Vcc J10-2 U1-6 U1-4 C10-2 L1-1 J6-1 J1-1 R17-2 U2-16 R1-1 R2-2 J5-1 C11-2 C9-1
PWM U1-13 J4-5 R3-1
pwmr C2-2 C3-2 C1-2 R3-2

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schematics atfuses.sch
output-name atfuses
elements-dir ./fp
use-files
skip-m4

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#!/usr/local/bin/gnuplot -persist
#
#
# G N U P L O T
# Version 5.5 patchlevel 0 last modified 2021-06-17
#
# Copyright (C) 1986-1993, 1998, 2004, 2007-2021
# Thomas Williams, Colin Kelley and many others
#
# gnuplot home: http://www.gnuplot.info
# mailing list: gnuplot-beta@lists.sourceforge.net
# faq, bugs, etc: type "help FAQ"
# immediate help: type "help" (plot window: hit 'h')
# set terminal qt 0 font "Sans,9"
# set output
unset clip points
set clip one
unset clip two
unset clip radial
set errorbars front 1.000000
set border 31 front lt black linewidth 1.000 dashtype solid
set cornerpoles
set zdata
set ydata
set xdata
set y2data
set x2data
set boxwidth
set boxdepth 0
set style fill empty border
set style rectangle back fc bgnd fillstyle solid 1.00 border lt -1
set style circle radius graph 0.02
set style ellipse size graph 0.05, 0.03 angle 0 units xy
set dummy x, y
set format x "% h"
set format y "% h"
set format x2 "% h"
set format y2 "% h"
set format z "% h"
set format cb "% h"
set format r "% h"
set ttics format "% h"
set timefmt "%d/%m/%y,%H:%M"
set angles radians
set tics back
set grid nopolar
set grid xtics nomxtics ytics nomytics noztics nomztics nortics nomrtics \
nox2tics nomx2tics noy2tics nomy2tics nocbtics nomcbtics
set grid layerdefault lt 0 linecolor 0 linewidth 0.500, lt 0 linecolor 0 linewidth 0.500
unset raxis
set theta counterclockwise right
set style parallel front lt black linewidth 2.000 dashtype solid
set key notitle
set key fixed right top vertical Right noreverse enhanced autotitle nobox
set key noinvert samplen 4 spacing 1 width 0 height 0
set key maxcolumns 0 maxrows 0
set key noopaque
unset label
unset arrow
unset style line
unset style arrow
set style histogram clustered gap 2 title textcolor lt -1
unset object
unset walls
set style textbox transparent margins 1.0, 1.0 border lt -1 linewidth 1.0
set offsets 0, 0, 0, 0
set pointsize 1
set pointintervalbox 1
set encoding default
unset polar
unset parametric
unset spiderplot
unset decimalsign
unset micro
unset minussign
set view 60, 30, 1, 1
set view azimuth 0
set rgbmax 255
set samples 100, 100
set isosamples 10, 10
set surface
unset contour
set cntrlabel format '%8.3g' font '' start 5 interval 20
set mapping cartesian
set datafile separator whitespace
set datafile nocolumnheaders
unset hidden3d
set cntrparam order 4
set cntrparam linear
set cntrparam levels 5
set cntrparam levels auto
set cntrparam firstlinetype 0 unsorted
set cntrparam points 5
set size ratio 0 1,1
set origin 0,0
set style data points
set style function lines
unset xzeroaxis
unset yzeroaxis
unset zzeroaxis
unset x2zeroaxis
unset y2zeroaxis
set xyplane relative 0.5
set tics scale 1, 0.5, 1, 1, 1
set mxtics default
set mytics default
set mztics default
set mx2tics default
set my2tics default
set mcbtics default
set mrtics default
set nomttics
set xtics border in scale 1,0.5 mirror norotate autojustify
set xtics norangelimit autofreq
set ytics border in scale 1,0.5 mirror norotate autojustify
set ytics norangelimit autofreq
set ztics border in scale 1,0.5 nomirror norotate autojustify
set ztics norangelimit autofreq
unset x2tics
unset y2tics
set cbtics border in scale 1,0.5 mirror norotate autojustify
set cbtics norangelimit autofreq
set rtics axis in scale 1,0.5 nomirror norotate autojustify
set rtics norangelimit autofreq
unset ttics
set title "atfuses HV reset"
set title font "" textcolor lt -1 norotate
set timestamp bottom
set timestamp ""
set timestamp font "" textcolor lt -1 norotate
set trange [ * : * ] noreverse nowriteback
set urange [ * : * ] noreverse nowriteback
set vrange [ * : * ] noreverse nowriteback
set xlabel "t [ms]"
set xlabel font "" textcolor lt -1 norotate
set x2label ""
set x2label font "" textcolor lt -1 norotate
set xrange [ 0.00000 : 1000.00 ] noreverse writeback
set x2range [ -0.000173366 : 0.000815462 ] noreverse writeback
set ylabel "[V]"
set ylabel font "" textcolor lt -1 rotate
set y2label ""
set y2label font "" textcolor lt -1 rotate
set yrange [ -0.100000 : * ] noreverse writeback
set y2range [ * : * ] noreverse writeback
set zlabel ""
set zlabel font "" textcolor lt -1 norotate
set zrange [ * : * ] noreverse writeback
set cblabel ""
set cblabel font "" textcolor lt -1 rotate
set cbrange [ * : * ] noreverse writeback
set rlabel ""
set rlabel font "" textcolor lt -1 norotate
set rrange [ * : * ] noreverse writeback
unset logscale
unset jitter
set zero 1e-08
set lmargin -1
set bmargin -1
set rmargin -1
set tmargin -1
set locale "de_DE.UTF-8"
set pm3d explicit at s
set pm3d scansautomatic
set pm3d interpolate 1,1 flush begin noftriangles noborder corners2color mean
set pm3d clip z
set pm3d nolighting
set palette positive nops_allcF maxcolors 0 gamma 1.5 color model RGB
set palette rgbformulae 7, 5, 15
set colorbox default
set colorbox vertical origin screen 0.9, 0.2 size screen 0.05, 0.6 front noinvert border -1 cbtics 0
set style boxplot candles range 1.50 outliers pt 7 separation 1 labels auto unsorted
set loadpath
set fontpath
set psdir
set fit brief errorvariables nocovariancevariables errorscaling prescale nowrap v5
GNUTERM = "qt"
I = {0.0, 1.0}
VoxelDistance = 0.0
GridDistance = 0.0
plotext = "png"
## Last datafile plotted: "out/atfuses.dat"
plot for [c in "on off hvr pwmd2 pwmd3 hv"] "out/atfuses.dat" u (column("time")*1000):c tit c w l
# EOF

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v 20220529 2
C 39400 40800 0 0 0 title-B.sym
{
T 49400 41800 19 25 1 1 0 0 1
title=atfuses pwm hv simulation
T 53500 41200 19 10 1 1 0 0 1
version=v01
T 53500 40900 19 10 1 1 0 0 1
author=SiB
T 49400 41500 19 10 1 1 0 0 1
git=https://codeberg.org/SiB64/atfuses.git
T 49400 41200 19 10 1 1 0 0 1
file=atfuses_spice.sch
}
C 40700 50100 1 0 0 resistor-2.sym
{
T 41100 50450 5 10 0 0 0 0 1
device=RESISTOR
T 41150 50200 5 10 1 1 0 4 1
refdes=R3
T 41150 50000 5 10 0 1 0 4 1
footprint=c0603
T 41150 50450 5 10 1 1 0 4 1
value=100Ω
T 40900 50800 5 10 0 0 0 0 1
symversion=0.1
}
C 52400 50100 1 0 0 io-1.sym
{
T 53300 50300 5 10 0 0 0 0 1
net=HVR:1
T 52600 50700 5 10 0 0 0 0 1
device=none
T 52900 50200 5 10 1 1 0 4 1
value=HVR
}
C 42600 50400 1 180 0 capacitor-1.sym
{
T 42400 49700 5 10 0 0 180 0 1
device=CAPACITOR
T 42400 49500 5 10 0 0 180 0 1
symversion=0.2
T 42400 49700 5 10 0 1 180 0 1
footprint=c0603
T 42050 50250 5 10 1 1 0 6 1
refdes=C1
T 42050 50050 5 10 0 1 0 6 1
value=100nF
}
N 41600 50200 41700 50200 4
{
T 41650 50275 5 5 1 1 0 4 1
netname=pwmr
}
C 40700 50300 1 180 0 io-1.sym
{
T 39800 50100 5 10 0 0 180 0 1
net=PWM:1
T 40500 49700 5 10 0 0 180 0 1
device=none
T 40200 50200 5 10 1 1 180 4 1
value=PWM
}
C 43500 50100 1 0 0 resistor-2.sym
{
T 43900 50450 5 10 0 0 0 0 1
device=RESISTOR
T 43950 50200 5 10 1 1 0 4 1
refdes=R4
T 43950 50000 5 10 0 1 0 4 1
footprint=c0603
T 43950 50450 5 10 1 1 0 4 1
value=10kΩ
T 43700 50800 5 10 0 0 0 0 1
symversion=0.1
}
C 45300 50100 1 0 0 resistor-2.sym
{
T 45700 50450 5 10 0 0 0 0 1
device=RESISTOR
T 45750 50200 5 10 1 1 0 4 1
refdes=R5
T 45750 50000 5 10 0 1 0 4 1
footprint=c0603
T 45750 50450 5 10 1 1 0 4 1
value=10kΩ
T 45500 50800 5 10 0 0 0 0 1
symversion=0.1
}
C 43700 48200 1 90 0 capacitor-1.sym
{
T 43000 48400 5 10 0 0 90 0 1
device=CAPACITOR
T 42800 48400 5 10 0 0 90 0 1
symversion=0.2
T 43000 48400 5 10 0 1 90 0 1
footprint=c0603
T 43550 48550 5 10 1 1 180 6 1
refdes=C5
T 43450 48550 5 10 0 1 180 0 1
value=100nF
}
N 43500 49100 43500 50200 4
{
T 43550 49925 5 5 1 1 0 4 1
netname=pwmd2
}
C 43400 47900 1 0 0 gnd-1.sym
C 45200 47900 1 0 0 gnd-1.sym
N 45300 49100 45300 50200 4
{
T 45350 49925 5 5 1 1 0 4 1
netname=pwmd3
}
C 45500 48200 1 90 0 capacitor-1.sym
{
T 44800 48400 5 10 0 0 90 0 1
device=CAPACITOR
T 44600 48400 5 10 0 0 90 0 1
symversion=0.2
T 44800 48400 5 10 0 1 90 0 1
footprint=c0603
T 45350 48550 5 10 1 1 180 6 1
refdes=C6
T 45250 48550 5 10 0 1 180 0 1
value=100nF
}
C 47000 47900 1 0 0 gnd-1.sym
N 47100 49100 47100 50200 4
C 42600 49900 1 180 0 capacitor-1.sym
{
T 42400 49200 5 10 0 0 180 0 1
device=CAPACITOR
T 42400 49000 5 10 0 0 180 0 1
symversion=0.2
T 42400 49200 5 10 0 1 180 0 1
footprint=c0603
T 42050 49750 5 10 1 1 0 6 1
refdes=C2
T 42050 49550 5 10 0 1 0 6 1
value=100nF
}
C 42600 49400 1 180 0 capacitor-1.sym
{
T 42400 48700 5 10 0 0 180 0 1
device=CAPACITOR
T 42400 48500 5 10 0 0 180 0 1
symversion=0.2
T 42400 48700 5 10 0 1 180 0 1
footprint=c0603
T 42050 49250 5 10 1 1 0 6 1
refdes=C3
T 42050 49050 5 10 0 1 0 6 1
value=100nF
}
N 41700 49200 41600 49200 4
N 41600 49200 41600 50200 4
N 42600 49700 44400 49700 4
{
T 42650 49775 5 5 1 1 0 4 1
netname=pwmc2
}
N 44400 49700 44400 50200 4
N 42600 49200 46200 49200 4
{
T 42650 49275 5 5 1 1 0 4 1
netname=pwmc3
}
N 46200 49200 46200 50200 4
C 42700 50400 1 90 0 resistor-2.sym
{
T 42350 50800 5 10 0 0 90 0 1
device=RESISTOR
T 42600 50850 5 10 1 1 90 4 1
refdes=R2
T 42800 50850 5 10 0 1 90 4 1
footprint=c0603
T 42350 50850 5 10 1 1 90 4 1
value=10kΩ
T 42000 50600 5 10 0 0 90 0 1
symversion=0.1
}
N 42600 50200 42600 50400 4
{
T 42650 50125 5 5 1 1 0 4 1
netname=pwmc1
}
C 42400 51300 1 0 0 vcc-1.sym
C 46900 49100 1 270 0 capacitor-4.sym
{
T 48000 48900 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 47000 48900 5 10 1 1 90 4 1
refdes=C4
T 47600 48900 5 10 0 0 270 0 1
symversion=0.2
T 47600 48700 5 10 0 1 90 4 1
footprint=p1206
T 47400 48700 5 10 1 1 90 4 1
value=1uF
}
C 48000 49200 1 90 0 resistor-2.sym
{
T 47650 49600 5 10 0 0 90 0 1
device=RESISTOR
T 47900 49650 5 10 1 1 90 4 1
refdes=R8
T 48100 49650 5 10 0 1 90 4 1
footprint=c0603
T 47650 49650 5 10 1 1 90 4 1
value=1MegΩ
T 47300 49400 5 10 0 0 90 0 1
symversion=0.1
}
C 48000 48200 1 90 0 resistor-2.sym
{
T 47650 48600 5 10 0 0 90 0 1
device=RESISTOR
T 47900 48650 5 10 1 1 90 4 1
refdes=R11
T 48100 48650 5 10 0 1 90 4 1
footprint=c0603
T 47650 48650 5 10 1 1 90 4 1
value=121kΩ
T 47300 48400 5 10 0 0 90 0 1
symversion=0.1
}
N 47100 50200 50000 50200 4
{
T 47150 50275 5 5 1 1 0 4 1
netname=hv
}
C 47800 47900 1 0 0 gnd-1.sym
N 47900 49100 47900 49200 4
N 47900 50200 47900 50100 4
C 50000 49700 1 270 1 pmos-ub.sym
{
T 51400 50300 5 10 0 0 270 6 1
device=SUBCKT PMOS_TRANSISTOR
T 50300 49500 5 10 1 1 180 6 1
refdes=X1
T 50300 49700 5 10 1 1 180 6 1
footprint=SOT23
T 50300 49900 5 10 1 1 180 6 1
value=BSS84
T 50200 50300 5 10 0 0 0 0 1
model-name=BSS84
}
C 51100 48200 1 0 0 npn-sot23.sym
{
T 52000 48700 5 10 0 0 0 0 1
device=NPN_TRANSISTOR
T 50900 49300 5 10 1 1 0 0 1
refdes=Q2
T 50900 49100 5 10 1 1 0 0 1
footprint=SOT23
T 50900 48900 5 10 1 1 0 0 1
value=BC846
T 50900 48700 5 10 0 1 0 0 1
model-name=BC846
}
C 49600 48200 1 0 0 npn-sot23.sym
{
T 50500 48700 5 10 0 0 0 0 1
device=NPN_TRANSISTOR
T 50300 48800 5 10 1 1 0 0 1
refdes=Q3
T 50300 48600 5 10 1 1 0 0 1
footprint=SOT23
T 50300 48400 5 10 1 1 0 0 1
value=BC846
T 50300 48200 5 10 0 1 0 0 1
model-name=BC846
}
C 49800 49200 1 90 0 resistor-2.sym
{
T 49450 49600 5 10 0 0 90 0 1
device=RESISTOR
T 49700 49650 5 10 1 1 90 4 1
refdes=R7
T 49900 49650 5 10 0 1 90 4 1
footprint=c0603
T 49450 49650 5 10 1 1 90 4 1
value=1MegΩ
T 49100 49400 5 10 0 0 90 0 1
symversion=0.1
}
N 50200 49700 50200 49200 4
C 50100 47900 1 0 0 gnd-1.sym
C 50800 50100 1 0 0 resistor-2.sym
{
T 51200 50450 5 10 0 0 0 0 1
device=RESISTOR
T 51250 50200 5 10 1 1 0 4 1
refdes=R6
T 51250 50000 5 10 0 1 0 4 1
footprint=c0603
T 51250 50450 5 10 1 1 0 4 1
value=10kΩ
T 51000 50800 5 10 0 0 0 0 1
symversion=0.1
}
C 51600 47900 1 0 0 gnd-1.sym
N 51700 50200 51700 49200 4
C 49500 47700 1 270 0 io-1.sym
{
T 49700 46800 5 10 0 0 270 0 1
net=ON:1
T 50100 47500 5 10 0 0 270 0 1
device=none
T 49600 47200 5 10 1 1 270 4 1
value=ON
}
N 49600 48600 49600 48700 4
{
T 49525 48650 5 5 1 1 90 4 1
netname=q3b
}
C 51000 47700 1 270 0 io-1.sym
{
T 51200 46800 5 10 0 0 270 0 1
net=OFF:1
T 51600 47500 5 10 0 0 270 0 1
device=none
T 51100 47200 5 10 1 1 270 4 1
value=OFF
}
N 51700 50200 52400 50200 4
C 46200 51100 1 0 0 diode-1.sym
{
T 46600 51700 5 10 0 0 0 0 1
device=DIODE
T 46300 51200 5 10 0 1 0 0 1
footprint=SOD523
T 46300 51000 5 10 0 1 0 0 1
value=1N4148
T 46600 51500 5 10 1 1 0 0 1
refdes=D1
T 46600 50900 5 10 0 0 0 0 1
model-name=1N4148
}
C 45200 51200 1 0 0 resistor-2.sym
{
T 45600 51550 5 10 0 0 0 0 1
device=RESISTOR
T 45650 51300 5 10 1 1 0 4 1
refdes=R1
T 45650 51100 5 10 0 1 0 4 1
footprint=c0603
T 45650 51550 5 10 1 1 0 4 1
value=10kΩ
T 45400 51900 5 10 0 0 0 0 1
symversion=0.1
}
N 42600 51300 45200 51300 4
N 47100 51300 47500 51300 4
N 47500 51300 47500 50200 4
C 48300 49100 1 0 0 io-1.sym
{
T 49200 49300 5 10 0 0 0 0 1
net=HVM:1
T 48500 49700 5 10 0 0 0 0 1
device=none
T 48800 49200 5 10 1 1 0 4 1
value=HVM
}
C 52300 47900 1 0 0 gnd-1.sym
N 52400 49100 52400 49200 4
N 52400 50200 52400 50100 4
C 52800 49100 1 0 0 io-1.sym
{
T 53700 49300 5 10 0 0 0 0 1
net=HRM:1
T 53000 49700 5 10 0 0 0 0 1
device=none
T 53300 49200 5 10 1 1 0 4 1
value=HRM
}
C 52500 49200 1 90 0 resistor-2.sym
{
T 52150 49600 5 10 0 0 90 0 1
device=RESISTOR
T 52400 49650 5 10 1 1 90 4 1
refdes=R9
T 52600 49650 5 10 0 1 90 4 1
footprint=c0603
T 52150 49650 5 10 1 1 90 4 1
value=1MegΩ
T 51800 49400 5 10 0 0 90 0 1
symversion=0.1
}
C 52500 48200 1 90 0 resistor-2.sym
{
T 52150 48600 5 10 0 0 90 0 1
device=RESISTOR
T 52400 48650 5 10 1 1 90 4 1
refdes=R12
T 52600 48650 5 10 0 1 90 4 1
footprint=c0603
T 52150 48650 5 10 1 1 90 4 1
value=121kΩ
T 51800 48400 5 10 0 0 90 0 1
symversion=0.1
}
N 52800 49200 52400 49200 4
C 53000 48200 1 90 0 capacitor-1.sym
{
T 52300 48400 5 10 0 0 90 0 1
device=CAPACITOR
T 52100 48400 5 10 0 0 90 0 1
symversion=0.2
T 52300 48400 5 10 0 1 90 0 1
footprint=c0603
T 52850 48550 5 10 1 1 180 6 1
refdes=C8
T 52650 48550 5 10 0 1 270 0 1
value=100nF
}
C 52700 47900 1 0 0 gnd-1.sym
N 52800 49200 52800 49100 4
C 48500 48200 1 90 0 capacitor-1.sym
{
T 47800 48400 5 10 0 0 90 0 1
device=CAPACITOR
T 47600 48400 5 10 0 0 90 0 1
symversion=0.2
T 47800 48400 5 10 0 1 90 0 1
footprint=c0603
T 48350 48550 5 10 1 1 180 6 1
refdes=C7
T 48150 48550 5 10 0 1 270 0 1
value=100nF
}
C 48200 47900 1 0 0 gnd-1.sym
N 48300 49200 47900 49200 4
N 48300 49100 48300 49200 4
N 41700 49700 41600 49700 4
N 46100 51300 46200 51300 4
{
T 46150 51375 5 5 1 1 0 4 1
netname=pwmv1
}
N 49700 49200 50200 49200 4
{
T 49850 49275 5 5 1 1 0 4 1
netname=q1g
}
C 49700 47700 1 90 0 resistor-2.sym
{
T 49350 48100 5 10 0 0 90 0 1
device=RESISTOR
T 49600 48150 5 10 1 1 90 4 1
refdes=R10
T 49800 48150 5 10 0 1 90 4 1
footprint=c0603
T 49350 48150 5 10 1 1 90 4 1
value=100kΩ
T 49000 47900 5 10 0 0 90 0 1
symversion=0.1
}
C 51200 47700 1 90 0 resistor-2.sym
{
T 50850 48100 5 10 0 0 90 0 1
device=RESISTOR
T 51100 48150 5 10 1 1 90 4 1
refdes=R20
T 51300 48150 5 10 0 1 90 4 1
footprint=c0603
T 50850 48150 5 10 1 1 90 4 1
value=100kΩ
T 50500 47900 5 10 0 0 90 0 1
symversion=0.1
}
N 51100 48600 51100 48700 4
{
T 51025 48650 5 5 1 1 90 4 1
netname=q2b
}
N 49700 50100 49700 50200 4
C 40400 45100 1 0 0 vdc-1.sym
{
T 44300 46650 5 10 1 1 0 0 1
refdes=VCC
T 41100 45950 5 10 0 0 0 0 1
device=VOLTAGE_SOURCE
T 41100 46150 5 10 0 0 0 0 1
footprint=none
T 45000 46650 5 10 1 1 0 0 1
value=DC 5V
}
C 41400 45100 1 0 0 vpulse-1.sym
{
T 44300 46350 5 10 1 1 0 0 1
refdes=VPWM
T 42100 45950 5 10 0 0 0 0 1
device=vpulse
T 42100 46150 5 10 0 0 0 0 1
footprint=none
T 45000 46350 5 10 1 1 0 0 1
value=pulse(0V 5V 0 100ns 100ns 40us 100us 0)
}
C 40500 43500 1 0 0 spice-directive-1.sym
{
T 40600 43800 5 10 0 1 0 0 1
device=directive
T 40600 43900 5 10 1 1 0 0 1
refdes=A9
T 40500 42900 5 10 1 1 0 0 4
value=.tran 100ns 1000ms
.width out=255
.print tran V(PWM) V(ON) V(OFF) V(HVM) V(HVR) V(HRM) V(pwmd2) V(pwmd3) V(hv)
*# set nobreak
}
C 52100 45600 1 0 0 spice-model-1.sym
{
T 52200 46300 5 10 0 1 0 0 1
device=model
T 52200 46200 5 10 1 1 0 0 1
refdes=A2
T 53400 45900 5 10 1 1 0 0 1
model-name=BC846
T 52600 45700 5 10 1 1 0 0 1
file=bc846.ckt
}
C 52100 44800 1 0 0 spice-model-1.sym
{
T 52200 45500 5 10 0 1 0 0 1
device=model
T 52200 45400 5 10 1 1 0 0 1
refdes=A3
T 53400 45100 5 10 1 1 0 0 1
model-name=1N4148
T 52600 44900 5 10 1 1 0 0 1
file=1N4148.LIB
}
C 42600 50000 1 0 0 diode-1.sym
{
T 43000 50600 5 10 0 0 0 0 1
device=DIODE
T 42700 50100 5 10 0 1 0 0 1
footprint=SOD523
T 42700 49900 5 10 0 1 0 0 1
value=1N4148
T 43000 50400 5 10 1 1 0 0 1
refdes=D2
T 43000 49800 5 10 0 0 0 0 1
model-name=1N4148
}
C 44400 50000 1 0 0 diode-1.sym
{
T 44800 50600 5 10 0 0 0 0 1
device=DIODE
T 44500 50100 5 10 0 1 0 0 1
footprint=SOD523
T 44500 49900 5 10 0 1 0 0 1
value=1N4148
T 44800 50400 5 10 1 1 0 0 1
refdes=D3
T 44800 49800 5 10 0 0 0 0 1
model-name=1N4148
}
C 46200 50000 1 0 0 diode-1.sym
{
T 46600 50600 5 10 0 0 0 0 1
device=DIODE
T 46300 50100 5 10 0 1 0 0 1
footprint=SOD523
T 46300 49900 5 10 0 1 0 0 1
value=1N4148
T 46600 50400 5 10 1 1 0 0 1
refdes=D4
T 46600 49800 5 10 0 0 0 0 1
model-name=1N4148
}
C 40500 46300 1 0 0 vcc-1.sym
C 40600 44800 1 0 0 gnd-1.sym
C 41600 44800 1 0 0 gnd-1.sym
C 41800 46300 1 90 0 io-1.sym
{
T 41600 47200 5 10 0 0 90 0 1
net=PWM:1
T 41200 46500 5 10 0 0 90 0 1
device=none
T 41700 46800 5 10 1 1 90 4 1
value=PWM
}
C 43200 45100 1 0 0 vpulse-1.sym
{
T 44300 45750 5 10 1 1 0 0 1
refdes=VON
T 43900 45950 5 10 0 0 0 0 1
device=vpulse
T 43900 46150 5 10 0 0 0 0 1
footprint=none
T 45000 45750 5 10 1 1 0 0 1
value=pulse(0V 5V 500ms 100ns 100ns 390ms 1000ms 0)
}
C 43400 44800 1 0 0 gnd-1.sym
C 43600 46300 1 90 0 io-1.sym
{
T 43400 47200 5 10 0 0 90 0 1
net=ON:1
T 43000 46500 5 10 0 0 90 0 1
device=none
T 43500 46800 5 10 1 1 90 4 1
value=ON
}
C 42300 45100 1 0 0 vpulse-1.sym
{
T 43000 45950 5 10 0 0 0 0 1
device=vpulse
T 43000 46150 5 10 0 0 0 0 1
footprint=none
T 44300 46050 5 10 1 1 0 0 1
refdes=VOFF
T 45000 46050 5 10 1 1 0 0 1
value=pulse(5V 0V 0.1ms 100ns 100ns 900ms 1000ms 0)
}
C 42500 44800 1 0 0 gnd-1.sym
C 42700 46300 1 90 0 io-1.sym
{
T 42500 47200 5 10 0 0 90 0 1
net=OFF:1
T 42100 46500 5 10 0 0 90 0 1
device=none
T 42600 46800 5 10 1 1 90 4 1
value=OFF
}
C 52100 46400 1 0 0 spice-model-1.sym
{
T 52200 47100 5 10 0 1 0 0 1
device=model
T 52200 47000 5 10 1 1 0 0 1
refdes=A1
T 53400 46700 5 10 1 1 0 0 1
model-name=BSS84
T 52600 46500 5 10 1 1 0 0 1
file=BSS84.prm
}

Binary file not shown.

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Before

Width:  |  Height:  |  Size: 114 KiB

View file

@ -1,39 +0,0 @@
.MODEL BC846 NPN(
+ IS = 1.822E-14
+ NF = 0.9932
+ ISE = 2.894E-16
+ NE = 1.4
+ BF = 324.4
+ IKF = 0.109
+ VAF = 82
+ NR = 0.9931
+ ISC = 9.982E-12
+ NC = 1.763
+ BR = 8.29
+ IKR = 0.09
+ VAR = 17.9
+ RB = 10
+ IRB = 5E-06
+ RBM = 5
+ RE = 0.649
+ RC = 0.7014
+ XTB = 0
+ EG = 1.11
+ XTI = 3
+ CJE = 1.244E-11
+ VJE = 0.7579
+ MJE = 0.3656
+ TF = 4.908E-10
+ XTF = 9.51
+ VTF = 2.927
+ ITF = 0.3131
+ PTF = 0
+ CJC = 3.347E-12
+ VJC = 0.5463
+ MJC = 0.391
+ XCJC = 0.6193
+ TR = 9E-08
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.979)

11
fp/SOT23_5.fp Normal file
View file

@ -0,0 +1,11 @@
Element["" "SOT23_5" "U?" "unknown" 0 0 0 0 0 50 ""] (
Pad[-1mm -0.95mm -1.4mm -0.95mm 0.6mm 20mil 0.7524mm "" "1" "square"]
Pad[-1mm 0mm -1.4mm 0mm 0.6mm 20mil 0.7524mm "" "2" "square"]
Pad[-1mm 0.95mm -1.4mm 0.95mm 0.6mm 20mil 0.7524mm "" "3" "square"]
Pad[1mm 0.95mm 1.4mm 0.95mm 0.6mm 20mil 0.7524mm "" "4" "square"]
Pad[1mm -0.95mm 1.4mm -0.95mm 0.6mm 20mil 0.7524mm "" "5" "square"]
ElementLine[-1mm -1.425mm -1mm 1.425mm 5mil]
ElementLine[-1mm 1.425mm 1mm 1.425mm 5mil]
ElementLine[1mm 1.425mm 1mm -1.425mm 5mil]
ElementLine[1mm -1.425mm -1mm -1.425mm 5mil]
)

View file

@ -10,6 +10,7 @@ Element["" "SUBD9_F" "U?" "unknown" 0 0 0 0 0 50 ""] (
Pin[-1.42mm -4.155mm 2.008mm 20mil 2.1604mm 1mm "" "9" ""]
Pin[0 -486mil 250mil 20mil 256mil 125mil "" "10" ""]
Pin[0 486mil 250mil 20mil 256mil 125mil "" "11" ""]
ElementLine[-9.52mm 5.54mm -9.52mm -5.54mm 5mil]
ElementLine[2.84mm 6.925mm 2.84mm -6.925mm 5mil]
ElementLine[2.84mm -6.925mm -2.84mm -6.925mm 5mil]
ElementLine[-2.84mm -6.925mm -2.84mm 6.925mm 5mil]

View file

@ -1,5 +1,5 @@
PROJ = atfuses
PROJ = sethat
VERSION = v01
GERBERS=$(PROJ).plated-drill.cnc

View file

@ -1,22 +0,0 @@
Project atfuses version v01
Two layer rigid PCB, 8mil/8mil rules, 0.4mm vias, 10mil annular
Size: 36x41 mm²
Thickness: 1.55 mm.
With soldermask, no silk.
Layer order:
1c: atfuses.top.gbr top side copper
2c: atfuses.bottom.gbr bottom side copper
d: atfuses.plated-drill.cnc drill file
o: atfuses.outline.gbr board outline
1m: atfuses.topmask.gbr soldermask top
2m: atfuses.bottommask.gbr soldermask bottom
(unused:)
1p: atfuses.toppaste.gbr solder paste top
1s: atfuses.topsilk.gbr silk top

View file

@ -1,56 +0,0 @@
(gerbv-file-version! "2.0A")
(define-layer! 8 (cons 'filename "atfuses.bottommask.gbr")
(cons 'inverted #t)
(cons 'visible #f)
(cons 'color #(0 57568 6070 21588))
(cons 'alpha #(21588))
)
(define-layer! 7 (cons 'filename "atfuses.bottom.gbr")
(cons 'visible #t)
(cons 'color #(45177 46748 64893 45489))
)
(define-layer! 6 (cons 'filename "atfuses.top.gbr")
(cons 'visible #t)
(cons 'color #(65535 29244 28836 42662))
(cons 'alpha #(42662))
)
(define-layer! 5 (cons 'filename "atfuses.toppaste.gbr")
(cons 'visible #t)
(cons 'color #(65535 0 6760 45489))
)
(define-layer! 4 (cons 'filename "atfuses.topmask.gbr")
(cons 'inverted #t)
(cons 'visible #f)
(cons 'color #(0 64984 7760 13364))
(cons 'alpha #(13364))
)
(define-layer! 3 (cons 'filename "atfuses.plated-drill.cnc")
(cons 'visible #t)
(cons 'color #(61307 61307 61307 65535))
(cons 'alpha #(65535))
(cons 'attribs (list
(list 'autodetect 'Boolean 1)
(list 'zero_suppression 'Enum 0)
(list 'units 'Enum 0)
(list 'digits 'Integer 4)
))
)
(define-layer! 2 (cons 'filename "atfuses.topsilk.gbr")
(cons 'visible #t)
(cons 'color #(0 0 0 55512))
(cons 'alpha #(55512))
)
(define-layer! 1 (cons 'filename "atfuses.outline.gbr")
(cons 'visible #t)
(cons 'color #(0 0 0 65535))
(cons 'alpha #(65535))
)
(define-layer! 0 (cons 'filename "atfuses.fab.gbr")
(cons 'visible #f)
(cons 'color #(0 0 0 65535))
(cons 'alpha #(65535))
)
(define-layer! -1 (cons 'filename "/home/blaulicht/stephan/eda/atfuses/gerber")
(cons 'color #(65535 65535 65535 0))
)
(set-render-type! 3)

View file

@ -1,5 +1,4 @@
#!/usr/bin/python2
# coding=utf-8
#!/usr/bin/python3
# $Id: gvp2make.py 8411 2022-02-28 11:50:10Z stephan $
# This script is free software (c) 2010 Stephan I. Böttcher
@ -76,7 +75,7 @@ from getopt import gnu_getopt as getopt
oo,ifile = getopt(sys.argv[1:], "hg:x:o:w:D:XMA:")
for o,v in oo:
if o=="-h":
print "Synopsis:", sys.argv[0], "<options> gerbv-project-file", usage
print("Synopsis:", sys.argv[0], "<options> gerbv-project-file", usage)
sys.exit()
if o=="-g":
options[0]=v
@ -123,7 +122,7 @@ for l in input(ifile):
LL=""
files=[]
lnumbers = layers.keys()
lnumbers = list(layers.keys())
lnumbers.sort()
for n in lnumbers:
ll = layers[n]
@ -138,6 +137,8 @@ for n in lnumbers:
except:
opacity = opacities["DEFAULT"]
color = [int(c)/65536. for c in ll["color"].split()]
if "alpha" in ll:
opacity = int(ll["alpha"])/65536
if len(color)<4:
color.append(opacity)
options.append("--foreground=#%02x%02x%02x%02x" % tuple(
@ -145,14 +146,14 @@ for n in lnumbers:
if makefile:
target = options[2].split("=")[1]
print "GERBV="+options[0]
print "FORMAT="+options[1].split("=")[1]
print "DPI="+options[3].split("=")[1]
print target+": \\\n\t "+" \\\n\t ".join(files)
print "\t$(GERBV) --output=$@ --export=$(FORMAT) --dpi=$(DPI) \\"
print "\t "+" \\\n\t ".join(options[4:])+" \\\n\t $<"
print ("GERBV="+options[0])
print ("FORMAT="+options[1].split("=")[1])
print ("DPI="+options[3].split("=")[1])
print (target+": \\\n\t "+" \\\n\t ".join(files))
print ("\t$(GERBV) --output=$@ --export=$(FORMAT) --dpi=$(DPI) \\")
print ("\t "+" \\\n\t ".join(options[4:])+" \\\n\t $<")
else:
cmd = " ".join(options+files)
print cmd
print (cmd)
if execcmd:
os.system(cmd)

19
gerber/sethat.README Normal file
View file

@ -0,0 +1,19 @@
Project updi232 version v01
Two layer rigid PCB, 8mil/8mil rules, 0.4mm vias, 10mil annular
Size: 50x51 mm²
Thickness: 1.55 mm.
With soldermask, no silk.
Layer order:
1c: updi232.top.gbr top side copper
2c: updi232.bottom.gbr bottom side copper
d: updi232.plated-drill.cnc drill file
o: updi232.outline.gbr board outline
1m: updi232.topmask.gbr soldermask top
2m: updi232.bottommask.gbr soldermask bottom

56
gerber/sethat.gvp Normal file
View file

@ -0,0 +1,56 @@
(gerbv-file-version! "2.0A")
(define-layer! 8 (cons 'filename "sethat.bottommask.gbr")
(cons 'inverted #t)
(cons 'visible #f)
(cons 'color #(0 57568 6070))
(cons 'alpha #(21588))
)
(define-layer! 7 (cons 'filename "sethat.bottom.gbr")
(cons 'visible #t)
(cons 'color #(45177 46748 64893))
)
(define-layer! 6 (cons 'filename "sethat.top.gbr")
(cons 'visible #t)
(cons 'color #(65535 29244 28836))
(cons 'alpha #(42662))
)
(define-layer! 5 (cons 'filename "sethat.toppaste.gbr")
(cons 'visible #t)
(cons 'color #(65535 0 6760))
)
(define-layer! 4 (cons 'filename "sethat.topmask.gbr")
(cons 'inverted #t)
(cons 'visible #f)
(cons 'color #(0 64984 7760))
(cons 'alpha #(13364))
)
(define-layer! 3 (cons 'filename "sethat.plated-drill.cnc")
(cons 'visible #t)
(cons 'color #(61307 61307 61307))
(cons 'alpha #(65535))
(cons 'attribs (list
(list 'autodetect 'Boolean 1)
(list 'zero_suppression 'Enum 0)
(list 'units 'Enum 0)
(list 'digits 'Integer 4)
))
)
(define-layer! 2 (cons 'filename "sethat.topsilk.gbr")
(cons 'visible #t)
(cons 'color #(0 0 0))
(cons 'alpha #(55512))
)
(define-layer! 1 (cons 'filename "sethat.outline.gbr")
(cons 'visible #t)
(cons 'color #(0 0 0))
(cons 'alpha #(65535))
)
(define-layer! 0 (cons 'filename "sethat.fab.gbr")
(cons 'visible #f)
(cons 'color #(0 0 0))
(cons 'alpha #(65535))
)
(define-layer! -1 (cons 'filename "/home/blaulicht/stephan/eda/sethat/gerber")
(cons 'color #(65535 65535 65535))
)
(set-render-type! 3)

28
gerber/sethat_bom.txt Normal file
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@ -0,0 +1,28 @@
# PcbBOM Version 1.0
# Date: Di 23 Jan 2024 21:54:16 GMT UTC
# Author:
# Title: UPDI232 - PCB BOM
# Quantity, Description, Value, RefDes
# --------------------------------------------
C0603 -BYP_100nF 1/1 C30
C0603 -SD:_10kΩ 1/1 R30
C0603 0Ω 1/1 R21
C0603 100kΩ 5/5 R1 R12 R15 R17 R18
C0603 100nF 9/9 C1 C11 C12 C2 C3 C4 C5 C6 C7
C0603 100Ω 1/1 R33
C0603 10kΩ 9/9 R10 R11 R14 R2 R3 R4 R5 R6 R7
C0603 120kΩ 1/1 R32
C0603 1MΩ 2/2 R13 R16
C0603 270kΩ 1/1 R31
C0603 ∞Ω 1/1 R20
HE_100mil_2_2 unknown 2/2 J2 J30
HE_100mil_6_2 unknown 1/1 J1
P1206 10µF 3/3 C13 C31 C8
SC70_6 BC847S 3/3 Q2 Q3 Q4
SOD123 12V 1/1 D8
SOD523 1N4148 7/7 D1 D2 D3 D4 D5 D6 D7
SOIC_150_16 MAX3232EIDR 1/1 U1
SOT23_3 BSS84 1/1 Q1
SOT23_5 LT1761-SD_/_-BYP 1/1 U30
SUBD9_F D9_fem_90°_backs 1/1 CONN1
gseboard unknown 1/1 BOARD

View file

@ -4,9 +4,9 @@ from fp import *
make(SOIC, (16,))
make(HEADER, (2,6,))
make(SOT, (3,))
make(SOT, (3,5))
make(SC70, (6,))
part(SUBD, n=9, sex="F", female=True)
part(SUBD, n=9, sex="F", female=True, backset=8.1*mm)
part(SOD, partname="SOD123")
part(SOD, partname="SOD523", polar=2)
part(SOD, partname="C0603")

View file

@ -1,12 +0,0 @@
#! /usr/bin/gawk -f
/^[0-9]/ && I
/^Index/{
I=1
printf "%s", $1
for (i=2; i<=NF; i++) {
if (substr($i,1,2)=="v(") printf " %s", substr($i,3,length($i)-3)
else printf " %s", $i
}
printf "\n"
}

40
sethat.net Normal file
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@ -0,0 +1,40 @@
unnamed_net10 J30-1 R33-1
BYP C30-2 R30-1 U30-3
ADJ_CC R32-2 R31-1 U30-4
DTR R33-2 C31-1 R30-2 U30-1
unnamed_net9 R20-2 R21-2 Q2-5
unnamed_net8 R10-2 Q2-2
unnamed_net7 R21-1 R12-1 Q2-6
unnamed_net6 R16-1 Q4-2
unnamed_net5 Q4-6 R17-1 Q4-5
unnamed_net4 R11-2 Q3-2
unnamed_net3 Q3-5 R15-1 Q3-6
unnamed_net2 R14-1 Q1-3
unnamed_net1 Q2-3 R13-1 Q1-1
VccT C12-1 R7-1 J2-2 J1-2
UPDI R16-2 Q3-3 R14-2 J1-1
D6a R5-2 D6-1
D7a R6-2 D7-1
D2a R2-2 D2-1
D3a R3-2 D3-1
D4k D6-2 D7-2 C7-2 D4-2 R4-1
V12V R13-2 Q1-2 D8-2 D2-2 D3-2 C8-1 D5-2
D5a R4-2 C5-1 D5-1
D4a D4-1 C6-1 D1-2
Vcc J2-1 C30-1 R31-2 U30-5 C11-1 C13-1 R12-2 R18-2 R17-2 R15-2 R6-1 R3-1 U1-16
MC1+ C5-2 C1-2 U1-1
RTS R20-1 R10-1 U1-12
RxD R18-1 Q4-3 U1-11
CTS R7-2 U1-10
TxD R11-1 U1-9
MV- C4-1 U1-6
MC2- C6-2 C2-1 U1-5
MC2+ D1-1 C2-2 U1-4
MC1- C1-1 U1-3
MV+ R5-1 R2-1 R1-1 C3-1 U1-2
RxDD U1-14 CONN1-2
RTSD U1-13 CONN1-7
TxDD U1-8 CONN1-3
CTSD U1-7 CONN1-8
DTRD J30-2 CONN1-4
GND C31-2 R32-1 U30-2 C11-2 C12-2 C13-2 Q2-4 Q2-1 Q4-1 Q4-4 Q3-4 Q3-1 J1-6 D8-1 C7-1 C8-2 BOARD-1 R1-2 C4-2 C3-2 U1-15 CONN1-11 CONN1-10 CONN1-5

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@ -2,7 +2,7 @@ v 20220529 2
C 39400 40800 0 0 0 title-B.sym
{
T 49400 41800 19 25 1 1 0 0 1
title=updi232
title=sethat
T 53500 41200 19 10 1 1 0 0 1
version=v01
T 53500 40900 19 10 1 1 0 0 1
@ -10,7 +10,7 @@ author=SiB
T 49400 41500 19 10 1 1 0 0 1
git=https://codeberg.org/SiB64/atfuses.git
T 49400 41200 19 10 1 1 0 0 1
file=updi232.sch
file=sethat.sch
}
C 40000 50900 1 180 1 DB9-1.sym
{
@ -20,9 +20,9 @@ T 40200 47800 5 10 1 1 180 6 1
refdes=CONN1
T 40200 47400 5 10 1 1 0 0 1
footprint=SUBD9_F
T 39900 48300 5 10 1 1 90 0 1
value=D9 fem 90° backset 8.1mm
T 40200 47200 5 10 1 1 0 0 1
value=D9-Female-E-90°
T 40200 47000 5 10 1 1 0 0 1
net=GND:10,11
}
C 45300 47300 1 0 0 max232.sym
@ -130,10 +130,12 @@ N 42600 47600 45300 47600 4
T 44800 47650 5 7 1 1 0 0 1
netname=TxDD
}
N 41700 48800 45300 48800 4
N 41200 48800 45300 48800 4
{
T 44800 48850 5 7 1 1 0 0 1
netname=RxDD
T 41300 48850 5 5 1 1 0 0 1
netname=RxDD
}
C 48900 49500 1 90 0 gnd-1.sym
C 41500 50500 1 90 0 gnd-1.sym
@ -155,12 +157,6 @@ device=none
T 47800 47600 5 10 1 1 0 4 1
value=TxD
}
N 41700 48800 41700 48500 4
N 41200 48500 41700 48500 4
{
T 41300 48550 5 5 1 1 0 0 1
netname=RxDD
}
C 47300 48300 1 0 0 io-1.sym
{
T 48200 48500 5 10 0 0 0 0 1
@ -512,7 +508,7 @@ refdes=J1
T 53700 44400 5 10 0 1 0 0 1
footprint=HE_100mil_6_2
}
C 40100 45100 1 0 0 gnd-1.sym
C 40000 45100 1 0 0 gnd-1.sym
T 53050 46500 5 5 1 1 0 1 1
netname=SCK
T 53050 46100 5 5 1 1 0 1 1
@ -525,7 +521,7 @@ T 53750 46100 5 5 1 1 180 1 1
netname=GND
T 53050 46900 5 5 1 1 0 1 1
netname=MISO
C 40000 46300 1 0 0 vcc-1.sym
C 40500 46300 1 0 0 vcc-1.sym
C 52600 47000 1 180 0 io-1.sym
{
T 51700 46800 5 10 0 0 180 0 1
@ -891,6 +887,21 @@ footprint=P1206
T 41000 45900 5 10 0 1 90 4 1
value=10µF
}
C 39900 46300 1 270 0 capacitor-1.sym
{
T 40600 46100 5 10 0 0 270 0 1
device=CAPACITOR
T 40800 46100 5 10 0 0 270 0 1
symversion=0.2
T 40600 46100 5 10 0 1 270 0 1
footprint=C0603
T 40250 45750 5 10 0 1 90 6 1
value=100nF
T 40150 45750 5 10 1 1 180 6 1
refdes=C12
}
N 40100 45400 41300 45400 4
N 40700 46300 41300 46300 4
C 40500 46300 1 270 0 capacitor-1.sym
{
T 41200 46100 5 10 0 0 270 0 1
@ -902,21 +913,6 @@ footprint=C0603
T 40850 45750 5 10 0 1 90 6 1
value=100nF
T 40750 45750 5 10 1 1 180 6 1
refdes=C12
}
N 41300 45400 40200 45400 4
N 40200 46300 41300 46300 4
C 40000 46300 1 270 0 capacitor-1.sym
{
T 40700 46100 5 10 0 0 270 0 1
device=CAPACITOR
T 40900 46100 5 10 0 0 270 0 1
symversion=0.2
T 40700 46100 5 10 0 1 270 0 1
footprint=C0603
T 40350 45750 5 10 0 1 90 6 1
value=100nF
T 40250 45750 5 10 1 1 180 6 1
refdes=C11
}
C 54300 47400 1 270 0 vcc-1.sym
@ -993,7 +989,7 @@ C 55300 44000 1 90 0 resistor-2.sym
T 54950 44400 5 10 0 0 90 0 1
device=RESISTOR
T 54800 44200 5 10 0 1 90 0 1
footprint=C0603.fp
footprint=C0603
T 54600 44200 5 10 0 0 90 0 1
symversion=0.1
T 55300 44450 5 10 1 1 90 5 1
@ -1012,7 +1008,7 @@ C 55300 43100 1 90 0 resistor-2.sym
T 54950 43500 5 10 0 0 90 0 1
device=RESISTOR
T 54800 43300 5 10 0 1 90 0 1
footprint=C0603.fp
footprint=C0603
T 54600 43300 5 10 0 0 90 0 1
symversion=0.1
T 55300 43550 5 10 1 1 90 5 1
@ -1049,7 +1045,7 @@ device=CAPACITOR
T 51800 44700 5 10 0 0 0 0 1
symversion=0.2
T 51800 44500 5 10 0 1 0 0 1
footprint=C_0603
footprint=C0603
T 52100 44000 5 10 1 1 0 2 1
refdes=C30
T 51600 43600 5 10 1 1 0 0 1
@ -1099,17 +1095,17 @@ C 41900 50200 1 0 0 resistor-2.sym
T 42300 50550 5 10 0 0 0 0 1
device=RESISTOR
T 42100 50700 5 10 0 1 0 0 1
footprint=C0603.fp
footprint=C0603
T 42100 50900 5 10 0 0 0 0 1
symversion=0.1
T 42350 50200 5 10 1 1 0 5 1
refdes=R32
refdes=R33
T 42350 50450 5 10 1 1 0 3 1
value=100Ω
}
N 41200 50000 41800 50000 4
{
T 41200 50050 5 7 1 1 0 0 1
T 41300 50050 5 5 1 1 0 0 1
netname=DTRD
}
N 42800 50300 43100 50300 4
@ -1142,7 +1138,7 @@ U30 will tollerate negative input voltage
and any voltage on the output without input voltage.
T 45700 41300 9 8 1 0 0 0 3
TxD and RxD need to be non-inverting.
CTS may be inverting ot non-inverting.
RTS may be inverting ot non-inverting.
What is the default level on that pin?
T 41700 50900 9 8 1 0 0 0 3
DTR should be able to supply a few mA
@ -1191,3 +1187,10 @@ N 41200 49400 42600 49400 4
T 41300 49450 5 5 1 1 0 0 1
netname=TxDD
}
C 39900 46300 1 0 0 generic-power.sym
{
T 40100 46550 5 10 0 1 0 3 1
net=VccT:1
T 40100 46550 5 7 1 1 0 3 1
description=VccT
}

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@ -1,34 +0,0 @@
unnamed_net16 R20-2 R21-2 Q2-5
unnamed_net15 R10-2 Q2-2
unnamed_net14 R21-1 R12-1 Q2-6
unnamed_net13 R16-1 Q4-2
unnamed_net12 Q4-6 R17-1 Q4-5
unnamed_net11 R11-2 Q3-2
unnamed_net10 Q3-5 R15-1 Q3-6
unnamed_net9 R14-1 Q1-3
unnamed_net8 Q2-3 R13-1 Q1-1
UPDI R16-2 Q3-3 R14-2 J1-5
unnamed_net7 R5-2 D6-1
unnamed_net6 R6-2 D7-1
unnamed_net5 R2-2 D2-1
unnamed_net4 R3-2 D3-1
unnamed_net3 D6-2 D7-2 C7-2 D4-2 R4-1
V12V R13-2 Q1-2 D8-2 D2-2 D3-2 C8-1 D5-2
unnamed_net2 R4-2 C5-1 D5-1
unnamed_net1 D4-1 C6-1 D1-2
Vcc C11-1 C12-1 C13-1 R12-2 R18-2 R17-2 R15-2 J1-2 R6-1 R3-1 U1-16
MC1+ C5-2 C1-2 U1-1
CTS R20-1 R10-1 U1-12
TxD R18-1 Q4-3 U1-11
RTS U1-10
RxD R11-1 U1-9
MV- C4-1 U1-6
MC2- C6-2 C2-1 U1-5
MC2+ D1-1 C2-2 U1-4
MC1- C1-1 U1-3
MV+ R5-1 R2-1 R1-1 C3-1 U1-2
TxDD U1-14 CONN1-2
CTSD U1-13 CONN1-7
RxDD U1-8 CONN1-3
RTSD U1-7 CONN1-8
GND C11-2 C12-2 C13-2 Q2-4 Q2-1 Q4-1 Q4-4 Q3-4 Q3-1 J1-6 D8-1 C7-1 C8-2 BOARD-1 R1-2 C4-2 C3-2 U1-15 CONN1-11 CONN1-10 CONN1-5