solo_altera/dorn/altera/Makefile

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Makefile
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VERILOG=/usr/bin/iverilog
#VERILOG=/usr/bin/iverilog
VERILOGFLAGS = -v -DSIMULATION $($*_FLAGS)
%.vvp:
$(VERILOG) $(VERILOGFLAGS) $(VFLAGS) -o $@ $^
vcd/%.fst: %.vvp
$< -fst | tee $*.log
.PRECIOUS: vcd/%.fst
VPATH=.:../../altera:../../altera/mega:../../irena/altera:../../arena/altera:\
../../nm64/altera:../../irena/altera/adc128:../../sirena/altera:\
../../sirena/altera/l3:../../dorn/altera
DARENA_SRC = darena.v arena.v dorn.v dmem.v adc128s102.v \
frontend.v frontend_test.v spi_slave.v spififo_sim.v conf_reg.v packetfifo.v scangen.v \
countbits.v pulser.v dornpulse.v divider.v \
ltc2656.v adc_data.v oscilloscope.v spi_master_adc.v ad9649.v
$(patsubst %,vsrc/%,$(DARENA_SRC)): $(DARENA_SRC)
mkdir -p vsrc
cp -puv $^ vsrc
darena.vvp: $(DARENA_SRC)
darena_FLAGS = -sdarena_test -DDARENA -DDARENA_TEST -DDORN_SRAM -DWITH_FULL_L2_CONF -DWITH_FULL_L3_CONF
stis_ana_core.vvp: stis_ana_core.v dorn.v multiply.v divider.v dmem.v \
conf_reg.v packetfifo.v spififo_sim.v countbits.v \
serializer.v secondcyclone.v memport.v log7to4.v \
pulser.v adc128s102.v adc_data.v
stis_ana_core_FLAGS = -sstis_ana_core_test -DSTIS_ANA_CORE_TEST \
-DINFERRED_SRAM -DSER_FIFO_ALTERA \
-DWITH_FULL_L1_CONF -DWITH_FULL_L2_CONF -DWITH_FULL_L3_CONF \
-DWITH_DORN_L4 -DWITH_DORN_SC
stis_ana_demo.vvp: stis_ana_demo.v \
stis_ana_core.v dorn.v multiply.v divider.v dmem.v \
conf_reg.v packetfifo.v spififo_sim.v countbits.v \
serializer.v secondcyclone.v memport.v log7to4.v \
pulser.v adc128s102.v adc_data.v
stis_ana_demo_FLAGS = -sstis_ana_demo_test -DSTIS_ANA_DEMO_TEST -DSTIS_ANA_JIG \
-DINFERRED_SRAM -DSER_FIFO_ALTERA -DHAVE_GSE_PORT \
-DWITH_FULL_L1_CONF -DWITH_FULL_L2_CONF -DWITH_FULL_L3_CONF \
-DWITH_DORN_L4 -DWITH_DORN_SC
nmahepam.vvp: nmahepam.v pll192_sim.v pll192_test.v frontend_test.v \
spi_slave.v frontend.v conf_reg.v packetfifo.v spififo_sim.v countbits.v \
stis_ana_core.v slow_clock.v nmcounter.v mem.v itof.v ms5540c.v \
dorn.v adc128s102.v pulser.v divider.v multiply.v dmem.v i2c.v
nmahepam_FLAGS = -s nmahepam_test -DNMAHEPAM_TEST -DNMRENA_v2 -DINFERRED_SRAM \
-DWITH_FULL_L1_CONF -DWITH_FULL_L2_CONF -DWITH_FULL_L3_CONF \
-DSTIS_ANA_JIG -DANA_WITHOUT_SERIALIZER \
-DSPARSE_TRIG_EN -DWITH_GTRIGGER -DL2_AHEPAM -DPLL_TEST
CYCLONE=10
ifeq ($(CYCLONE),10)
QUARTUS=/usr/local/quartus/intelFPGA_lite/20.1/quartus
else
QUARTUS=/usr/local/quartus/altera13.1/quartus
endif
export PATH:=$(QUARTUS)/bin:$(PATH):.
ifeq ($(CYCLONE),)
%_c3.rbf: %_c3.qsf
$(MAKE) CYCLONE=3 $@
%_c10.rbf: %_c10.qsf
$(MAKE) CYCLONE=10 $@
else
%_c$(CYCLONE).qpf: %.qpf
ln $< $@
%_c$(CYCLONE).sdc: %.sdc
ln $< $@
endif
MAPFLGS = $(patsubst %, --verilog_macro="%",$($*_MAPDEFS) $(MAPDEFS))
QDIR=quartus
$(QDIR)/%.rbf: %.qpf %.qsf %.sdc \
frontend.v spi_slave.v conf_reg.v packetfifo.v spififo.v
quartus_map $< $(MAPFLGS)
quartus_fit $<
quartus_asm $<
quartus_sta $<
grep -i warning $(QDIR)/$*.*.rpt \
| grep -v 'behaves as a Local Parameter Declaration because the module' \
| grep -v 'truncated value with size 32 to match size of target' \
| sed 's/\.v([0-9]\+)/.v(…)/;s/File: .* Line: [0-9]\+$$//' \
> $*.warnings
grep '^; -' $(QDIR)/$*.sta.rpt >> $*.warnings || echo Timing OK
$(QDIR)/darena.rbf: pll96.v arena.v dorn.v \
ltc2656.v
divide_FLAGS= -s divide_test -DDIVIDE_TEST
divide.vvp: divider.v multiply.v
multiply_FLAGS= -s multiply_test -DMULTIPLY_TEST -DINFERRED_MULTILIER
multiply.vvp: multiply.v
dorn_l2_lockup_FLAGS= -s dorn_l2_lockup -DDORN_L2_LOCKUP -DWITH_FULL_L2_CONF
dorn_l2_lockup.vvp: dorn.v multiply.v dmem.v
$(QDIR)/stis_ana_demo_c$(CYCLONE).rbf: stis_ana_demo.v stis_ana_core.v \
secondcyclone.v serializer.v spififo.v conf_reg.v itof.v \
packetfifo.v adc128s102.v conf_reg.v countbits.v mem.v \
dorn.v dmem.v divider.v log7to4.v memport.v
$(QDIR)/nmahepam.rbf: nmahepam.v pll192_test.v frontend_test.v \
spi_slave.v frontend.v conf_reg.v packetfifo.v countbits.v \
stis_ana_core.v dorn.v
$(QDIR)/nmleia.rbf: nmahepam.v pll192_test.v frontend_test.v \
spi_slave.v frontend.v conf_reg.v packetfifo.v countbits.v \
stis_ana_core.v dorn.v