solo_altera/erena/altera/erenasc.warnings

quartus/erenasc.asm.rpt:Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
quartus/erenasc.fit.rpt:  5. I/O Assignment Warnings
quartus/erenasc.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings                         ; Off                                   ; Off                                   ;
quartus/erenasc.fit.rpt:; I/O Assignment Warnings                             ;
quartus/erenasc.fit.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/erenasc.fit.rpt:Warning (15564): Compensate clock of PLL "pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|pll1" has been set to clock4
quartus/erenasc.fit.rpt:Warning (15536): Implemented PLL "pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|pll1" as Cyclone III PLL type, but with warnings
quartus/erenasc.fit.rpt:    Warning (15559): Can't achieve requested value 86.4 degrees for clock output pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|clk[2] of parameter phase shift -- achieved value of 90.0 degrees
quartus/erenasc.fit.rpt:    Warning (15559): Can't achieve requested value 86.4 degrees for clock output pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|clk[3] of parameter phase shift -- achieved value of 90.0 degrees
quartus/erenasc.fit.rpt:    Warning (15559): Can't achieve requested value 57.6 degrees for clock output pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|clk[4] of parameter phase shift -- achieved value of 56.2 degrees
quartus/erenasc.fit.rpt:Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
quartus/erenasc.fit.rpt:Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
quartus/erenasc.fit.rpt:Warning (176674): Following 8 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
quartus/erenasc.fit.rpt:    Warning (176118): Pin "clk_T1" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_T1(n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "spi_miso" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_miso(n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "trigger" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "trigger(n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "adc_clk[2]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "adc_clk[2](n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "adc_clk[1]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "adc_clk[1](n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "spi_sck" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_sck(n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "clk_12" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_12(n)"
quartus/erenasc.fit.rpt:    Warning (176118): Pin "spi_mosi" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_mosi(n)"
quartus/erenasc.fit.rpt:Warning (332174): Ignored filter at erenasc.sdc(8): pll0|altpll_component|auto_generated|pll1|clk[1] could not be matched with a clock or keeper or register or port or pin or cell or partition
quartus/erenasc.fit.rpt:Warning (332049): Ignored set_false_path at erenasc.sdc(8): Argument <to> is not an object ID
quartus/erenasc.fit.rpt:Warning (332174): Ignored filter at erenasc.sdc(9): pll0|altpll_component|auto_generated|pll1|clk[0] could not be matched with a clock
quartus/erenasc.fit.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(9): Argument <to> is an empty collection
quartus/erenasc.fit.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(10): Argument <to> is an empty collection
quartus/erenasc.fit.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(11): Argument <to> is an empty collection
quartus/erenasc.fit.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(12): Argument <to> is an empty collection
quartus/erenasc.fit.rpt:Warning (176225): Can't pack node adc_data2:ad1|ndin[13] to I/O pin
quartus/erenasc.fit.rpt:    Warning (176228): Can't pack node adc_data2:ad1|ddin[1][13] and I/O node adc_da1[13] -- I/O node is a dedicated I/O pin
quartus/erenasc.fit.rpt:    Warning (176228): Can't pack node adc_data2:ad1|ndin[13] and I/O node adc_da1[13] -- I/O node is a dedicated I/O pin
quartus/erenasc.fit.rpt:Warning (176225): Can't pack node adc_data2:ad1|ndin[12] to I/O pin
quartus/erenasc.fit.rpt:    Warning (176228): Can't pack node adc_data2:ad1|ddin[1][12] and I/O node adc_da1[12] -- I/O node is a dedicated I/O pin
quartus/erenasc.fit.rpt:    Warning (176228): Can't pack node adc_data2:ad1|ndin[12] and I/O node adc_da1[12] -- I/O node is a dedicated I/O pin
quartus/erenasc.fit.rpt:Warning (176225): Can't pack node adc_data2:ad1|ndin[11] to I/O pin
quartus/erenasc.fit.rpt:    Warning (176228): Can't pack node adc_data2:ad1|ddin[1][11] and I/O node adc_da1[11] -- I/O node is a dedicated I/O pin
quartus/erenasc.fit.rpt:    Warning (176228): Can't pack node adc_data2:ad1|ndin[11] and I/O node adc_da1[11] -- I/O node is a dedicated I/O pin
quartus/erenasc.fit.rpt:Warning (176250): Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
quartus/erenasc.fit.rpt:Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
quartus/erenasc.fit.rpt:Info: Quartus II 32-bit Fitter was successful. 0 errors, 35 warnings
quartus/erenasc.map.rpt:; old  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/erenasc.map.rpt:; old  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/erenasc.map.rpt:; trouble    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/erenasc.map.rpt:; conf3         ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/erenasc.map.rpt:; fifo_empty    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/erenasc.map.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/erenasc.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at ms5540c.v(120): Parameter Declaration in module "ms5540c" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at erena.v(193): truncated value with size 2 to match size of target (1)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at erena.v(338): truncated value with size 32 to match size of target (7)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at erena.v(340): truncated value with size 32 to match size of target (7)
quartus/erenasc.map.rpt:Warning (10296): VHDL warning at pll240.vhd(194): ignored assignment of value to null range
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(97): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(99): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(256): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(258): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(70): truncated value with size 32 to match size of target (3)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(150): truncated value with size 32 to match size of target (10)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(171): truncated value with size 32 to match size of target (10)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (5)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (10)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_master_adc.v(99): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(247): truncated value with size 32 to match size of target (9)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(117): truncated value with size 21 to match size of target (18)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(453): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(374): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(396): truncated value with size 25 to match size of target (11)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(664): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(669): truncated value with size 32 to match size of target (5)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(739): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(750): truncated value with size 32 to match size of target (16)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epipe.v(757): truncated value with size 32 to match size of target (16)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(216): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(219): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(220): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(221): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(222): truncated value with size 32 to match size of target (4)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(240): truncated value with size 32 to match size of target (3)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(297): truncated value with size 6 to match size of target (5)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(336): truncated value with size 32 to match size of target (9)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(30): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(32): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(34): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(52): truncated value with size 32 to match size of target (6)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(41): truncated value with size 32 to match size of target (10)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(43): truncated value with size 32 to match size of target (10)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(45): truncated value with size 32 to match size of target (10)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(123): truncated value with size 32 to match size of target (11)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(125): truncated value with size 32 to match size of target (11)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(141): truncated value with size 32 to match size of target (8)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(188): truncated value with size 32 to match size of target (5)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (16)
quartus/erenasc.map.rpt:Warning (10230): Verilog HDL assignment warning at epulser.v(26): truncated value with size 32 to match size of target (9)
quartus/erenasc.map.rpt:Warning (12241): 4 hierarchies have connectivity warnings - see the Connectivity Checks report folder
quartus/erenasc.map.rpt:Warning (13024): Output pins are stuck at VCC or GND
quartus/erenasc.map.rpt:    Warning (13410): Pin "adc_sync[1]" is stuck at GND
quartus/erenasc.map.rpt:Warning (15897): PLL "pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|pll1" has parameter compensate_clock set to clock0 but port CLK[0] is not connected
quartus/erenasc.map.rpt:Warning (15899): PLL "pll240:pll0|altpll:altpll_component|altpll_2143:auto_generated|pll1" has parameters clk0_multiply_by and clk0_divide_by specified but port CLK[0] is not connected
quartus/erenasc.map.rpt:Warning (332174): Ignored filter at erenasc.sdc(8): pll0|altpll_component|auto_generated|pll1|clk[1] could not be matched with a clock or keeper or register or port or pin or cell or partition
quartus/erenasc.map.rpt:Warning (332049): Ignored set_false_path at erenasc.sdc(8): Argument <to> is not an object ID
quartus/erenasc.map.rpt:Warning (332174): Ignored filter at erenasc.sdc(9): pll0|altpll_component|auto_generated|pll1|clk[0] could not be matched with a clock
quartus/erenasc.map.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(9): Argument <to> is an empty collection
quartus/erenasc.map.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(10): Argument <to> is an empty collection
quartus/erenasc.map.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(11): Argument <to> is an empty collection
quartus/erenasc.map.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(12): Argument <to> is an empty collection
quartus/erenasc.map.rpt:Warning (21074): Design contains 3 input pin(s) that do not drive logic
quartus/erenasc.map.rpt:    Warning (15610): No output dependent on input pin "clk_T1"
quartus/erenasc.map.rpt:    Warning (15610): No output dependent on input pin "trigger"
quartus/erenasc.map.rpt:    Warning (15610): No output dependent on input pin "adc_ora[1]"
quartus/erenasc.map.rpt:Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 63 warnings
quartus/erenasc.sta.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/erenasc.sta.rpt:Warning (332174): Ignored filter at erenasc.sdc(8): pll0|altpll_component|auto_generated|pll1|clk[1] could not be matched with a clock or keeper or register or port or pin or cell or partition
quartus/erenasc.sta.rpt:Warning (332049): Ignored set_false_path at erenasc.sdc(8): Argument <to> is not an object ID
quartus/erenasc.sta.rpt:Warning (332174): Ignored filter at erenasc.sdc(9): pll0|altpll_component|auto_generated|pll1|clk[0] could not be matched with a clock
quartus/erenasc.sta.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(9): Argument <to> is an empty collection
quartus/erenasc.sta.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(10): Argument <to> is an empty collection
quartus/erenasc.sta.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(11): Argument <to> is an empty collection
quartus/erenasc.sta.rpt:Warning (332049): Ignored set_max_delay at erenasc.sdc(12): Argument <to> is an empty collection
quartus/erenasc.sta.rpt:Critical Warning (332148): Timing requirements not met
quartus/erenasc.sta.rpt:Critical Warning (332148): Timing requirements not met
quartus/erenasc.sta.rpt:Critical Warning (332148): Timing requirements not met
quartus/erenasc.sta.rpt:Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 11 warnings