solo_altera/irena/altera/adc128/Makefile

VERILOG=/usr/local/bin/iverilog
#VERILOG=/usr/bin/iverilog

VERILOGFLAGS = -v -DSIMULATION $($*-FLAGS)
%.vvp:
	$(VERILOG) $(VERILOGFLAGS) -o $@ $^

vcd/%.lxt: %.vvp
	$< -lxt2 | tee $*.log

.PRECIOUS: vcd/%.lxt

VPATH=.:../../../altera:../../../altera/actel

ACTELRAMS = memWxActel.v mem36x128.v mem36x256.v memWxActel.v RAM64K36_sim.v

filter_test_DEFS =  -DMULT3_$(MULT3) -DREMOTE_ADC

filter_test-FLAGS=-DFILTER_TEST -s filter_test -DMEMSRAM3 -DACTEL_SRAM $(filter_test_DEFS)
filter_test.vvp: sfilter.v adc128s102.v pulser.v mem.v packetfifo.v $(ACTELRAMS)