Lately we got a 4th window parameter. The logic was that only one channel
contributing to a coincidence trigger on either level must be in a narrow
age window. There were still races of all kinds. This change is
conceptually simple and should eliminate all races.
The four window parameters (a₁ a₂ a₃ a₄) define a wide and a narrow age
window, wide: a₁ ≤ T ≤ a₄, narrow: a₂ ≤ T ≤ a₃.
All channels required to be hit by an L₂ trigger must have a pulse age T in
the narrow window. A hit on an anticoincidence channel within the wide
age window will inhibit the trigger.
a₄ is the L₁ trigger parameter that defines when the peak detector will
be reset. Hits with longer age will not show up in the data and not be
seen by the L₂ trigger. The parameters should be monotonic, but need
not be distinct.
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@7795 bc5caf13-1734-44f8-af43-603852e9ee25
There were three window parameters: minT, maxT, TmaxT.
Any pulse required for a trigger must be aged at least minT.
At least one pulse of any trigger must be at least maxT of age.
A pulse aged TmaxT will be reset to 0.
TmaxT is an L1 parameter.
minT and maxT are L2 parameters.
The problem: An anticoincidence pusle may age out beyond TmaxT
while the hit channel stays below TmaxT. There will be a false
positive trigger.
Now there are four trigger parameters: minT, nomT, maxT, TmaxT.
maxT was renamed to nomT. A required pulse must not be older
than the new maxT parameter.
minT ≤ nomT ≤ maxT ≤ TmaxT.
minT ≥ 2
Users need to be updated.
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@7417 bc5caf13-1734-44f8-af43-603852e9ee25
From: boettcher@physik.uni-kiel.de (Stephan Böttcher)
To: solo_kiel@physik.uni-kiel.de, change4@physik.uni-kiel.de
Subject: flyrena L2 trigger
Date: Sat, 27 May 2017 20:43:24 +0200
Message-ID: <s6ninkmp2cz.fsf@blaulicht.brux>
Moin,
I found a deficiency in the flyrena L2 trigger, that may affect HET/EPT
and/or LND.
If multiple L2 trigger are satisfied by a particle hit, the L2 trigger
bits are set as soon as one of those L2 trigger conditions is satisfied
and the event record is generated according to that triggers readout
mask. A more elaborate trigger may come active one or more ADC clocks
later, but that will not be reflected in the L2 trigger bits, nor the
selected readout mask, nor the L3 trigger being activated.
HET/EPT is probably not affected. But that needs to be verified.
The current LND configuration is affected.
Assume a charged particle hit. Detector B triggers an ADC clock earlier
than A and/or I, so that the total-dose-in-B trigger fires with a narrow
readout mask, calling for dosimetry L3. One ADC clock later, the
condition for the charged particle trigger is fullfilled, but the event
readout is too narrow, and the wrong L3 trigger is called.
A workaround is to never do sparse readout, i.e., always read all
channels, and add code to L3 to refine the triggers.
Gruß,
Stephan
PS: I found this problem in the data of the RpiRENA mADAM detector for
the weather ballon flight this summer. That is a direna filter
with 3MSPS and 12-bit coefficients, so the probablility for triggers to
come out of time is higher.
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@6069 bc5caf13-1734-44f8-af43-603852e9ee25
support new FO parameter of the adcschedule module
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@3287 bc5caf13-1734-44f8-af43-603852e9ee25
This patch adds a register at the DOUT/SDATA input, before it is
distributed to four SRAM blocks.
This is necessary to meet worst case timing requirements of the ADCs.
The ADCs require 27ns propagation delay from SCLK to SDATA. The FPGA
must ensure the roundtrip clk -> SCLK -> SDATA -> clk takes no more
than 62.5ns. The aim is to constrain synthesis such that the sum of the
delay clk->SCLK plus setup time DOUT->clk is shorter than 25ns.
Obviously, there should be a register in the input pads of DOUT/SDATA.
All inwards bound timing output of the aschedule module needs to be
delayed by one clk cycle to cover for the extra register, that's all.
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@3264 bc5caf13-1734-44f8-af43-603852e9ee25
add NT parameter for number of L2 triggers
allow alternative implementations of ABTto32
fix bug in samples timestamp emission
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@2257 bc5caf13-1734-44f8-af43-603852e9ee25
fix filter_test and flyrena tests for new L2 config
save flyrena.gold as baseline for future changes
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@1982 bc5caf13-1734-44f8-af43-603852e9ee25
