Commit graph

  • dfe4ff7a74 dorn SK: comment true H stephan 2020-03-15 12:24:42 +00:00
  • b2ac065eb4 dorn/doc: dorn-du-gse layout stephan 2020-03-15 11:23:48 +00:00
  • 83f0f9d1a3 dorcn/doc: ARENA, schematics stephan 2020-03-15 02:45:22 +00:00
  • cc5a3b3cef dorn/doc: Digital Processing stephan 2020-03-15 01:52:55 +00:00
  • 2e7e3137cb dorn: fix ADC_DOUT connection in the test jig, trigger on the newest sample. stephan 2020-03-15 01:52:28 +00:00
  • 5140d78c2b adc128s102: fix clock idle state stephan 2020-03-15 01:50:19 +00:00
  • 07567daaf5 dorn/doc: gains stephan 2020-03-14 22:31:00 +00:00
  • 7fdd031254 dorn/doc: preamp-shaper-sallen-key-filter horz. compcatness stephan 2020-03-14 10:21:11 +00:00
  • b999c2fa37 dorn doc: dorn-shaper-pulses stephan 2020-03-14 10:14:42 +00:00
  • 6e5268bbe4 dorn doc, Id fix stephan 2020-03-13 23:35:29 +00:00
  • e4bfb12ae4 dorn doc stephan 2020-03-13 23:32:20 +00:00
  • 7cb01e8cbf oscilloscope: sane packet sizes stephan 2020-03-13 20:12:13 +00:00
  • f79f67b153 darena bitfile stephan 2020-03-13 11:35:30 +00:00
  • 161aee8af6 adc128s102: CLKDIV==1 use dedicated clk_dis FF per output stephan 2020-03-13 11:34:44 +00:00
  • 4344a3458d pulser: avoid $readmemh warning stephan 2020-03-13 11:33:32 +00:00
  • 175915cf64 nm_mcs: gtkw stephan 2020-03-13 11:31:49 +00:00
  • 711f7f90e4 darena: scope sim, target Altera stephan 2020-03-12 23:59:28 +00:00
  • d73b5432db dorn_divide: change module name to avoid clash with Altera lib stephan 2020-03-12 23:57:42 +00:00
  • ee9acb2967 oscilloscope: allow longer acquisitions, edge trigger fix stephan 2020-03-12 23:56:21 +00:00
  • 27c7972d5b pll96: adjust phases, *edge .c4() shall align with negedge .c0() stephan 2020-03-12 23:54:10 +00:00
  • 79076e222c logicanalyser: comments are evil stephan 2020-03-12 23:52:23 +00:00
  • b54143630b frontend: avoid warning of unconnected port .halffull() stephan 2020-03-12 23:51:40 +00:00
  • 2bc6837b8b darena: feature complete, next: target Altera stephan 2020-03-12 00:01:29 +00:00
  • 1945d6fabb data.py: Fixed var length encoding cadences for FAR mode for EPT and HET nom. elftmann 2020-03-11 11:36:41 +00:00
  • 4f7a9cfee6 dorn-du-gse: component values, all poles 2.7µs stephan 2020-03-11 10:30:12 +00:00
  • 378dd03885 dorn L3 stephan 2020-03-11 04:29:32 +00:00
  • 1870c3a72c darena: reset f_read stephan 2020-03-09 19:26:08 +00:00
  • 7918193413 darena: dorn_l2 needs sim testing and fixing stephan 2020-03-08 23:44:21 +00:00
  • 1ea56663fa dorn-du-gse: remove stubs stephan 2020-03-06 10:00:03 +00:00
  • b354ee969c configurations: Add bin definitions for STEP v4, v5. terasa 2020-03-06 08:20:13 +00:00
  • 542f79f74b solo/base_config.py: Export pixels and energies bins for each data productt to .bins file. terasa 2020-03-06 08:18:28 +00:00
  • 79b98e126b base_config.py: Write out energy bins. terasa 2020-03-05 12:08:40 +00:00
  • 2a9798829d solo/configurations: Add STEP v4 and v5 from git to SVN. terasa 2020-03-05 11:33:17 +00:00
  • 34e8ba9df1 dorn-du-gse: pcb checkout stephan 2020-03-05 11:30:03 +00:00
  • 1663595283 mddm: fix for new P-record numbering stephan 2020-03-05 11:27:46 +00:00
  • f43ccdf6d0 irena: Gd4 scripting, fit stephan 2020-03-05 11:26:41 +00:00
  • 6e27efe294 Add extra options for threshold twiddling. terasa 2020-03-05 11:20:21 +00:00
  • 96300d02a4 Change exec delay of EEPROM updates to five minutes. terasa 2020-03-05 11:18:06 +00:00
  • 1d8975e0aa plot REG, split files stephan 2020-03-05 11:13:16 +00:00
  • c50860d82a telecom.py: Add vmsol6 parser. terasa 2020-03-05 10:45:41 +00:00
  • e56f0d2330 msgdecode.py Add various STEP/IDEF-X decoders. terasa 2020-03-05 10:40:43 +00:00
  • f09994bdf6 dps_table.py: Add equality operator for dps_table() instances. terasa 2020-03-05 10:39:03 +00:00
  • db207a316b step/ppss.py: Rediscover and comment method to generate TCs for threshold setting. terasa 2020-03-05 10:37:45 +00:00
  • 8a08765693 telecom.py: Fix trying to generate TCs for empty msg_telecommand terasa 2020-03-05 10:36:40 +00:00
  • b3b9b46928 configurations: add packetdefs for configurations with 600s pha cadence kollhoff 2020-03-05 10:25:58 +00:00
  • 2de3fe759f dorn-du-gse: DAC outputs shall power up at 0V, implemented on the layout stephan 2020-03-04 09:57:55 +00:00
  • c2a26ff1f1 dorn-du-gse: DAC outputs shall power up at 0V stephan 2020-03-04 08:20:38 +00:00
  • ada975bffd all_raw_itf.cgi: nice input form, wothy for the top of the page stephan 2020-03-03 23:13:19 +00:00
  • 72b010bd01 all_raw_itf.cgi: improvements, time form input stephan 2020-03-03 21:03:18 +00:00
  • fb83477ebf all_raw_itf cgi scripts stephan 2020-03-03 19:26:32 +00:00
  • 7c600a16e1 darena: dorn_l2 derandomizing buffer stephan 2020-03-03 02:28:51 +00:00
  • 5906f6ab51 dorn-du-gse: fix polarity of HK_Vbias stephan 2020-03-02 17:43:33 +00:00
  • c9578befe1 configurations: v0006 flagged as uploaded to EEPROM kollhoff 2020-03-02 16:58:32 +00:00
  • dd44f02f8e darena: core files stephan 2020-03-02 11:11:22 +00:00
  • aaa303691b dorn-du-gse: minor fixes to layout stephan 2020-03-01 22:57:20 +00:00
  • ae5244bd72 darena with dorn l1, dac, pulser, hk and sample readout stephan 2020-03-01 22:53:54 +00:00
  • b355a39bf7 pll96: 16, 32, 48, 64, 96 MHz stephan 2020-03-01 22:52:50 +00:00
  • e7af719921 adc128s102: support CLKDIV=1 and 2 stephan 2020-03-01 22:51:50 +00:00
  • 62db8906c1 spi_slave: fix ssel ?! stephan 2020-03-01 22:50:57 +00:00
  • c242c75fff dorn du gse: refdes placement stephan 2020-02-29 11:23:54 +00:00
  • e4cdc77d90 dorn du gse: soldermask fixed, DRC fixes stephan 2020-02-29 11:00:50 +00:00
  • ca49aef588 dorn du gse: no unnamed nets stephan 2020-02-29 10:14:19 +00:00
  • e0499fd9c7 dorn du gse: no unnamed nets stephan 2020-02-29 10:13:48 +00:00
  • afea9741f7 dorn du gse: layout complete, todo: drc, refdes, soldermask stephan 2020-02-29 00:39:26 +00:00
  • 8d23346ca5 dorn du GSE: schematics stephan 2020-02-28 15:36:23 +00:00
  • 8677d089e9 mcs: Makefile stephan 2020-02-27 15:01:04 +00:00
  • f75d4d73de erena.py updated for 40 Hz setup wallmann 2020-02-27 10:20:18 +00:00
  • 0c664d95c8 flash_NM_MCS: bitfile, default config, new res, CRON.RC stephan 2020-02-23 21:28:29 +00:00
  • 71592c4579 arm/ssp: reset ssp_dma_size in ssp_reset(), for use as dma status in CRON.RC stephan 2020-02-23 20:54:15 +00:00
  • 54a230adb5 rpirena: cgi/rpirena-control stephan 2020-02-23 20:19:26 +00:00
  • d8b087d4af rpirena/www: move processing from inline gnuplot to make stephan 2020-02-22 22:57:42 +00:00
  • 13fe8028f8 rpirena: make %.CP stephan 2020-02-22 20:24:44 +00:00
  • c478a236ae rpirena: notification via inotify from webfsd stephan 2020-02-22 20:23:50 +00:00
  • 281c439d31 rpirena/www: setup for etsolopi4 Hemmingen stephan 2020-02-22 20:22:03 +00:00
  • c4e2f579fc nm_mcs: spectrum: fix pipeline collisions stephan 2020-02-22 00:38:36 +00:00
  • ec9e574ee4 nm_mcs: reimplement res, resolutions from 10ns to 655.35µs stephan 2020-02-21 14:16:16 +00:00
  • b51339c628 nm_mcs: debugged with a pulser stephan 2020-02-21 12:42:36 +00:00
  • a14ac60d2c nm_mcs: seems to work stephan 2020-02-18 20:49:23 +00:00
  • 4049d38ffb nm_mcs: fix conf3 stephan 2020-02-18 13:56:57 +00:00
  • 5af870a7b8 nm_mcs: sim and synthesis stephan 2020-02-18 04:46:31 +00:00
  • 80195987ae new nmrena usage: nm_mcs stephan 2020-02-17 19:34:02 +00:00
  • 500bf34ac9 new nmrena usage: nm_mcs stephan 2020-02-17 19:32:23 +00:00
  • c3dfa40722 nm64_frontend: MCS config' stephan 2020-02-17 19:31:50 +00:00
  • dd8aff477d mustang: 16 channels stephan 2020-02-17 19:30:57 +00:00
  • 303363d9e9 backend: make encode.vvp stephan 2020-02-17 19:30:19 +00:00
  • 8f41d12784 rpirena: make %.HK stephan 2020-02-17 10:22:02 +00:00
  • d65c9c76a4 rpirena config threediodes() with sparse read mask stephan 2020-02-14 11:11:50 +00:00
  • 0e4ca973fc rpirena: support sparce readout masks stephan 2020-02-14 10:50:45 +00:00
  • 9533e8319a RPi.awk: add UNIT=CsI stephan 2020-02-14 10:48:40 +00:00
  • 7412678f8b rpirena: reset spififo@hk, do not read pressure 2, add delays sib 2020-02-13 15:28:28 +00:00
  • 52d319ec7b rpirena: fixes during Corrie's commissioning stephan 2020-02-13 13:32:49 +00:00
  • 3d6c39300e rpirena: current bitfile stephan 2020-02-10 08:35:01 +00:00
  • 0829f4201e rpirena: bitfile with counters stephan 2020-02-10 07:53:41 +00:00
  • 76455ddb0f rpirena: add counter readout stephan 2020-02-08 18:10:50 +00:00
  • 9fa3200f53 nmrena mustang: new python main for mustang lisak 2020-01-31 12:22:24 +00:00
  • e854f8fa5a automated the calculation of shift exponents in two_step function of erena.py and implemented set and read functions for erenas HV wallmann 2020-01-21 12:28:00 +00:00
  • e811931d98 heteptdig.tex: Fix description of decoder for non-normalized numbers and drop=3. terasa 2020-01-15 16:05:23 +00:00
  • e6dc878e4a solo/hetept/necp_telecom.py: Add comments to TCs. kollhoff 2020-01-09 13:19:11 +00:00
  • 2d0bf88d93 solo/configtable.py: kollhoff 2020-01-09 13:17:21 +00:00
  • d7732a92d2 solo/cdpu/telecom.py: kollhoff 2020-01-09 13:12:36 +00:00