Stephan/solo_altera
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  • 594922077c ept_1D.l3: radically simplified the code for easier testing ofl3 functionality boden 2014-11-07 09:15:03 +00:00
  • 04bd864f28 compare_l3_pha.py: Added new class for comparing PHA data from .itf files with the output of the l3 trigger boden 2014-11-07 09:09:16 +00:00
  • efa67566be sc: fixed a bug of read/write timing, and one of multi reg acquisition wetzel 2014-11-06 15:24:08 +00:00
  • e1a45e48aa step: added UNUSED port, and fixed a timing bug in the testjig wetzel 2014-11-06 15:23:19 +00:00
  • a88b0a7080 ept_data_desc.txt: minor corrections boden 2014-11-06 14:56:19 +00:00
  • 8b2cea5a45 ept_simple.l3: Added simple l3 code for ept. terasa 2014-11-06 14:34:06 +00:00
  • 82a52f372c dps_table.py: Added memclear. terasa 2014-11-06 14:32:44 +00:00
  • a45b06be60 solomsg.py: Cosmetic changes to injector. terasa 2014-11-06 14:32:08 +00:00
  • 554d5574f4 solomsg.py: Fixed determination of trigger class in injector. terasa 2014-11-06 13:46:17 +00:00
  • 264db18d26 solomsg.py: Bugfix. terasa 2014-11-06 13:34:15 +00:00
  • abcb8dc4c4 solomsg.py: Added SRAM read out. terasa 2014-11-06 13:12:50 +00:00
  • 4ee0425596 solomsg.py: Updated read_dps() to newest spec. terasa 2014-11-06 10:27:58 +00:00
  • ba92ffe418 dps_table.py: added control flags for simulation (-s), configuration (-c), binary stream (-b) and dps function bypass (-u) grunau 2014-11-06 09:56:50 +00:00
  • 323c962d35 step slow control: fixed another bug, still NOT free of bugs wetzel 2014-11-05 21:10:49 +00:00
  • abbe4ad86e step: .gtkw was born! wetzel 2014-11-05 21:08:30 +00:00
  • 60a169d9fc pha: documet the channel-valid bit stephan 2014-11-05 16:54:21 +00:00
  • 03a088aacb eptpreamps: QM test stephan 2014-11-05 16:53:21 +00:00
  • 1bdf8ae2cb solomsg.py: Added histogram and pha SRAM page readout commands. terasa 2014-11-05 16:05:41 +00:00
  • d4a8e589c2 solomsg.py: Fixed bug in injector. Send message with size 16 bit instead of 32 bit to finish data set. terasa 2014-11-05 14:50:59 +00:00
  • e03d6c7b3f solomsg.py: Added option to limit number of PHA entries fed into L3 injector. terasa 2014-11-05 14:40:26 +00:00
  • 32b2b801cb dps_table.py: minor changes grunau 2014-11-05 13:46:20 +00:00
  • 17034ff3e6 step: step.v was born! wetzel 2014-11-05 11:58:32 +00:00
  • 2bca3cb378 git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@3434 bc5caf13-1734-44f8-af43-603852e9ee25 boden 2014-11-04 16:51:57 +00:00
  • 9feb70c581 Added ept l3 desc; changed ept l3 constant names boden 2014-11-04 16:06:54 +00:00
  • 9d946ac810 stein_frontend: corrected a portname wetzel 2014-11-04 13:21:45 +00:00
  • 32fdb9080d stein_core: added new port to backend (hardwired to zero), TODO: Review wetzel 2014-11-04 13:20:45 +00:00
  • 5c4ca944e5 Makefile: added rule for step wetzel 2014-11-04 13:19:12 +00:00
  • 30e63ae966 stein_adc_controller: removed two comments, updated test jig, remove one unneccessary logic or wetzel 2014-11-04 11:20:01 +00:00
  • 55965cbfb3 dps_table.py: moved to ./sirena/altera, added streaming support for dps simulator grunau 2014-11-04 08:46:45 +00:00
  • 9600f922b7 stein: updated testjigs of sc scheduler and acquire to new DELAYS wetzel 2014-11-03 19:01:22 +00:00
  • cd98143bc4 pipe.py: Added optional numpy output mode. Default output is binary stream of 32bit uints, for piping into dps simulator. terasa 2014-11-03 16:13:51 +00:00
  • 9c797f05b4 stein: fixed various bugs (Part 1) - to be continued wetzel 2014-11-03 15:33:26 +00:00
  • ca2371790c dps_table.py: added dps_item class and operator += for dps_table grunau 2014-11-03 12:28:54 +00:00
  • 69dcfa5432 tarena fit: archive the polyfit(3), go on with p(1) stephan 2014-11-03 11:37:36 +00:00
  • 4f1755a0f4 tarena fit: archive the polyfit(3), go on with p(1) stephan 2014-11-03 11:36:56 +00:00
  • feb8199693 simplified ept l3 trigger boden 2014-11-03 11:06:49 +00:00
  • 4daea3e69d rearranged memory to 1024x256 boden 2014-11-03 11:04:31 +00:00
  • 11d5b98611 minor fixes boden 2014-11-03 10:05:44 +00:00
  • 9de71f9e0d dps_table.py: initial release of dps-table helper class for simulating dps-tables from memory dumps grunau 2014-11-03 10:01:32 +00:00
  • 9efc18dc3b Makefile: Added forward declare files for STEP. terasa 2014-11-01 00:51:27 +00:00
  • c516ca6191 i128event.py: Updated STEP L3 code. terasa 2014-10-31 14:57:31 +00:00
  • b1151708ef i128event.py: Refactored pha into a generic base class and added pha_step subclass. Adapted depending code. terasa 2014-10-31 13:36:47 +00:00
  • 52fc2960e5 pipe.py: When using file output pipe.py will now output using numpy.savetxt. terasa 2014-10-31 13:04:55 +00:00
  • 85a712e9ad pipe.py: __str__ will print whole data as huge array (consider adding numpy.savetxt, numpy.memmap or cpickle output?). Deduplicated parser code. Added stepevent. terasa 2014-10-31 12:29:02 +00:00
  • f0a785f4a0 solomsg.py: L3 injector can now inject i128events or stepevents. terasa 2014-10-31 10:25:57 +00:00
  • 284a89d937 stepevent.py: Initial commit. terasa 2014-10-31 10:23:57 +00:00
  • 261ba6db7e solmsg.py: Use existing i128event.py infrastructure for l3 injector code. terasa 2014-10-31 09:59:11 +00:00
  • 3ed64cfcd3 solomsg.py: Cosmetic change to pha reader. terasa 2014-10-30 13:30:40 +00:00
  • 9fa9f00f0d i128event.py: Cosmetic change to parser. terasa 2014-10-30 13:30:11 +00:00
  • 03d401e971 solomsg.py: Uses i128event.parse_stream to deduplicate parser code. terasa 2014-10-30 13:26:04 +00:00
  • c7ebb78fef i128event.py: Moved parser code to extra function, so that it can be used by other python modules. terasa 2014-10-30 13:25:03 +00:00
  • 44690d950d solomsg.py: inject_pha_from_file returns generator instead of list. terasa 2014-10-30 12:06:58 +00:00
  • d6dc21d424 solomsg.py: Read parsed PHA files and inject events into L3 processing buffer. terasa 2014-10-28 14:16:37 +00:00
  • c0516f996c solomsg.py: Added pha/l3 data injector. terasa 2014-10-28 13:24:05 +00:00
  • d2c28a7b04 aschedule: make sure din1 ... is gated by nCS asserted stephan 2014-10-27 15:47:08 +00:00
  • 7ee074ee26 heteptana em/v04: merge -c 3348,3361 from dig/em/v05, sermerge, unrelated code stephan 2014-10-27 13:36:21 +00:00
  • 6704b1e893 heteptana: merge -c 3317 from em/v03 stephan 2014-10-27 13:34:48 +00:00
  • bc82255841 heteptana em/v04: merge -c 3375 stephan 2014-10-27 13:30:02 +00:00
  • 7919e4c809 heteptdig timings: reduce ADC slack to 19ns stephan 2014-10-27 12:11:38 +00:00
  • 59056add13 HETEPTANA EM/V03: New bitfile (faster Place&Route) created kruse 2014-10-27 10:29:27 +00:00
  • d9979e02f0 heteptana em/v04: merge -c 3392: NO_BCHANNEL stephan 2014-10-27 10:16:02 +00:00
  • 829da3a843 heteptana em/v04: merge -c 3376,3390 remove TARGET_ACTEL from toplevel stephan 2014-10-27 10:13:22 +00:00
  • 226eb43863 heteptana: merge -c 3365-3366,3369: UNUSED pins stephan 2014-10-27 07:57:33 +00:00
  • ca965ed3d1 heteptana em/v04: copied from em/v03 purpose: build a version without B-channel stephan 2014-10-27 07:45:19 +00:00
  • c7b654f949 heteptana: add verilog config macro NO_BCHANNEL When this macro is defined, the B-channel data from the filter is ignored, and zeros used instead. The effect is that close to half the logic will optimize out. Let's try. stephan 2014-10-27 07:44:03 +00:00
  • b6874f9452 shaper2u2: checkin unsaved data from three days ago, uncompressed xml stephan 2014-10-27 07:38:06 +00:00
  • e8d94a979c hetept: Remove `ifdef TARGET_ACTEL from FPGA toplevel modules. Provide models for the Actel buffers in use. This version now properly models the interconnection of the FPGAs. stephan 2014-10-26 21:29:33 +00:00
  • 1d684d1c7d heteptdig: merge -c 3367,3368 from dig/em/v05 Add unused pins as outputs driven low. stephan 2014-10-26 14:08:31 +00:00
  • 04f4f82fcc heteptdig: merge -c 3361 from dig/em/v05 Add ARxDD register in the IO-pad. Add a mergable register in sermerge, to share with the deserializer, just in case. stephan 2014-10-26 14:02:18 +00:00
  • dfa21db131 heteptdig: merge -c 3367 from dig/em/v05 Add a 8-bit port to feed status bits to the status register all the way from the toplevel, and used one bit for EEPROM_BUSY. stephan 2014-10-26 13:51:18 +00:00
  • 0e5c2920c7 stein: annotated patch for -c 3385 stephan 2014-10-26 09:50:12 +00:00
  • 98a98f4c98 stein/tarena: major rewrite of stein_ix_acquire and others stephan 2014-10-26 02:02:56 +00:00
  • f47033ff27 stein: work towards moving registers into IO pads. stephan 2014-10-25 12:45:02 +00:00
  • daca648505 tarena: work towards moving registers into IO pads. stephan 2014-10-25 12:44:04 +00:00
  • 5170bf5f63 tarena: update run list stephan 2014-10-25 12:42:14 +00:00
  • f2e7d30323 hetept timing: fix mclk divider stephan 2014-10-25 12:41:37 +00:00
  • 9d31183ea8 heteptdig: lock timestamps to ms, add eeprom write/read stephan 2014-10-24 22:26:18 +00:00
  • 446a39d79b stein: complete -c 3360 stephan 2014-10-24 19:40:21 +00:00
  • 996c3d9ca9 heteptdig: simulate DPS config that actually finds some EPT hits. stephan 2014-10-24 18:54:08 +00:00
  • 6c351bd4ff shaper2u2: change sim dataproducts to actually find hits stephan 2014-10-24 14:42:01 +00:00
  • 9b7595503b heteptana: remove unused wires stephan 2014-10-24 14:41:04 +00:00
  • 8fd5cdfc56 hamming: remove unused wires stephan 2014-10-24 14:39:49 +00:00
  • 81364c2451 memport mem16ee: fix data mux/demux stephan 2014-10-24 14:30:04 +00:00
  • b89991ff7f acquire: fixed a bug (do not send e_done when nack); stein_test_jig: fixed some timing issues wetzel 2014-10-24 13:45:17 +00:00
  • a1a1e1063b HETEPTANA EM/V03: New bitfile with no floating pins created kruse 2014-10-24 12:11:18 +00:00
  • 83871d9075 HETEPTDIG: Correct rev number in bitfileSummary added kruse 2014-10-24 11:42:27 +00:00
  • 5d40e62446 HETEPTDIG EM/V05: New bitfile, floating inputs now grounded kruse 2014-10-24 11:23:33 +00:00
  • 91e10d220f heteptana em/v03: fix unused pin list stephan 2014-10-24 09:39:44 +00:00
  • 3fdc618fa1 heteptdig em/v05: pin 185 is used, after all, for inverted op-heater stephan 2014-10-24 09:34:50 +00:00
  • a50ef4bcc4 heteptdig em/v05: drive all unused pins to ground stephan 2014-10-23 17:11:32 +00:00
  • 71cf512b2c heteptana em/v03: fix name of unused pins stephan 2014-10-23 17:10:56 +00:00
  • abe3afeef9 heteptana em/v03: drive all unused pins to ground stephan 2014-10-23 16:55:14 +00:00
  • ba7c5c6726 memport mem16ee: fix swapped data bits stephan 2014-10-23 16:09:17 +00:00
  • e43be02469 solomsg: provide default msg() implementation stephan 2014-10-23 16:08:35 +00:00
  • 82d0fd42b9 HETEPTDIG EM/V05: Preliminary bitfile created kruse 2014-10-23 15:06:52 +00:00
  • 01bde1a39b heteptdig em/v05: add further registers in ARxD to ease srx.deser placement kruse 2014-10-23 15:05:01 +00:00
  • d45d1ddf82 stein: updated memasync16ee(sram) to new ports wetzel 2014-10-23 14:11:43 +00:00
  • e2aabae350 stein: extended test jig to cover most of the possible cases wetzel 2014-10-23 14:06:52 +00:00
  • 5df4210b9f stein_core: added messages for Simulation wetzel 2014-10-23 14:06:00 +00:00
  • 2cda34bbd7 heteptdig em/v05: add EEPROM_BUSY bit in status register 0 stephan 2014-10-23 13:52:06 +00:00