Stephan/solo_altera
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  • a7af5272fc hetep config: add log2 version of the nominal science data, for comparisson stephan 2013-11-22 18:27:02 +00:00
  • 144afd9006 hetept: ppss and dps config for initial tests w/ emulator stephan 2013-11-22 18:10:52 +00:00
  • 2debf1bed8 under construction - improvement of busy wetzel 2013-11-22 13:33:26 +00:00
  • 02c58afb8e modulus change synth stephan 2013-11-22 12:49:01 +00:00
  • 7b32f47119 modulus scheduler: 3-bit modulus-init stephan 2013-11-22 11:54:13 +00:00
  • 4cd77fc2dc backend: altera synth support for science data formats stephan 2013-11-21 18:32:14 +00:00
  • bd5364580f backend: add three data formats for unencoded science data stephan 2013-11-21 17:04:20 +00:00
  • 51eef32476 backend: unsigned float data products stephan 2013-11-21 00:28:27 +00:00
  • f1086a42d8 backend: log2 for data products stephan 2013-11-21 00:07:47 +00:00
  • 419149e48c itf parser: dp header, 3-bit stephan 2013-11-20 23:58:17 +00:00
  • fc4600aa00 dp encoder: do drop=0 for uncompressed data stephan 2013-11-20 23:57:22 +00:00
  • e8538786a0 backend: 8-bit DP header w/ fini and init modulus stephan 2013-11-20 23:56:24 +00:00
  • 051cff4fbd itf parser: parse memory dump, infrastructure for science data stephan 2013-11-20 18:27:50 +00:00
  • 40075c6678 icurc: hetept nominal data acquisition stephan 2013-11-20 18:26:25 +00:00
  • 3890acc279 icucore: parsed packet readout stephan 2013-11-20 18:25:16 +00:00
  • bd6c3e372f ppss: fix 0x0320 to avoid t_ collision with PHA stephan 2013-11-20 18:21:29 +00:00
  • 40bdcc370e further optimization of slow control wetzel 2013-11-20 17:35:45 +00:00
  • dd488494ba direna: configured for the Zugspitze stephan 2013-11-20 10:14:17 +00:00
  • d55cb76169 ppss: fix HK dp header, add op-heater, reduce cadence for HK stephan 2013-11-19 20:52:20 +00:00
  • 98592bb983 hetept spreadsheet: fix PPS, add high level python output stephan 2013-11-19 19:41:53 +00:00
  • fc54f183d7 arm: implement /fly/mes/flush using Tx_empty bit and altera_wait_for_stats stephan 2013-11-19 19:39:28 +00:00
  • cf56c93ac4 arm: add altera_wait_for_stats() stephan 2013-11-19 19:36:08 +00:00
  • d85038bd51 icucore: wire Tx_empty to stats[1] stephan 2013-11-19 10:06:35 +00:00
  • f5251e5d2d sirena pinout doc: stagger pin numbers in the table stephan 2013-11-19 07:36:40 +00:00
  • 4267d75640 backend doc: add frontend streaming flag stephan 2013-11-19 07:35:05 +00:00
  • 596d4eaecb shaper2u2: fix PPS schedule stephan 2013-11-18 21:24:36 +00:00
  • 6b8b96cba9 HETEPT spreadsheet: work on PPSS stephan 2013-11-18 20:09:59 +00:00
  • 26a25c00d9 icucore python: L3 disassembler stephan 2013-11-18 20:08:50 +00:00
  • 04e762d0d5 HET L3: enable PHA records in no_het.l3 stephan 2013-11-18 20:07:28 +00:00
  • 820c480ad5 hetept: enable ARxSTREAM stephan 2013-11-18 20:06:13 +00:00
  • a4815bf76c hetept: fix analog stream mode stephan 2013-11-18 20:03:22 +00:00
  • 342f5fd562 sirena avr: burn infrastructure stephan 2013-11-18 13:49:14 +00:00
  • dac531c77e sirena avr: merge spi_slave with Martins LCD code karnjit 2013-11-18 12:49:11 +00:00
  • 96840b8571 hetept: sim with analog streaming stephan 2013-11-18 07:32:36 +00:00
  • f1038004a0 hetept: add analog stream test mode stephan 2013-11-17 21:32:25 +00:00
  • 8d79926bc4 icucore: add analog stream deserializer stephan 2013-11-17 21:04:27 +00:00
  • edc879435a included idefx simulation model to slow control test jig and fixed some timing bugs wetzel 2013-11-17 18:45:08 +00:00
  • a83234e85e included idefx simulation model to slow control test jig wetzel 2013-11-17 18:44:35 +00:00
  • 0b1e637eb5 sirena: emulator pinout, fix chassis power shield stephan 2013-11-15 19:59:15 +00:00
  • bfe3243a77 sirena: emulator pinout stephan 2013-11-15 19:46:13 +00:00
  • ed3845b91b lib: header26 stephan 2013-11-15 18:41:39 +00:00
  • fbc53cab9e rpirena: add histogram output stephan 2013-11-15 18:38:31 +00:00
  • a064375f1c rpirena: cgi script stephan 2013-11-15 18:34:20 +00:00
  • f3128d2454 sirena: add message fifo, compatible with old arm code stephan 2013-11-15 18:30:43 +00:00
  • 7d04db13d0 rpirena: mark mV global stephan 2013-11-15 18:21:25 +00:00
  • ecf4e523c8 itf parser: fix stephan 2013-11-15 18:20:22 +00:00
  • 022b2b9775 redesign of slow control scheduler --- slow control module is no more included in scheduler wetzel 2013-11-15 15:55:37 +00:00
  • 38280032a4 ... wetzel 2013-11-15 15:54:07 +00:00
  • fcb7e00e7b updated the testjig to demonstrate the adc-controllers insensibility to invalid inputs wetzel 2013-11-15 15:53:45 +00:00
  • 09ad92c3c2 sirena: emulator harness mirrored pinout fix stephan 2013-11-15 09:08:25 +00:00
  • 97622aaf9c sirenacore: Altera build tweeks stephan 2013-11-15 09:03:45 +00:00
  • d555165ccd perpared redesign of slow control wetzel 2013-11-14 15:51:37 +00:00
  • 2a40694a27 inserted a comment for myself wetzel 2013-11-14 15:50:23 +00:00
  • 13bd9fed5b Changed some comments to makes notices for myself wetzel 2013-11-14 15:48:25 +00:00
  • ea695c613e hetept ppss: new flight pulse per second schedule stephan 2013-11-13 23:55:03 +00:00
  • a36cc39270 hetept dps: fix L1 config stephan 2013-11-13 18:20:34 +00:00
  • 6fa26104fa new diagram for wireing a sirena as sensor emulator stephan 2013-11-12 08:45:01 +00:00
  • e3ba719108 irena_core: fix ABT2F stephan 2013-11-10 22:16:24 +00:00
  • 08fc914a50 hetept dps: EPT nominal science stephan 2013-11-10 22:15:25 +00:00
  • 2bfa53065d hetept L3: ept trigger fixes stephan 2013-11-10 22:07:19 +00:00
  • 78944d7184 L3 mode: boilerplate stephan 2013-11-10 18:29:24 +00:00
  • fa36807966 L3: emacs mode for editing L3 code, derived from asm-mode.el stephan 2013-11-10 18:26:54 +00:00
  • 43622c3a66 L3: emacs mode for editing L3 code, this is asm-mode.el stephan 2013-11-10 18:26:22 +00:00
  • 0076ad9a5f rpirena: event streaming stephan 2013-11-08 23:07:46 +00:00
  • 666bfd5a44 irena_core: use MSB of A,B in peek stephan 2013-11-08 17:50:34 +00:00
  • c704784cbf rpirena: threshold float conversion stephan 2013-11-08 15:18:13 +00:00
  • f289dc3209 rpirena: python: fix HK addr stephan 2013-11-08 08:50:57 +00:00
  • 2f09728e97 rpirena: fix irena_core python support stephan 2013-11-07 21:27:02 +00:00
  • dfc6f83d00 rpirena: fix spidev segfault stephan 2013-11-07 21:26:34 +00:00
  • 9906a6d609 rpirena: irena_core support in rpirena.py stephan 2013-11-06 22:48:09 +00:00
  • 1f6cdf0574 rpirena: trigger LEDs stephan 2013-11-06 20:01:22 +00:00
  • 4dcf8446f4 rpirena: trigger LEDs stephan 2013-11-06 20:01:01 +00:00
  • a378e63ebe hetept: streaming mode analysis stephan 2013-11-06 19:59:32 +00:00
  • 5a7f500e0f rpirena: streaming spi transfer, packet parsing stephan 2013-11-04 22:53:14 +00:00
  • 7809533668 backend: wait states for register readback ports stephan 2013-11-03 15:49:51 +00:00
  • 43b5849830 heteptdig: update gold stephan 2013-11-03 14:35:06 +00:00
  • f2b4bf50c3 heteptcore: fix ARB regression stephan 2013-11-03 14:26:28 +00:00
  • 562dfa6f07 heteptdig datasheet: heater min/max dutycycle swapped stephan 2013-11-03 11:42:54 +00:00
  • 8d6eef948b direna: synth syntaxc fix stephan 2013-11-03 11:32:46 +00:00
  • 51d9dcbb83 adam: copy 9 preamp instances to complete the 18-channel board stephan 2013-11-01 11:28:15 +00:00
  • ba6091cbde crc: implement CRC Verification of Compliance from the TM-TC-ICD stephan 2013-10-30 22:53:24 +00:00
  • 67265f5982 adam: copy virena-preamps to adam-preamps stephan 2013-10-30 14:36:15 +00:00
  • c666c6c1bc rpirena: synthesis stephan 2013-10-29 23:09:08 +00:00
  • 9115313e1c rpirena: LED pwm stephan 2013-10-29 23:08:21 +00:00
  • aa45d9ee10 rpirena: reg() stephan 2013-10-29 23:07:32 +00:00
  • f61c310a67 Review for Issue 1 of the heteptdig datasheet stephan 2013-10-29 12:13:28 +00:00
  • af693310f6 heteptdig em: merge -c2263 fix addr flag collision stephan 2013-10-28 21:59:46 +00:00
  • 115c4abe6e invert truncdiff stephan 2013-10-28 21:54:47 +00:00
  • 60239d1e98 heteptdig em: merge r2264: fix ARB w/o telemetry stephan 2013-10-28 21:54:01 +00:00
  • 7ae8763cb7 heteptcore: fix ARB without telemetry stephan 2013-10-28 21:44:59 +00:00
  • 8deafa220a backend: flag collision for byte aligned data product header stephan 2013-10-28 21:42:33 +00:00
  • fb9828f0dd hetept ppsc: fix L2 trigger with mask stephan 2013-10-28 21:40:56 +00:00
  • 0d53bd3c40 rpirena: implement and use irena_core, direna filter with flyrena trigger stephan 2013-10-28 00:30:57 +00:00
  • 551e56ceeb direna ADC channel: add outputs for flyrena trigger update port syntax add parameter for number of channels use generate stephan 2013-10-28 00:30:03 +00:00
  • 8f9157daa6 direna_test: change timescale `ifdef main module to use mega models. stephan 2013-10-28 00:28:09 +00:00
  • 908cc051f4 direna filter: rename module to dfilter expand float output to 18 bits. update port syntax stephan 2013-10-28 00:26:11 +00:00
  • 57ecaaab3c flyrena sfilter: add NT parameter for number of L2 triggers allow alternative implementations of ABTto32 fix bug in samples timestamp emission stephan 2013-10-28 00:23:34 +00:00
  • f7cd854e94 pulser sim: fix start value stephan 2013-10-28 00:20:46 +00:00
  • 9d08ca646a RPiRENA: add hkadc stephan 2013-10-27 09:44:50 +00:00
  • 76a287bda1 RPiRENA: swap HnCS and HSCLK pins stephan 2013-10-27 09:44:04 +00:00