Stephan/solo_altera
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  • 04bb4377a6 bom.py: more characters for the value column stephan 2013-09-13 18:01:17 +00:00
  • 37bef4879b cospi: select diode types stephan 2013-09-13 17:57:50 +00:00
  • bf0887dd86 cospi: add second sepic capacitor stephan 2013-09-13 11:09:43 +00:00
  • daf7e1d3c8 cospi: decrease board size cutout for eth and usb connector clearance, bigger mounting holes. stephan 2013-09-13 07:24:09 +00:00
  • 6fd3b07bf1 cospi: gerbv stephan 2013-09-12 23:00:13 +00:00
  • 4d31c39fee cospi: fix some old schematics, add netnames stephan 2013-09-12 22:42:49 +00:00
  • e912a2bcde cospi: layout finished stephan 2013-09-12 22:41:42 +00:00
  • 3611aa2ae6 cospi: refdes positioned stephan 2013-09-12 00:29:30 +00:00
  • f9c0f74bfb cospi: complete and almost DRC clean, next: refdes placement stephan 2013-09-11 23:54:41 +00:00
  • 9c85097ec6 cospi: add sepic converter w/o common mode filter stephan 2013-09-11 19:21:32 +00:00
  • f05d4c16d5 cospi: add proj file stephan 2013-09-11 18:07:24 +00:00
  • fd356e6eaa pcb footprint: 10mm diameter core with 4 coils stephan 2013-09-11 18:05:24 +00:00
  • fb0d5f084c layout complete, XB/* strangely missing from netlist stephan 2013-09-11 18:04:17 +00:00
  • 1c3c9a4ae8 cospi: draw ADC 3.3V directly from +5V stephan 2013-09-10 16:15:57 +00:00
  • d5bbbf6ce0 added libero project and constraint files for heteptana kruse 2013-09-10 08:52:15 +00:00
  • e1094a8779 added libero project and constraint files kruse 2013-09-10 08:46:24 +00:00
  • c7da91ea92 cospi: half way through placement stephan 2013-09-10 01:01:46 +00:00
  • 7d83e292a7 cospi.sch: P1 images stephan 2013-09-09 18:35:15 +00:00
  • d7e6c2de43 cospi.sch: most parts are thrown in, now sort them out stephan 2013-09-09 18:33:43 +00:00
  • 3d1098b004 heteptdig: v01: gold stephan 2013-09-09 09:19:55 +00:00
  • cc90e0a2d4 v01: heteptdig.v: merge r2125: add TxE, change nWE, nCE bit order stephan 2013-09-09 07:14:43 +00:00
  • d59a79c57f v01: fifo.v: merge r2125: fix swapped EDAC flags stephan 2013-09-09 07:11:07 +00:00
  • ab9164e26d v01: fifo.v: merge r2125: fix swapped EDAC flags stephan 2013-09-09 07:10:38 +00:00
  • f0b2f21d02 v01: counters.v: merge r2124 stephan 2013-09-09 07:06:41 +00:00
  • 24d351999d v01: l3code: merge r2125 stephan 2013-09-09 07:05:05 +00:00
  • 985035be6b heteptdig v01 FPGA branch stephan 2013-09-09 06:43:40 +00:00
  • eafdfeb95e heteptdig: gold for a couple of SEU stephan 2013-09-08 22:45:43 +00:00
  • 901e83f531 cospi: Cosmics with a Raspberry Pi stephan 2013-09-08 22:31:04 +00:00
  • ead3fd6365 l3code: fix EDAC scrubbing in case ra==wa other minor fixes stephan 2013-09-08 20:47:21 +00:00
  • 901c2d792a backend counters: fix SEU flags stephan 2013-09-08 20:46:42 +00:00
  • e44aaaa3b8 heteptcore: abort pending ARB stephan 2013-09-08 20:45:42 +00:00
  • cb8df45e93 RAM64K36 SEU: reduce SEU rate by 1000 stephan 2013-09-08 20:44:25 +00:00
  • 01405b8e48 heteptdig: turn on SEU in internal RAMS stephan 2013-09-08 08:33:57 +00:00
  • 0cfa3a6200 L3: remove old cruft stephan 2013-09-06 12:21:46 +00:00
  • 9ce0679c07 heteptana v01: simulate with RTAX SRAM models The mission SEU $random causes different analog waveforms. stephan 2013-09-06 08:45:34 +00:00
  • 9418bf5b24 heteptdig doc: add lvds35 drawing stephan 2013-09-06 08:39:22 +00:00
  • e985545fcf gtkwave for heteptana stephan 2013-09-06 07:39:38 +00:00
  • 095ed0dcc9 fix sim schedule to avoid collisions, gold stephan 2013-09-06 07:31:16 +00:00
  • 5481681cc1 fix sim schedule to avoid collisions stephan 2013-09-06 07:22:11 +00:00
  • 9cb3e6fbf6 add packet word counters to sim log output stephan 2013-09-06 07:09:34 +00:00
  • f0156f99fa add gafrc stephan 2013-09-05 21:14:58 +00:00
  • 40022ac670 inv-2 and other old symbols stephan 2013-09-05 21:14:16 +00:00
  • 1bff2f5496 heteptana v01 FPGA branch new testjig heteptana_test.v Altera synthesis setup stephan 2013-09-05 14:54:50 +00:00
  • cded4abdbe uart, pwm stephan 2013-09-04 22:40:08 +00:00
  • 8ace01d28e serial io stephan 2013-09-04 11:54:15 +00:00
  • 611fd809f2 syntax fixes stephan 2013-09-04 09:25:34 +00:00
  • 066057d858 change HK 503 to measure +6V stephan 2013-09-04 09:24:44 +00:00
  • 4ff2bff5cc fix EEPROM timing for 250ns access time stephan 2013-09-04 09:23:22 +00:00
  • 88f31edb07 xclk input is single ended stephan 2013-09-04 09:21:25 +00:00
  • d13caf3243 encoding stephan 2013-09-03 22:54:51 +00:00
  • 783fb27a2a fixes from Mondays review stephan 2013-09-03 18:27:15 +00:00
  • e00f339eee HK channel 503 measures +6V/2 stephan 2013-09-03 13:21:02 +00:00
  • 1eb2ae44cd add rule for .S files sie 2013-09-03 08:28:49 +00:00
  • 93036599ba HET/EPT configurabe event class stephan 2013-09-02 21:53:51 +00:00
  • 08c6e208ae test data injection stephan 2013-09-02 21:52:58 +00:00
  • f4aa227fdb debugging heteptdig sim stephan 2013-09-02 16:53:53 +00:00
  • 26b5d316be change temp bias res to 33k stephan 2013-09-02 16:53:24 +00:00
  • 669368b877 heteptdig block diagram stephan 2013-09-02 16:52:43 +00:00
  • c8f4097db0 fix index typo stephan 2013-09-02 16:51:43 +00:00
  • 60e8a63c10 fix syntax stephan 2013-09-02 16:50:52 +00:00
  • 5bf72c0b84 support 16bit RAM in sim, fix pps freq stephan 2013-09-02 16:49:54 +00:00
  • 3fd62b42f8 add fields to rb_data[2] stephan 2013-09-02 16:47:11 +00:00
  • 306c7bb520 The flight EEPROM needs 15 ms for a page write stephan 2013-09-02 16:45:45 +00:00
  • 6ac7faed8c add TODO, flight EEPROM timing stephan 2013-09-02 16:44:57 +00:00
  • 479ece4a6f retire a TODO stephan 2013-09-02 16:44:12 +00:00
  • 5f02d7cf50 packed samples stephan 2013-09-02 11:22:13 +00:00
  • 4ac3aa3173 packed sample packets opheater parameter readout SPIPE serial master states tranfer cadence parameter stephan 2013-09-01 21:37:58 +00:00
  • 434a93521e add a lot of sections stephan 2013-09-01 21:35:45 +00:00
  • 0697d4e55f be a little more explizit when we want we stephan 2013-09-01 21:33:58 +00:00
  • 280f056920 configure HK bias, add R507, adjust C1 refdes, move bias trace stephan 2013-08-30 16:03:50 +00:00
  • 073f0d2509 shaper C1 footprint 0805, updated partslist using C1=2.7nF for EPT stephan 2013-08-30 14:35:10 +00:00
  • 0ed7010328 extended test-jig of frontend wetzel 2013-08-30 10:55:03 +00:00
  • 2cbcd61aa4 updated Makefile to new dependencies wetzel 2013-08-30 10:53:09 +00:00
  • f1f1349f2b more telemetry stephan 2013-08-29 22:18:22 +00:00
  • 97391fa9cc serial packet formats stephan 2013-08-29 16:07:18 +00:00
  • 143e467b86 flyrena gold, lots of change :-( stephan 2013-08-29 14:07:17 +00:00
  • faa3ca35c0 memories readout stephan 2013-08-29 11:05:03 +00:00
  • aec8735e21 minor fixes stephan 2013-08-28 21:19:05 +00:00
  • 7982bbc76d ... dps stephan 2013-08-28 15:40:17 +00:00
  • eed97cf6f7 ADC output mode fix, reconfig after reset in ADCid() stephan 2013-08-28 09:17:11 +00:00
  • 3e9fe836ae move ADC config to end of ERENA.RC, with extra sleep stephan 2013-08-28 09:06:12 +00:00
  • b3282cdf7b add more delay between ADC reg writes stephan 2013-08-28 08:55:51 +00:00
  • 096a995c72 add delay between ADC reg writes stephan 2013-08-28 08:50:02 +00:00
  • 6d74fb6dd2 copy sim driver from flyrena stephan 2013-08-27 19:23:39 +00:00
  • b985905131 heteptdig synth stephan 2013-08-27 19:22:56 +00:00
  • c467e96885 avoid size mismatch warning stephan 2013-08-27 19:22:09 +00:00
  • da3fc75d96 fix data_gap, avoid unsized constants > 32 bits stephan 2013-08-27 19:21:18 +00:00
  • 46efbe4da5 document buggy usage of tfifo stephan 2013-08-27 19:20:11 +00:00
  • 87dadaf2a2 flyrena synth stephan 2013-08-27 19:19:32 +00:00
  • 6bd3ea0796 wire up OP heater, move samples to end of sim stephan 2013-08-27 19:18:31 +00:00
  • 2417dd28c3 build ix-controller and frontend + testjig (nearly empty so far), slow control scheduler has now reg containing the sc regs wetzel 2013-08-27 15:50:43 +00:00
  • 5a39f7bf5b t_busy waveforms stephan 2013-08-27 11:00:12 +00:00
  • dda668d7b9 add tele bits to data products, so we get some output stephan 2013-08-27 10:51:07 +00:00
  • a78a78ac7c fix t_busy gap before tx_crc stephan 2013-08-27 10:46:45 +00:00
  • 7276738f32 fix win_busy for case nx==0, ny==0 stephan 2013-08-27 10:44:36 +00:00
  • 9e10fc3c9b various critical fixes of the tfifo stephan 2013-08-27 00:33:28 +00:00
  • cd2e4114c7 fix ARB packet size, SC as ufloat16 stephan 2013-08-26 18:49:53 +00:00
  • f2fdd74006 add operation heater controller stephan 2013-08-26 18:48:11 +00:00
  • 14f8d969d1 single channel counters as ufloat16 stephan 2013-08-26 18:47:11 +00:00
  • 7ee271d84b fix rdd port to regain ARB stephan 2013-08-26 18:44:56 +00:00