Commit graph

  • 9437f92995 single channel trigger counters stephan 2013-08-25 23:36:23 +00:00
  • d5ccaefbbf Race free counter read and clear stephan 2013-08-25 23:10:07 +00:00
  • 42dc019823 gold for fixed l3_e[T], t_test CRC check stephan 2013-08-25 21:15:54 +00:00
  • 6a48fb99f0 strange change of CRC stephan 2013-08-25 21:14:44 +00:00
  • 8ede5bea53 fix e_l3 T field stephan 2013-08-25 20:20:13 +00:00
  • 8685379eea fix tfifo send tining, wait for ~push add crc check to t_test, remove clk port stephan 2013-08-25 20:19:08 +00:00
  • 0c1c0a56f2 working on ix module - not finished yet, not compileable wetzel 2013-08-25 11:34:21 +00:00
  • 20c97cabf9 implement packet pipeline in tfifo, for L2 streaming stephan 2013-08-23 19:16:11 +00:00
  • c9ecce9930 startet building the ix-module - not finished, not compileable wetzel 2013-08-23 16:19:39 +00:00
  • 4929d5c507 ipreamps checkout scripts stephan 2013-08-23 08:19:58 +00:00
  • 6eaf78dd72 6 layer ipreamps board stephan 2013-08-23 07:46:37 +00:00
  • 2640ada6e1 add tf_busy, for L2 streaming throttle stephan 2013-08-22 21:47:04 +00:00
  • 3b32d759e8 redesign of temp - temp now handles one idef-x and one temperature wetzel 2013-08-22 20:46:02 +00:00
  • 2677e69a67 sc now handles both idef-x wetzel 2013-08-22 15:11:30 +00:00
  • f4238bd076 simplified an expression wetzel 2013-08-22 14:30:34 +00:00
  • 8843ad6f39 eptpreamps v02a, this time with chassis ground plane stephan 2013-08-22 13:46:13 +00:00
  • 1b0566b2f7 definded parameters for barrel and prio_encoder wetzel 2013-08-22 13:42:09 +00:00
  • 73823cbdde ix_reset now can handle two idef-x seperately wetzel 2013-08-22 13:40:10 +00:00
  • f0ebd611cc redesign of temp No x - not finished yet wetzel 2013-08-21 20:56:25 +00:00
  • f60418c1e7 flyrena testjig excersizes L2 streaming stephan 2013-08-21 19:16:13 +00:00
  • 052101405c project ipreamps, copied from hama-preamp stephan 2013-08-21 16:58:30 +00:00
  • 58b5daf032 flyrena gold with L2 trigger counters counting stephan 2013-08-21 15:40:53 +00:00
  • f034f790de capture samples readout, add L2 streaming mode stephan 2013-08-21 15:39:58 +00:00
  • 32513cb741 add ports for unused backend counters stephan 2013-08-21 15:38:57 +00:00
  • 69f03441aa ... wetzel 2013-08-20 23:24:59 +00:00
  • 9519196ee3 ... wetzel 2013-08-20 15:22:27 +00:00
  • 65f0417fc9 redesign of adc_controller wetzel 2013-08-20 14:50:02 +00:00
  • f918581bef flyrena gold with packed HK stephan 2013-08-20 12:02:49 +00:00
  • fa78a856b9 adjust sim for packed HK stephan 2013-08-20 10:27:44 +00:00
  • 663006ebe5 fix ADC reset and rd idle level stephan 2013-08-20 10:26:24 +00:00
  • 0c54d39dc7 retire TODO stephan 2013-08-20 10:25:47 +00:00
  • cfcdb66c65 fix EDAC error bits stephan 2013-08-20 10:25:25 +00:00
  • c3fb17a4d6 ... wetzel 2013-08-19 21:58:04 +00:00
  • 88f3342713 incomplete attempt to optionally pack HK readings stephan 2013-08-19 20:10:00 +00:00
  • edb0721674 use generic itouf stephan 2013-08-19 20:09:20 +00:00
  • 9ebbf022c7 ... wetzel 2013-08-19 17:34:54 +00:00
  • c05a14706a ... wetzel 2013-08-19 08:30:24 +00:00
  • 05523759af revert breakage of -r 2012 stephan 2013-08-19 07:32:04 +00:00
  • a9a0088754 flyrena sim without know issues, 48 MHz stephan 2013-08-18 22:41:24 +00:00
  • 868dced6b8 complete the X avoidance for EDAC errors stephan 2013-08-18 22:40:49 +00:00
  • d18e279192 prevent tick right after pps stephan 2013-08-18 20:39:22 +00:00
  • 68da823bdf avoid X values for EDAC errors stephan 2013-08-18 20:38:20 +00:00
  • 1facb8106a fix e_class counters add telemetry fifo port for the frontend stephan 2013-08-18 20:36:10 +00:00
  • 1f1f799c80 limit peek data to the available channel data stephan 2013-08-18 20:34:36 +00:00
  • 18e0b2e091 fix arb_to_t, it was non-functional stephan 2013-08-18 20:33:13 +00:00
  • 1cd7039117 list TODOs before vvp compile stephan 2013-08-18 20:31:39 +00:00
  • 5b0a5389ee just another redesign of ix_temp wetzel 2013-08-18 15:26:39 +00:00
  • 358838efd4 more simulation output stephan 2013-08-17 13:30:14 +00:00
  • 28faa9566e l3 and pha now parse sparse frontend packets stephan 2013-08-17 13:29:37 +00:00
  • 244e886650 changed interface of sc and the corresponding modules wetzel 2013-08-16 15:17:04 +00:00
  • 71046e2317 updated addr for STEP wetzel 2013-08-16 15:14:44 +00:00
  • 6a495f6862 port heteptana to L2 mask events stephan 2013-08-16 12:41:51 +00:00
  • d1426a18cb readout all channels for random triggers stephan 2013-08-16 11:55:37 +00:00
  • 69673b82a5 ... wetzel 2013-08-15 19:45:40 +00:00
  • 6a52992b71 ... wetzel 2013-08-15 19:30:33 +00:00
  • 784333f542 slow_control can now load data an start seperatly, which is needed by the message concept wetzel 2013-08-15 19:18:55 +00:00
  • 740c129971 removed a notice wetzel 2013-08-15 19:17:31 +00:00
  • 1ef48d03a7 build sc_write, sc_read and temperature_update wetzel 2013-08-15 19:16:55 +00:00
  • d93580e21a added stein_frontend.v wetzel 2013-08-15 19:14:59 +00:00
  • 4e3bb009e7 test with sparse mask, gold file stephan 2013-08-15 16:43:50 +00:00
  • f93b14355c test L2 masked readout with sparse L2 masks stephan 2013-08-15 16:20:31 +00:00
  • fd66654198 add HET frontend message addresses stephan 2013-08-15 15:01:40 +00:00
  • 9896058681 dranbuf uses L2 mask stephan 2013-08-15 14:07:24 +00:00
  • b91deac2f1 ... wetzel 2013-08-15 11:46:02 +00:00
  • 4420ff06cb L2 trigger with mask stephan 2013-08-15 11:22:38 +00:00
  • eb8e2b1b5b changed definition for Add of SCread, HK read and idef-x temp update wetzel 2013-08-15 11:02:37 +00:00
  • 64a6c5ad11 inserted address for idef-x temperature update wetzel 2013-08-15 10:57:04 +00:00
  • 2578a92c42 moved hk, sc_read, sc_write and temp_update from stein to stein_backend wetzel 2013-08-15 10:29:08 +00:00
  • 8fabadb1f9 fix memasync16ee connections stephan 2013-08-15 10:20:11 +00:00
  • acab3e8a08 fix dranbuf timing for L2 with mask fix filter_test and flyrena tests for new L2 config save flyrena.gold as baseline for future changes stephan 2013-08-14 22:49:16 +00:00
  • e01685ce29 add mask to hetept L2 trigger stephan 2013-08-14 16:15:51 +00:00
  • 17efdf29a6 ... wetzel 2013-08-14 15:30:41 +00:00
  • 2f911fbc62 renamend steindig module to stein_backend wetzel 2013-08-14 13:31:31 +00:00
  • 9424fb4732 hk now waits till a requestet channel is ready wetzel 2013-08-14 13:09:54 +00:00
  • 325717afa8 wait for flash read complete before send, for mode 2 programming stephan 2013-08-14 11:40:08 +00:00
  • 26d780218f SPI DONGLE for STEIN, Python driver stephan 2013-08-14 11:04:14 +00:00
  • 89c5b5011f inserted simualation declaration wetzel 2013-08-13 16:27:02 +00:00
  • b662f3abed revertet to older version wetzel 2013-08-13 16:18:58 +00:00
  • 3584b270b6 fix pin assignments of EM SRAM/EEPROM stephan 2013-08-13 15:33:49 +00:00
  • 6ce8521876 initial test version of SPI_DONGLE stephan 2013-08-13 15:04:24 +00:00
  • 2430663ef5 split of old hk into new modules wetzel 2013-08-13 15:02:16 +00:00
  • ba07e9a7fb redesign temp module wetzel 2013-08-13 15:01:17 +00:00
  • 58af81ccae move module aschedule from irena to library stephan 2013-08-12 19:23:52 +00:00
  • 73a998be22 allocate STEIN message addresses stephan 2013-08-12 15:16:53 +00:00
  • 3c2c0a860c fix syntax errors stephan 2013-08-12 15:16:27 +00:00
  • b5dc83ce32 move ADC128S102 model into the general library stephan 2013-08-12 15:16:02 +00:00
  • 9b41b394ff preparing ix-module wetzel 2013-08-12 10:35:54 +00:00
  • 461fce5b62 ... wetzel 2013-08-09 13:27:09 +00:00
  • c4b6499667 ... wetzel 2013-08-09 12:59:21 +00:00
  • d8e56a4ce7 ... wetzel 2013-08-08 17:16:07 +00:00
  • f3961fe4a6 ... wetzel 2013-08-08 17:10:02 +00:00
  • e1b26dd8bb bug fixing wetzel 2013-08-07 17:03:09 +00:00
  • fb60e74067 last file buggy wetzel 2013-08-07 12:33:56 +00:00
  • a603c7cf84 ... wetzel 2013-08-07 10:47:24 +00:00
  • 0461d84f88 ... wetzel 2013-08-06 15:54:24 +00:00
  • d9dc5ac9d2 ... wetzel 2013-08-06 15:39:25 +00:00
  • 5dd5a8b504 ... wetzel 2013-08-06 15:12:52 +00:00
  • 4506e4c9e0 no further need to give the amount of bits of starting register to the scheduler wetzel 2013-08-06 14:24:17 +00:00
  • d11887babf ... wetzel 2013-08-06 13:02:03 +00:00
  • 3c139becc9 expanded functionality: temperature module can now read temp of both idef-x wetzel 2013-08-06 12:34:54 +00:00