Commit graph

  • 8d042ffa85 l3.py gains .forward stephan 2013-05-08 17:25:05 +00:00
  • 4a3c600bcb More freed (libero-)space kruse 2013-05-08 12:17:46 +00:00
  • ce172e6a1e Really fix heteptana ARx vs ATX confusion stephan 2013-05-08 11:28:16 +00:00
  • d377c1230c more freed space kruse 2013-05-08 10:14:03 +00:00
  • 552729edc3 Minor changes and freed space kruse 2013-05-08 10:12:02 +00:00
  • a768ea1449 Added gtkw for stein_ix_controller wetzel 2013-05-06 15:42:43 +00:00
  • 569e817ffd added stein_adc_controller wetzel 2013-05-06 15:36:16 +00:00
  • 591fc93710 fixed little bug (data_sampled) and updated SIM wetzel 2013-05-06 15:35:42 +00:00
  • f5bc84f45b under construction wetzel 2013-05-06 15:33:39 +00:00
  • c93a41d2af L3 integrated into backend_test, pha non-functional ... stephan 2013-05-06 15:08:18 +00:00
  • 14bb9b7675 rename vcd/ to lxt/ stephan 2013-05-03 13:30:27 +00:00
  • 160c02ba94 Add Makefile rules for acquire Fix for iverilog 0.9 Eliminate dead simulation loop stephan 2013-05-03 13:13:44 +00:00
  • a6608ecc76 under construction wetzel 2013-05-03 12:10:52 +00:00
  • d3899be626 eliminate some of the race conditions in the testjig stephan 2013-05-03 12:03:07 +00:00
  • 988520b82b still under construction wetzel 2013-05-03 11:43:15 +00:00
  • 347b9cc1e2 l3.py: .include directive l3.py: -O recursive option parser test.l3: L3 test code for backend_test stephan 2013-05-02 16:45:32 +00:00
  • 11e1b70eed libero project files updated kruse 2013-05-02 13:59:12 +00:00
  • 7797152f83 Added initial libero project files kruse 2013-05-02 12:44:29 +00:00
  • 7aa64e486a added output for sum of pixels hit, untested wetzel 2013-04-30 16:03:09 +00:00
  • b588982a6c under construction wetzel 2013-04-30 16:01:39 +00:00
  • 78d1f074f4 under construction wetzel 2013-04-30 16:01:13 +00:00
  • d972202d0d under construction wetzel 2013-04-30 15:58:48 +00:00
  • d0ee5ff75e Add interface for PHA record formatting. stephan 2013-04-28 21:22:55 +00:00
  • c7a4a1b82b Verilog chapter stephan 2013-04-27 22:45:00 +00:00
  • 411df1b0e4 update date string stephan 2013-04-25 14:33:31 +00:00
  • 16afeef642 FPGA section, unfinished stephan 2013-04-24 21:47:06 +00:00
  • 9ca2d208c5 HK input filter now 0805 stephan 2013-04-24 18:51:25 +00:00
  • 1471526ac8 HK ADC blocking caps now 0805 stephan 2013-04-24 17:28:41 +00:00
  • b8744b9535 ADC blocking caps now 0805 stephan 2013-04-24 17:05:49 +00:00
  • 0d5dff4fb2 fix PNP transistor name for flight part stephan 2013-04-24 17:03:58 +00:00
  • aa30fd9ba3 correct omnetics connector orientation stephan 2013-04-24 09:48:44 +00:00
  • 9f5d4c8a1c shaper blocking caps now 0805 stephan 2013-04-24 09:35:55 +00:00
  • 58227960ca use 0805 fottprints for shaper blocking caps stephan 2013-04-23 21:19:15 +00:00
  • 0a12417a96 venting hole, move PS Altera config to top side stephan 2013-04-22 16:24:30 +00:00
  • 971f62c5cf yet another CNC32 footprint stephan 2013-04-22 15:59:01 +00:00
  • 10a24be2b5 Frame on both sides long FPGA pads stephan 2013-04-22 15:58:25 +00:00
  • 8aa69121a6 eptpreamps v02 ready for submission, review? stephan 2013-04-22 07:47:42 +00:00
  • 45a57dfc10 the shaper transfer function stephan 2013-04-21 13:27:38 +00:00
  • 38585e463f Diodes and CNC32PE stephan 2013-04-19 21:54:54 +00:00
  • e426a60f42 ept preamps: housing clearance improved 1009 vias for S-lead mounting CNC32 footprint in schematic tantal value change remove LT integrated LDO stephan 2013-04-19 20:28:39 +00:00
  • 500c639a58 package for submission stephan 2013-04-19 18:48:48 +00:00
  • e257e89813 fix shaper transfer function stephan 2013-04-17 21:32:43 +00:00
  • 243326e7f1 add stereo DNL stephan 2013-04-17 19:25:52 +00:00
  • 25fe29731c ADC section stephan 2013-04-17 19:10:17 +00:00
  • b880b089df symbol missimg on sdshield stephan 2013-04-10 20:20:14 +00:00
  • 2e61893267 change master tex jobname stephan 2013-04-10 20:04:17 +00:00
  • 2be9516b5f fix shaper gain definition stephan 2013-04-08 21:22:18 +00:00
  • 08374c7674 shaper section stephan 2013-04-08 21:19:45 +00:00
  • e936fc6999 shaper section stephan 2013-04-08 21:18:07 +00:00
  • c50b90a8aa add 27mm solder keepout ringon silk layer stephan 2013-04-08 12:41:50 +00:00
  • 403ba585d6 EPT connector procedure, typo fixed, baging stephan 2013-03-22 12:59:42 +00:00
  • b63ba0592b EPT connector procedure stephan 2013-03-22 12:47:03 +00:00
  • 9e3ae787a0 Idef-X assembly stephan 2013-03-21 16:00:28 +00:00
  • a794442cea refer to properly named drill file stephan 2013-03-20 21:21:10 +00:00
  • 6675abbc6f copy of drillfile with proper basename stephan 2013-03-20 21:20:21 +00:00
  • be39aafbfa add teardrops to Idef-X carrier stephan 2013-03-20 21:17:35 +00:00
  • 1b3be906ac add teardrops to EPT carrier stephan 2013-03-20 21:02:09 +00:00
  • 8a870fd0ae HET-B Invar clearance to inner edge fixed: 0.5mm stephan 2013-03-20 20:57:45 +00:00
  • f9f23636d7 HET-A Invar clearance to inner edge fixed: 0.5mm stephan 2013-03-20 20:53:08 +00:00
  • 6b16e12bb6 small simplification suggetsted by Moritz stephan 2013-03-20 20:42:27 +00:00
  • 84f9ce6b12 Reduce total thickness to 0.8mm. Add Invar option description. stephan 2013-03-16 21:23:29 +00:00
  • 85a5011fd8 Add Markings section stephan 2013-03-16 21:22:35 +00:00
  • 7609c0dece Add thermals to Coax shield vias on Invar layer stephan 2013-03-16 21:21:52 +00:00
  • 21266bd60b Invar option description stephan 2013-03-16 21:20:32 +00:00
  • a0b44d322a Add missing connections to VDDD and S_T1_xxx stephan 2013-03-16 20:45:39 +00:00
  • b6c9403095 Fix some line ends to support teardrops stephan 2013-03-16 20:20:27 +00:00
  • d58893b351 Add thermals on invar for inner GND vias stephan 2013-03-16 20:06:54 +00:00
  • 454f77a159 add SN location stephan 2013-03-16 20:00:48 +00:00
  • c7f4260e7d remove copy of symbols that were moved to lib stephan 2013-03-16 13:19:01 +00:00
  • fb96955773 fix some backend connectivity stephan 2013-03-15 15:15:03 +00:00
  • b325b9e1e4 add spi plugin board with with cutout for lower mounting position stephan 2013-03-15 15:14:15 +00:00
  • 3c42613ca5 add invar layers to README stephan 2013-03-15 15:13:11 +00:00
  • c5523e963c add Saclay CARTE_ASIC board stephan 2013-03-15 15:12:12 +00:00
  • e4855e3957 invar layers in gerbv stephan 2013-03-15 11:50:03 +00:00
  • 1514e941fb add invar layer to HETA stephan 2013-03-15 11:45:57 +00:00
  • e95ce04b66 add markings stephan 2013-03-15 11:35:40 +00:00
  • d4d1cd1168 add invar layer to HETB stephan 2013-03-15 11:25:21 +00:00
  • e874256e8e fix old TBCs stephan 2013-03-15 11:13:35 +00:00
  • 9cfa331ed5 fix old TBCs stephan 2013-03-15 11:13:32 +00:00
  • b22c948727 serial number label added stephan 2013-03-15 09:11:41 +00:00
  • 70ba4b4f42 cover layer overlap with rigid reduced to 2mm, stub extended stephan 2013-03-15 09:08:08 +00:00
  • 1aad05e00d Add invar layer. stephan 2013-03-15 08:45:33 +00:00
  • 66925df6be fix hole pin numbers stephan 2013-03-14 09:16:36 +00:00
  • 28bd2399b3 fix CONN1 refdes stephan 2013-03-13 21:34:59 +00:00
  • a46b89d565 sdshield with correct pinout stephan 2013-03-13 21:28:35 +00:00
  • f1e66fc184 sdshield with wrong SD pinout stephan 2013-03-13 16:50:29 +00:00
  • 21f6761639 update gtkwave stephan 2013-03-13 11:28:28 +00:00
  • e3863b1c00 todo list stephan 2013-03-13 11:27:49 +00:00
  • 5e174ad9e6 remove unused nets flagged by ACTEL synth warnings stephan 2013-03-13 11:27:01 +00:00
  • 69066addc7 add register to l3code_edac stephan 2013-03-13 11:26:16 +00:00
  • 0fcc2bc219 flyrena with l3 and compression stephan 2013-03-13 11:25:04 +00:00
  • eeb228efe5 fix some SRAM/EEPROM connectivity bugs, ft_* bugs stephan 2013-03-13 11:24:35 +00:00
  • 6739316d88 implement l3 BRNG instruction stephan 2013-03-12 20:12:20 +00:00
  • 9913c01049 add BRNG instruction stephan 2013-03-12 19:45:15 +00:00
  • b44f8deb74 fix width warning stephan 2013-03-12 19:44:42 +00:00
  • 103e523973 fix e_pha bug for i128 stephan 2013-03-12 19:44:10 +00:00
  • 534df621f1 l3c MULI floating point syntax stephan 2013-03-12 08:29:42 +00:00
  • e64db6c9af add het l3 code source stephan 2013-03-12 06:58:52 +00:00
  • 4af89c5ba6 ... wetzel 2013-03-11 12:47:40 +00:00
  • 031f0b9141 L3 assember stephan 2013-03-10 22:08:11 +00:00