Stephan/solo_altera
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  • 2bb37d90d2 move config commands to erena.py, add dumpcoeff() stephan 2013-01-09 22:56:00 +00:00
  • 50261c439c enable() resets the epipe stephan 2013-01-09 21:19:19 +00:00
  • 172513de52 add erenarc, because it contains importatnt code stephan 2013-01-09 21:18:12 +00:00
  • 3f59e3ced6 move countbits.v to library stephan 2013-01-09 13:42:40 +00:00
  • c4c14d6cc0 replace bitcount by countbits stephan 2013-01-09 13:41:37 +00:00
  • 34aaffc874 fix sample, two channels stephan 2013-01-08 20:44:50 +00:00
  • 9108952757 add epipe.c stephan 2013-01-08 20:38:03 +00:00
  • 408a2b29aa allow 15-bit y-windows stride stephan 2013-01-08 19:57:33 +00:00
  • f117a376a1 fix enable() stephan 2013-01-08 19:56:36 +00:00
  • b21cee4f71 git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@1442 bc5caf13-1734-44f8-af43-603852e9ee25 stephan 2013-01-06 22:01:36 +00:00
  • 48ba15ed69 add advances ppss matching, fix msg multiplexer stephan 2013-01-06 20:49:06 +00:00
  • 3b887ca10c move file from flyrena to sirena stephan 2013-01-06 16:08:59 +00:00
  • cb8b6f11bf less statefull memory dump page mechanism stephan 2013-01-06 14:25:02 +00:00
  • 18b756f719 l3dump variable word size stephan 2013-01-06 12:31:00 +00:00
  • 123cb9e716 l3dump replace dv (valid) by dw (wait) stephan 2013-01-05 22:56:01 +00:00
  • 45578e1058 HK and other counters, fixed stephan 2013-01-05 21:44:15 +00:00
  • 42bd1e9a04 HK and other counters stephan 2013-01-05 19:43:20 +00:00
  • fc31ae02fa float data, l3code parameters, SEU flags stephan 2013-01-03 14:45:31 +00:00
  • 58cfb2dcd4 add flyrena.warnings stephan 2013-01-03 13:25:30 +00:00
  • a9953050eb backend in flyrena fits inside cyclon 3c25 stephan 2013-01-03 00:44:07 +00:00
  • 30e53913a3 implement l3code dribble stephan 2013-01-02 21:50:54 +00:00
  • 5922c1e69f pha_page_reset stephan 2013-01-02 20:14:19 +00:00
  • e63503253f The backend now mostly works in simulation. Rewrite of the PHA save loop. stephan 2012-12-31 00:57:54 +00:00
  • 6dfb1b6dc1 backend syntax clean stephan 2012-12-23 02:12:34 +00:00
  • 2ac11416c3 enc_busy naming stephan 2012-12-23 02:12:19 +00:00
  • 75f1378658 use a little less pipe stephan 2012-12-23 02:09:53 +00:00
  • eb15ce698a fix syntax stephan 2012-12-23 02:09:11 +00:00
  • 92a532bb77 use EDAC memory for internal buffer stephan 2012-12-23 02:08:17 +00:00
  • 1602030e84 add edac36read/write stephan 2012-12-23 02:07:21 +00:00
  • 54c4978084 use edac72read/write stephan 2012-12-23 02:06:51 +00:00
  • 583b3279a7 add UT8CR512K32 stephan 2012-12-23 02:06:12 +00:00
  • 4c2a2e5e72 consolidate inferred RAMs stephan 2012-12-23 02:05:30 +00:00
  • 4ee93ab416 updated the simulation model of Actel Ram wetzel 2012-12-22 12:48:55 +00:00
  • c30b5c82e1 First version of simulation model for Actel RAM64K36 wetzel 2012-12-21 13:54:57 +00:00
  • 9591ba8386 changed file name from mem72xD.v to mem72xActel.v wetzel 2012-12-21 10:40:26 +00:00
  • cebc3a9cad updated mem module wetzel 2012-12-21 08:28:04 +00:00
  • 42ac7bc9c9 Added memory modules for Actel RTAX2000. mem72xD.v contains the modules to be used by others, it is a wrapper for the other modules in the other files. There is also a simulation model in mem72xD.v wetzel 2012-12-20 12:24:27 +00:00
  • 9deba32976 fix mem26edac downstream memory port stephan 2012-12-20 11:06:48 +00:00
  • 8ec213ff8c hist_page connection to memwindow stephan 2012-12-20 00:05:11 +00:00
  • 3b98d8a976 fix q2 wire name stephan 2012-12-20 00:03:26 +00:00
  • 19ff1cd9d7 add missing dp_val stephan 2012-12-20 00:00:05 +00:00
  • 3c4de44e6c dataschedule simulation stephan 2012-12-19 22:00:21 +00:00
  • 63340f1ce6 R_state fixes stephan 2012-12-19 17:32:16 +00:00
  • 2ca19c8b54 work on statemachines nixdorf 2012-12-19 13:42:47 +00:00
  • e340bcbd9f almost finisched dataschedule stephan 2012-12-19 09:07:45 +00:00
  • 7baf3e431b continue to put it all together stephan 2012-12-19 09:06:54 +00:00
  • 0d1c496718 report edac errors from tfifo stephan 2012-12-19 09:06:16 +00:00
  • 0baa31ca81 use edac72{read,write} stephan 2012-12-19 09:05:26 +00:00
  • 6680d871f6 edac72{read,write} stephan 2012-12-19 09:04:11 +00:00
  • ec7eb8d8ca add .add to memwindow stephan 2012-12-19 09:03:25 +00:00
  • a22858bb74 use bfifo as txfifo stephan 2012-12-18 12:22:13 +00:00
  • e0544f34c1 testjig runs successfully stephan 2012-12-18 12:20:50 +00:00
  • e0c88d6ee5 encoder schedule stephan 2012-12-17 01:19:09 +00:00
  • 62f4a104cb common l3 write edac stephan 2012-12-17 01:17:27 +00:00
  • f55fe213e2 72-bit RAMS with common, pipelined write EDAC stephan 2012-12-17 01:16:09 +00:00
  • c51f6740ba 72-bit RAMS with common, pipelined write EDAC stephan 2012-12-17 01:15:38 +00:00
  • 761ff8205d add event classification by L2 stephan 2012-12-17 01:14:24 +00:00
  • eef58262c8 telemetry fifo stephan 2012-12-17 01:13:01 +00:00
  • 1c3d2e5cc3 byte wide fifo with EDAC stephan 2012-12-17 01:12:16 +00:00
  • 5d65ca9b34 common write EDAC with secondary arbiter stephan 2012-12-17 01:10:41 +00:00
  • e37ea720e4 fix memory port prio for mp2 stephan 2012-12-14 15:40:01 +00:00
  • 2c6129f5a0 fix serializer pin assignments for ALTERA stephan 2012-12-14 15:39:12 +00:00
  • 99dfcf00eb change serialize port names to match schematics stephan 2012-12-14 15:36:17 +00:00
  • d3026f1d53 add actel wizard modules directory stephan 2012-12-14 15:35:11 +00:00
  • e1d9f9d377 lost+found stephan 2012-12-12 16:38:23 +00:00
  • 1cb919ed5b lost+found stephan 2012-12-12 16:38:14 +00:00
  • e4b0fcc63c actel project directory added stephan 2012-12-12 12:56:31 +00:00
  • 1821347729 whitespace and other cleanup nixdorf 2012-12-12 12:26:05 +00:00
  • 7c746c2c5f extend the pads of CQ256 to 21.5mm stephan 2012-12-12 10:46:32 +00:00
  • 6eddc42800 new design finally working, timing analysis pending kruse 2012-12-11 17:29:55 +00:00
  • 87b7aa353f backend+pha stream.... stephan 2012-12-09 23:22:46 +00:00
  • 675c8ded23 fix gvps for layer naming style "single" stephan 2012-12-08 15:18:00 +00:00
  • 6c916e6355 fix comment 240MHz stephan 2012-12-08 15:17:07 +00:00
  • 34a0ff6c35 add TEST input to connector stephan 2012-12-08 15:16:22 +00:00
  • d95f60fe7e update Altera bitstream stephan 2012-12-08 15:15:35 +00:00
  • 04cf291cb5 add ECLCK register names, other fixes stephan 2012-12-08 15:15:01 +00:00
  • 6678ee57a3 allow named registers with Async() stephan 2012-12-08 15:14:05 +00:00
  • e6d529a353 make APID bits constant stephan 2012-12-07 16:11:36 +00:00
  • 1acb733a77 Solar Orbiter common backend module stephan 2012-12-07 16:09:19 +00:00
  • 97de0ba55f add memory readback port stephan 2012-12-07 16:08:44 +00:00
  • c3e4b73ed1 make readback address bus 24-bit wide stephan 2012-12-07 16:07:33 +00:00
  • 65a100dad4 make confreg writes always 64bit, add FLAG bits to readback APID stephan 2012-12-07 16:05:24 +00:00
  • 03a4701c5b add µs tick output to ppsschedule stephan 2012-12-07 16:04:09 +00:00
  • f7bf340766 add eeprom write port stephan 2012-12-07 14:46:20 +00:00
  • 0d4d3c57e4 Fix adc_pdwn, so we can actually operate the ADC. Fix ECLK_ADDR decoder, so we can read the counter. Connect fifo 1 to the ADC output, enabled by confs[1]. stephan 2012-12-06 11:34:57 +00:00
  • c2f33fdb82 set io voltage on changed ports stephan 2012-12-06 11:31:13 +00:00
  • ddeb8a3ff6 move port HVPS_SCLK from pin 18 to pin 238 stephan 2012-12-06 11:21:25 +00:00
  • 6c7720d6c5 Ports updated to latest version, TRIG+/- and READ+/- reduced to TRIG and READ wetzel 2012-12-05 15:49:10 +00:00
  • d2ca632fa7 flexcarrier complete stephan 2012-12-03 23:06:02 +00:00
  • 92af809497 trying to implement a rigid-flex carrier stephan 2012-12-03 19:50:31 +00:00
  • 91debdc2cf pinout verified for 3C25 stephan 2012-12-03 18:15:47 +00:00
  • 4ef58c4d87 Pinout from draft layout added and ports in verilogfile added. wetzel 2012-12-03 17:03:57 +00:00
  • ff59a358cf stein template adapted from irena stephan 2012-12-03 10:58:32 +00:00
  • c351f50422 Turn Nicomatics connectors - 60 pin to support a breakout adapter - 20 pin as implemented on demo board stephan 2012-12-03 08:45:24 +00:00
  • aaa0b76f57 heteptana ground frame moved to top side stephan 2012-11-30 15:54:39 +00:00
  • 41158e43fa STM digital board template from flyrena stephan 2012-11-30 14:39:23 +00:00
  • 5e3c006c77 non-locking busy handling stephan 2012-11-30 09:41:25 +00:00
  • fef4c56967 inductance from real core AL stephan 2012-11-30 09:39:53 +00:00
  • 42a2d459b3 OP heater control PWM stephan 2012-11-30 09:38:39 +00:00
  • 3e6a739675 drop -s option to gnetlist stephan 2012-11-30 09:38:16 +00:00