Stephan/solo_altera
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  • 2367b2181b added diagram for compressor nixdorf 2012-11-28 14:19:04 +00:00
  • 2d283349a7 rename ack to val stephan 2012-11-28 12:32:25 +00:00
  • 7016cbf6a2 power of two test parameters nixdorf 2012-11-28 12:05:09 +00:00
  • fd8be8f261 fix output reg assignments nixdorf 2012-11-28 12:04:48 +00:00
  • a1d8ae3c64 completed calc tests in compression nixdorf 2012-11-28 11:27:43 +00:00
  • 7111637d18 add busy to memport, incomplete stephan 2012-11-27 17:47:45 +00:00
  • e500bfe414 memport stein demo with eeprom, incr, window - tested stephan 2012-11-25 23:22:17 +00:00
  • 3b7ddd5321 Demo sram with eeprom, unfinished stephan 2012-11-24 12:00:12 +00:00
  • 2b3662bbe8 test tasks stephan 2012-11-21 14:54:25 +00:00
  • fe7713a904 finished calc nixdorf 2012-11-21 13:49:30 +00:00
  • 97f55f38d9 minor syntax tweaks stephan 2012-11-21 11:42:28 +00:00
  • b0a1c9defc minor parameter changes, added testcase for compression nixdorf 2012-11-15 13:27:57 +00:00
  • 752e8af051 work nixdorf 2012-11-14 16:14:23 +00:00
  • 1ad1a56880 save nixdorf 2012-11-14 14:17:26 +00:00
  • 2a45a17306 added adding logic nixdorf 2012-11-14 13:38:56 +00:00
  • 617bd5e571 work nixdorf 2012-11-14 12:31:26 +00:00
  • 7c732e3f33 Restructuring of FIFOs underway kruse 2012-11-12 12:22:00 +00:00
  • da763bab00 applied convention for parameternames nixdorf 2012-11-07 16:50:14 +00:00
  • 057f0195ee fix EDAC bit selectt, add pending to memport stephan 2012-11-07 14:53:57 +00:00
  • 22b68ef978 added states nixdorf 2012-11-07 14:47:35 +00:00
  • 807024f08f erena.c added stephan 2012-11-05 08:27:26 +00:00
  • 02fc65a335 added memport protocol diagram nixdorf 2012-10-31 14:49:00 +00:00
  • 52d2a9e4bb interactive changes with Robert stephan 2012-10-31 14:13:20 +00:00
  • 49ac7834b3 FIFO-redesign, not finished kruse 2012-10-30 16:21:24 +00:00
  • f1a257ea31 add erena commands stephan 2012-10-29 17:21:38 +00:00
  • 1d697eb649 make set_register available to other units stephan 2012-10-29 17:20:12 +00:00
  • e54b9bec93 tune sample timing, test fifos stephan 2012-10-28 21:24:13 +00:00
  • 4788f0e143 design complete, meets timing, and fits at 95% stephan 2012-10-28 19:01:03 +00:00
  • 5a7337d32f full chip simulation with 100ns and 330ns shaping stephan 2012-10-28 10:00:32 +00:00
  • d38ed87757 tuned the ADC data input delay stephan 2012-10-28 09:59:04 +00:00
  • aa402153ed revert r1319 stephan 2012-10-27 19:22:03 +00:00
  • 7b84ea41ef attempt to replicate ph failed stephan 2012-10-26 15:05:40 +00:00
  • 621515341e untested: replicated ph, may need instance assignment to prevent merging stephan 2012-10-24 22:24:22 +00:00
  • 0f84f94fcc making ph global makes it worse :-( stephan 2012-10-24 22:21:35 +00:00
  • b3da5c789d unified mux, meets timing requirements stephan 2012-10-24 21:25:57 +00:00
  • 5b6ade3b8f compile logs for sram early write stephan 2012-10-24 18:47:20 +00:00
  • 1dfe94cbc4 sram early write stephan 2012-10-22 16:16:26 +00:00
  • 154ba259f3 coeff width trimmed stephan 2012-10-22 16:16:02 +00:00
  • d99aa860ce trim coeff width stephan 2012-10-22 16:01:05 +00:00
  • 82bd7e5ec6 A-only, full width stephan 2012-10-22 15:59:40 +00:00
  • 329e2b8626 flyrenarc.py added, messages@findflyrena, RBCODE stephan 2012-10-22 15:40:51 +00:00
  • b8137582dd fix i128file for 18<NCH<=36 stephan 2012-10-22 15:39:52 +00:00
  • ce01f5b6a8 eventfifo fix, fit at 145% stephan 2012-10-21 22:40:11 +00:00
  • 4378abd1d3 epipe without eventfifo (no maccb) almost meets timing stephan 2012-10-21 22:23:38 +00:00
  • fd94e15df7 add sample fifo group stephan 2012-10-21 13:27:27 +00:00
  • 22fdfa0bed Nurani's changes stephan 2012-10-19 08:32:54 +00:00
  • eb0b7b675e readback code HW option irena 2012-10-18 14:37:29 +00:00
  • 31326eccf6 flash_ept support irena 2012-10-18 14:36:57 +00:00
  • 0998286c4f parameterize the pulse freq stephan 2012-10-15 11:41:14 +00:00
  • e749cc21a9 sample fifo stephan 2012-10-14 23:19:47 +00:00
  • 27ba9075ff float conversion, trigger stephan 2012-10-14 21:44:29 +00:00
  • 31740a23d7 epipe sim success with 100ns pulse stephan 2012-10-13 21:52:15 +00:00
  • dc4bb8eaed CSA chapter stephan 2012-10-12 19:24:29 +00:00
  • 7e1277330d various cecederena fixes stephan 2012-10-12 19:20:54 +00:00
  • 292a276551 typo fix stephan 2012-10-12 19:11:48 +00:00
  • 4032d355cc tuned timings od vertical clocks stephan 2012-10-12 19:11:26 +00:00
  • 40987f7f8b HVPS AI list stephan 2012-10-12 19:09:30 +00:00
  • a10714dee2 start to implement SRAM interface stephan 2012-10-12 19:09:10 +00:00
  • 4287864530 incrementer abd window sum engines, untested stephan 2012-10-12 19:08:22 +00:00
  • 6e50193985 first darft for Rogers version stephan 2012-10-12 19:07:14 +00:00
  • 04fa034b99 elastomer contact windows stephan 2012-10-12 19:06:38 +00:00
  • cdf575c0e4 match channel names to spreadsheet shaper2u2.gnumeric stephan 2012-10-11 14:02:54 +00:00
  • f4a158642e commit value changes to pcb stephan 2012-10-11 09:28:58 +00:00
  • d7fb3a5dde fix -actel zip stephan 2012-10-11 09:26:30 +00:00
  • ecf055441e fix preamp gains, B=10pF, B-A=3.3pF stephan 2012-10-11 09:26:00 +00:00
  • f5e7ecb543 proper arrangement of the bias divioder stephan 2012-10-11 09:25:20 +00:00
  • d626c7bc12 connect new reset ports in rb_schedule and trigger stephan 2012-10-10 14:14:30 +00:00
  • d7b2829a68 add epipe.v stephan 2012-10-08 21:15:31 +00:00
  • fa21b7315b strip analog board from non-flight infrastructure stephan 2012-10-08 15:12:26 +00:00
  • 70b5fd9780 added secondary load stephan 2012-10-08 06:59:31 +00:00
  • b158fdd35f copied from Semra stephan 2012-10-05 19:53:15 +00:00
  • 903c7084d6 proposal for review stephan 2012-10-05 15:13:36 +00:00
  • df61c8010b New architecture working (FINALLYsvn status), jump not implemented, timing analysis pending kruse 2012-09-27 13:39:00 +00:00
  • 5af98fe439 Some bugs erradicated kruse 2012-09-17 17:39:26 +00:00
  • de7afaf378 Minor amendments kruse 2012-09-07 11:35:30 +00:00
  • 5f888c2184 add gvps stephan 2012-09-05 19:43:24 +00:00
  • 0cf0ecf6cf ip addresses for Bexus flight 14 stephan 2012-08-29 09:38:42 +00:00
  • 9b56f81a98 add callable gpt scripts stephan 2012-08-29 06:48:57 +00:00
  • 9b87e83be7 fast adc_data sampling, adc diff mode stephan 2012-08-25 12:32:07 +00:00
  • 8e667cdea4 adc diff mode stephan 2012-08-25 11:42:30 +00:00
  • bd1071d165 Still not working kruse 2012-08-24 14:32:48 +00:00
  • 2e9e83bb24 ADC driver LDO parameters stephan 2012-08-24 09:21:51 +00:00
  • 32b502207b ccd image parser stephan 2012-08-24 09:21:01 +00:00
  • 889d5d251b New Fifo-concept (not working yet) kruse 2012-08-23 16:47:48 +00:00
  • e9d732775a add frame counter, frame read fixes stephan 2012-08-22 22:46:24 +00:00
  • e7b3b57312 raise cmd timeout, read Script messages stephan 2012-08-22 22:45:22 +00:00
  • bedca4ce18 avoid master/clear command when not necessary stephan 2012-08-22 22:44:18 +00:00
  • ad8fa8dd55 LA setup for frame readout debug, fixes and tweaks stephan 2012-08-22 22:43:30 +00:00
  • eeb5bf6b41 fix y-offset for LA-plots stephan 2012-08-22 22:41:58 +00:00
  • d4816bd8f4 allow the mainloop to run on idle ssp in skip mode stephan 2012-08-22 22:35:17 +00:00
  • 2cb95d1f5c ssp_dma_size, altera/stream/readback stephan 2012-08-22 12:06:10 +00:00
  • 913ddc1c3f image readback fixes, ndrop stephan 2012-08-22 12:05:40 +00:00
  • 86e69302a9 ndrop, set_timestamp, fixes stephan 2012-08-22 12:04:01 +00:00
  • 24a7fe32c5 missing commit of flyrena.h stephan 2012-08-21 14:07:57 +00:00
  • e83b68c314 CCD housekeeping stephan 2012-08-21 08:11:55 +00:00
  • 73601dec4e add NDROP prescaler stephan 2012-08-21 08:09:55 +00:00
  • dcf86665fb add timestamp stephan 2012-08-19 22:52:02 +00:00
  • 2b9a9662f6 miniterm.py added, late ... stephan 2012-08-17 21:00:06 +00:00
  • 777019331e get erena going stephan 2012-08-17 20:44:42 +00:00
  • c9a6ac7651 Added fifo for words from register memory kruse 2012-08-17 13:41:46 +00:00