quartus/iarena.asm.rpt:Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
quartus/iarena.fit.rpt:  5. I/O Assignment Warnings
quartus/iarena.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings                         ; Off                                   ; Off                                   ;
quartus/iarena.fit.rpt:; I/O Assignment Warnings                         ;
quartus/iarena.fit.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/iarena.fit.rpt:Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
quartus/iarena.fit.rpt:Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
quartus/iarena.fit.rpt:Warning (176674): Following 11 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
quartus/iarena.fit.rpt:    Warning (176118): Pin "clk_T1" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_T1(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "spi_miso" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_miso(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "adc_clk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "adc_clk(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "ARx[3]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[3](n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "ARx[1]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[1](n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "spi_sck" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_sck(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "clk_12" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_12(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "spi_mosi" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_mosi(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "ARTx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARTx(n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "ARx[2]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[2](n)"
quartus/iarena.fit.rpt:    Warning (176118): Pin "trigger" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "trigger(n)"
quartus/iarena.fit.rpt:Warning (176250): Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
quartus/iarena.fit.rpt:Warning (176251): Ignoring some wildcard destinations of fast I/O register assignments
quartus/iarena.fit.rpt:Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
quartus/iarena.fit.rpt:Warning (169064): Following 14 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
quartus/iarena.fit.rpt:Info: Quartus II 32-bit Fitter was successful. 0 errors, 19 warnings
quartus/iarena.map.rpt:; tinn ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/iarena.map.rpt:; tinn   ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/iarena.map.rpt:; DIN        ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/iarena.map.rpt:; STROBE     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/iarena.map.rpt:; go   ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/iarena.map.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/iarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at lasc.v(32): Parameter Declaration in module "lasc" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/iarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at ix.v(229): Parameter Declaration in module "ix_slow_control" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/iarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at ix.v(230): Parameter Declaration in module "ix_slow_control" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at arena.v(219): truncated value with size 32 to match size of target (7)
quartus/iarena.map.rpt:Warning (10034): Output port "ATxp[2]" at arena.v(56) has no driver
quartus/iarena.map.rpt:Warning (10034): Output port "ATxp[4]" at arena.v(56) has no driver
quartus/iarena.map.rpt:Warning (10034): Output port "ATxn[2]" at arena.v(57) has no driver
quartus/iarena.map.rpt:Warning (10034): Output port "ATxn[4]" at arena.v(57) has no driver
quartus/iarena.map.rpt:Warning (10034): Output port "debug" at arena.v(67) has no driver
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(97): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(99): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(256): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(258): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(70): truncated value with size 32 to match size of target (3)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(150): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(171): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (5)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_master_adc.v(99): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at adc_data.v(27): truncated value with size 32 to match size of target (2)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(43): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(195): truncated value with size 32 to match size of target (13)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(222): truncated value with size 16 to match size of target (2)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(250): truncated value with size 32 to match size of target (13)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(261): truncated value with size 32 to match size of target (16)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(43): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(195): truncated value with size 32 to match size of target (15)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(222): truncated value with size 16 to match size of target (2)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(250): truncated value with size 32 to match size of target (15)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at lasc.v(261): truncated value with size 32 to match size of target (16)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at testpulser.v(60): truncated value with size 32 to match size of target (7)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at testpulser.v(62): truncated value with size 32 to match size of target (7)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at testpulser.v(64): truncated value with size 32 to match size of target (7)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at testpulser.v(80): truncated value with size 32 to match size of target (20)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at testpulser.v(100): truncated value with size 32 to match size of target (15)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(343): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(345): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(364): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(366): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(368): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(250): truncated value with size 32 to match size of target (2)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(252): truncated value with size 32 to match size of target (2)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(273): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(275): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(283): truncated value with size 32 to match size of target (1)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(417): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(439): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(441): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(443): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(447): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(455): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(457): truncated value with size 32 to match size of target (4)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(521): truncated value with size 32 to match size of target (12)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(611): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(615): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(617): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(621): truncated value with size 32 to match size of target (10)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(638): truncated value with size 32 to match size of target (6)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(673): truncated value with size 32 to match size of target (6)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(679): truncated value with size 32 to match size of target (6)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(736): truncated value with size 32 to match size of target (6)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(801): truncated value with size 32 to match size of target (16)
quartus/iarena.map.rpt:Warning (10230): Verilog HDL assignment warning at ix.v(808): truncated value with size 32 to match size of target (8)
quartus/iarena.map.rpt:Warning (12241): 4 hierarchies have connectivity warnings - see the Connectivity Checks report folder
quartus/iarena.map.rpt:Warning (13034): The following nodes have both tri-state and non-tri-state drivers
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[0]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[1]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[3]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[5]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[9]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[10]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[11]" and its non-tri-state driver.
quartus/iarena.map.rpt:    Warning (13035): Inserted always-enabled tri-state buffer between "AC[12]" and its non-tri-state driver.
quartus/iarena.map.rpt:Warning (13039): The following bidir pins have no drivers
quartus/iarena.map.rpt:    Warning (13040): Bidir "adc_mode" has no driver
quartus/iarena.map.rpt:    Warning (13040): Bidir "AC[6]" has no driver
quartus/iarena.map.rpt:    Warning (13040): Bidir "AC[7]" has no driver
quartus/iarena.map.rpt:    Warning (13040): Bidir "AC[8]" has no driver
quartus/iarena.map.rpt:Warning (13032): The following tri-state nodes are fed by constants
quartus/iarena.map.rpt:    Warning (13033): The pin "AC[2]" is fed by GND
quartus/iarena.map.rpt:    Warning (13033): The pin "AC[4]" is fed by GND
quartus/iarena.map.rpt:Warning (13009): TRI or OPNDRN buffers permanently enabled
quartus/iarena.map.rpt:    Warning (13010): Node "AC[0]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[1]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[3]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[5]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[9]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[10]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[11]~synth"
quartus/iarena.map.rpt:    Warning (13010): Node "AC[12]~synth"
quartus/iarena.map.rpt:Warning (13024): Output pins are stuck at VCC or GND
quartus/iarena.map.rpt:    Warning (13410): Pin "ATxp[4]" is stuck at GND
quartus/iarena.map.rpt:    Warning (13410): Pin "ATxp[2]" is stuck at GND
quartus/iarena.map.rpt:    Warning (13410): Pin "ATxn[4]" is stuck at GND
quartus/iarena.map.rpt:    Warning (13410): Pin "ATxn[2]" is stuck at GND
quartus/iarena.map.rpt:    Warning (13410): Pin "debug[6]" is stuck at GND
quartus/iarena.map.rpt:    Warning (13410): Pin "debug[5]" is stuck at GND
quartus/iarena.map.rpt:    Warning (13410): Pin "debug[4]" is stuck at GND
quartus/iarena.map.rpt:Warning (15899): PLL "pll96:pll0|altpll:altpll_component|altpll_lm43:auto_generated|pll1" has parameters clk1_multiply_by and clk1_divide_by specified but port CLK[1] is not connected
quartus/iarena.map.rpt:Warning (21074): Design contains 5 input pin(s) that do not drive logic
quartus/iarena.map.rpt:    Warning (15610): No output dependent on input pin "clk_T1"
quartus/iarena.map.rpt:    Warning (15610): No output dependent on input pin "Rx[4]"
quartus/iarena.map.rpt:    Warning (15610): No output dependent on input pin "Rx[3]"
quartus/iarena.map.rpt:    Warning (15610): No output dependent on input pin "ARx[3]"
quartus/iarena.map.rpt:    Warning (15610): No output dependent on input pin "ARx[1]"
quartus/iarena.map.rpt:Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 106 warnings
quartus/iarena.sta.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/iarena.sta.rpt:Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 1 warning