VERILOG=/usr/local/bin/iverilog
#VERILOG=/usr/bin/iverilog

VERILOGFLAGS = -v -Wall -Wno-timescale -DSIMULATION $($*_FLAGS) $(IVLFLAGS)
%.vvp: %.v
	$(VERILOG) $(VERILOGFLAGS) -o $@ $^

vcd/%.lxt: %.vvp
	$< -lxt2 | tee $*.log

.PRECIOUS: vcd/%.lxt vcd/%.vcd

VPATH=.:../../altera:../../altera/actel:../../altera/mega:../../irena/altera/adc128:../../sirena/altera

QUARTUS=/usr/local/quartus/altera9.1sp1/quartus
export PATH:=$(PATH):$(QUARTUS)/bin

%.rbf: %.qpf %.qsf %.sdc %.v 
	quartus_map $<
	quartus_fit $<
	quartus_asm $<
	quartus_sta $<
	grep -i warning $*.*.rpt | grep -v 'truncated value with size 32 ' > $*.warnings

heteptana.rbf: conf_reg.v spififo.v \
       secondcyclone.v  pll240d.vhd serializer.v \
       sfilter.v adc128s102.v

heteptana.vvp: heteptana_test.v secondcyclone.v serializer.v \
    mem.v fifo.v hamming.v itof.v actel.v \
    sfilter.v adc128s102.v hkadc.v \
    pulser.v

heteptana_FLAGS = -s heteptana_test -DHETEPTANA_TEST -DMEMSRAM3 -DINFERRED_SRAM -Wno-portbind

meps_ana.vvp: meps_ana_test.v secondcyclone.v serializer.v \
    mem.v fifo.v hamming.v itof.v actel.v \
    sfilter.v adc128s102.v hkadc.v \
    pulser.v

meps_ana_FLAGS = -s meps_ana_test -DMEPS_ANA_TEST -DMEMSREDAC -DINFERRED_SRAM -Wno-portbind

rhf1401_FLAGS = -DRFH1401_TEST

hkadc.vvp: adc128s102.v sfilter.v
hkadc_FLAGS = -s hkadc_test -DHKADC_TEST