b1c5c822c8
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@6044 bc5caf13-1734-44f8-af43-603852e9ee25
138 lines
17 KiB
Text
138 lines
17 KiB
Text
aarena.asm.rpt:Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
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aarena.fit.rpt: 5. I/O Assignment Warnings
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aarena.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
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aarena.fit.rpt:; I/O Assignment Warnings ;
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aarena.fit.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
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aarena.fit.rpt:Warning (15536): Implemented PLL "pll240_96:pll0|altpll:altpll_component|altpll_g363:auto_generated|pll1" as Cyclone III PLL type, but with warnings
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aarena.fit.rpt: Warning (15559): Can't achieve requested value 69.1 degrees for clock output pll240_96:pll0|altpll:altpll_component|altpll_g363:auto_generated|clk[2] of parameter phase shift -- achieved value of 72.0 degrees
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aarena.fit.rpt:Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
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aarena.fit.rpt:Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
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aarena.fit.rpt:Warning (176674): Following 11 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
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aarena.fit.rpt: Warning (176118): Pin "clk_T1" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_T1(n)"
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aarena.fit.rpt: Warning (176118): Pin "spi_miso" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_miso(n)"
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aarena.fit.rpt: Warning (176118): Pin "adc_clk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "adc_clk(n)"
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aarena.fit.rpt: Warning (176118): Pin "ARx[1]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[1](n)"
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aarena.fit.rpt: Warning (176118): Pin "ARTx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARTx(n)"
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aarena.fit.rpt: Warning (176118): Pin "spi_sck" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_sck(n)"
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aarena.fit.rpt: Warning (176118): Pin "clk_12" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_12(n)"
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aarena.fit.rpt: Warning (176118): Pin "ARx[3]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[3](n)"
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aarena.fit.rpt: Warning (176118): Pin "spi_mosi" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_mosi(n)"
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aarena.fit.rpt: Warning (176118): Pin "trigger" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "trigger(n)"
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aarena.fit.rpt: Warning (176118): Pin "ARx[2]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[2](n)"
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aarena.fit.rpt:Warning (176250): Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
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aarena.fit.rpt:Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
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aarena.fit.rpt:Warning (169064): Following 14 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
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aarena.fit.rpt:Info: Quartus II 32-bit Fitter was successful. 0 errors, 20 warnings
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aarena.map.rpt:; rxs_valid ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c2 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c3 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c4 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; wb ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; halffull ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; fifo_empty ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c3 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:; c4 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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aarena.map.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
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aarena.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/serializer.v(188)
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aarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at countbits.v(24): Parameter Declaration in module "countbits" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
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aarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at aarena.v(49): Parameter Declaration in module "aarena" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
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aarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at aarena.v(50): Parameter Declaration in module "aarena" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
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aarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at aarena.v(51): Parameter Declaration in module "aarena" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
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aarena.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at aarena.v(52): Parameter Declaration in module "aarena" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at arena.v(126): truncated value with size 32 to match size of target (2)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at arena.v(127): truncated value with size 32 to match size of target (3)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at arena.v(158): truncated value with size 32 to match size of target (7)
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aarena.map.rpt:Warning (10034): Output port "debug" at arena.v(42) has no driver
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(97): truncated value with size 32 to match size of target (4)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(99): truncated value with size 32 to match size of target (4)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(254): truncated value with size 32 to match size of target (8)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(256): truncated value with size 32 to match size of target (8)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(70): truncated value with size 32 to match size of target (3)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(150): truncated value with size 32 to match size of target (10)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(171): truncated value with size 32 to match size of target (10)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at aarena.v(87): truncated value with size 32 to match size of target (10)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at aarena.v(99): truncated value with size 32 to match size of target (16)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at aarena.v(104): truncated value with size 32 to match size of target (16)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at aarena.v(123): truncated value with size 32 to match size of target (16)
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aarena.map.rpt:Warning (10665): Bidirectional port "stats[3]" at aarena.v(8) has a one-way connection to bidirectional port "errors[3]"
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aarena.map.rpt:Warning (10665): Bidirectional port "stats[2]" at aarena.v(8) has a one-way connection to bidirectional port "errors[2]"
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at secondcyclone.v(133): truncated value with size 32 to match size of target (5)
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aarena.map.rpt:Warning (10296): VHDL warning at pll240d.vhd(194): ignored assignment of value to null range
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at secondcyclone.v(49): truncated value with size 32 to match size of target (8)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at secondcyclone.v(60): truncated value with size 32 to match size of target (5)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_master_adc.v(99): truncated value with size 32 to match size of target (4)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at adc_data.v(25): truncated value with size 32 to match size of target (2)
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aarena.map.rpt:Warning (10230): Verilog HDL assignment warning at oscilloscope.v(75): truncated value with size 32 to match size of target (10)
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[15]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[14]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[13]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[12]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[11]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[10]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[9]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[8]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[7]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[6]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[5]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[4]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|stats[0]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[15]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[14]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[13]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[12]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[11]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[10]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[9]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[8]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[7]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[6]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[5]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[4]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[1]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (12161): Node "aarena:core|errors[0]" is stuck at GND because node is in wire loop and does not have a source
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aarena.map.rpt:Warning (14284): Synthesized away the following node(s):
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aarena.map.rpt: Warning (14285): Synthesized away the following RAM node(s):
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aarena.map.rpt: Warning (14320): Synthesized away node "aarena:core|oscilloscope:scope|spififo:buffer|scfifo:scfifo_component|scfifo_p0c1:auto_generated|a_dpfifo_0g81:dpfifo|altsyncram_l2g1:FIFOram|q_b[15]"
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aarena.map.rpt:Warning (12241): 6 hierarchies have connectivity warnings - see the Connectivity Checks report folder
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aarena.map.rpt:Warning (13034): The following nodes have both tri-state and non-tri-state drivers
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aarena.map.rpt: Warning (13035): Inserted always-enabled tri-state buffer between "AC[3]" and its non-tri-state driver.
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aarena.map.rpt: Warning (13035): Inserted always-enabled tri-state buffer between "AC[4]" and its non-tri-state driver.
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aarena.map.rpt: Warning (13035): Inserted always-enabled tri-state buffer between "AC[10]" and its non-tri-state driver.
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aarena.map.rpt: Warning (13035): Inserted always-enabled tri-state buffer between "AC[11]" and its non-tri-state driver.
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aarena.map.rpt: Warning (13035): Inserted always-enabled tri-state buffer between "AC[12]" and its non-tri-state driver.
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aarena.map.rpt:Warning (13039): The following bidir pins have no drivers
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aarena.map.rpt: Warning (13040): Bidir "AC[7]" has no driver
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aarena.map.rpt: Warning (13040): Bidir "AC[8]" has no driver
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aarena.map.rpt: Warning (13040): Bidir "AC[9]" has no driver
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aarena.map.rpt: Warning (13040): Bidir "adc_mode" has no driver
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aarena.map.rpt:Warning (13032): The following tri-state nodes are fed by constants
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aarena.map.rpt: Warning (13033): The pin "AC[2]" is fed by GND
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aarena.map.rpt:Warning (13027): Removed fan-outs from the following always-disabled I/O buffers
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aarena.map.rpt: Warning (13028): Removed fan-out from the always-disabled I/O buffer "AC[2]" to the node "AC[2]"
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aarena.map.rpt:Warning (13009): TRI or OPNDRN buffers permanently enabled
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aarena.map.rpt: Warning (13010): Node "AC[3]~synth"
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aarena.map.rpt: Warning (13010): Node "AC[4]~synth"
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aarena.map.rpt: Warning (13010): Node "AC[10]~synth"
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aarena.map.rpt: Warning (13010): Node "AC[11]~synth"
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aarena.map.rpt: Warning (13010): Node "AC[12]~synth"
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aarena.map.rpt:Warning (13024): Output pins are stuck at VCC or GND
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aarena.map.rpt: Warning (13410): Pin "ATxp[4]" is stuck at GND
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aarena.map.rpt: Warning (13410): Pin "ATxp[2]" is stuck at GND
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aarena.map.rpt: Warning (13410): Pin "ATxn[4]" is stuck at GND
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aarena.map.rpt: Warning (13410): Pin "ATxn[2]" is stuck at GND
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aarena.map.rpt: Warning (13410): Pin "debug[6]" is stuck at GND
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aarena.map.rpt: Warning (13410): Pin "debug[5]" is stuck at GND
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aarena.map.rpt: Warning (13410): Pin "debug[4]" is stuck at GND
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aarena.map.rpt:Warning (15899): PLL "pll240_96:pll0|altpll:altpll_component|altpll_g363:auto_generated|pll1" has parameters clk1_multiply_by and clk1_divide_by specified but port CLK[1] is not connected
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aarena.map.rpt:Warning (15899): PLL "aarena:core|pll240d:pll1|altpll:altpll_component|altpll_sn33:auto_generated|pll1" has parameters clk1_multiply_by and clk1_divide_by specified but port CLK[1] is not connected
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aarena.map.rpt:Warning (21074): Design contains 5 input pin(s) that do not drive logic
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aarena.map.rpt: Warning (15610): No output dependent on input pin "clk_T1"
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aarena.map.rpt: Warning (15610): No output dependent on input pin "Rx[4]"
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aarena.map.rpt: Warning (15610): No output dependent on input pin "Rx[3]"
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aarena.map.rpt: Warning (15610): No output dependent on input pin "ARx[1]"
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aarena.map.rpt: Warning (15610): No output dependent on input pin "ARTx"
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aarena.map.rpt:Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 99 warnings
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aarena.sta.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
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aarena.sta.rpt:Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 1 warning
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