16e661b92b
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@9396 bc5caf13-1734-44f8-af43-603852e9ee25
105 lines
3.1 KiB
Makefile
105 lines
3.1 KiB
Makefile
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VERILOG=/usr/local/bin/iverilog
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#VERILOG=/usr/bin/iverilog
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VERILOGFLAGS = -v -DSIMULATION $($*_FLAGS)
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%.vvp: %.v
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$(VERILOG) $(VERILOGFLAGS) -o $@ $^
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vcd/%.fst: %.vvp
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$< -fst | tee $*.log
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.PRECIOUS: vcd/%.lxt
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VPATH=.:./direna:./adc128:../../altera:../../altera/mega:../../nm64/altera:../../sirena/altera
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irena.vvp: irena_test.v frontend.v spi_slave.v spififo_sim.v conf_reg.v packetfifo.v \
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countbits.v ms5540c.v \
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direna.v direna_test.v direna_adc.v \
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adccntl.v filter.v trigger.v triggeror.v
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irena_core.vvp: irena.v irena_test.v \
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frontend.v spi_slave.v spififo_sim.v conf_reg.v packetfifo.v \
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countbits.v ms5540c.v nmcounter.v mem.v \
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direna.v direna_test.v direna_adc.v \
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adccntl.v filter.v \
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irena_core.v sfilter.v itof.v \
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hamming.v
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irena_FLAGS = -sdirena_adc -DADC_SAMPLE_EARLY -DDIRENA_TEST -DDIRENACORE
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OPT=-DDD48
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irena_core_FLAGS = -sdirena_adc -DADC_SAMPLE_EARLY -DDIRENA_TEST $(OPT) \
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-DIRENACORE -DHAVE_ABT2F -DAD7276 -DGENSRAM -DINFERRED_SRAM -DMEMSR_EDAC
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QUARTUS=/usr/local/quartus/altera13.1/quartus
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export PATH:=$(PATH):$(QUARTUS)/bin
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MAPFLGS = $(patsubst %, --verilog_macro="%",$($*_MAPDEFS))
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QDIR=quartus
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$(QDIR)/%.rbf: %.qpf %.qsf %.sdc \
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frontend.v spi_slave.v conf_reg.v packetfifo.v spififo.v
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quartus_map $< $(MAPFLGS)
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quartus_fit $<
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quartus_asm $<
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quartus_sta $<
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grep -i warning $(QDIR)/$*.*.rpt > $*.warnings
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ADC_SAMPLE_EARLY = ADC_SAMPLE_EARLY=1
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ifeq ($(ESTHER),1)
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DISABLE = 00 01 02 03 04 05 06 07 08 09 10 11 14 15 16 17
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irena_MAPDEFS = $(ADC_SAMPLE_EARLY) \
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$(patsubst %,DIS%=1,$(DISABLE)) \
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SHORT_PACKETS=03000
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irena_FLAGS += -DSHORT_PACKETS=03000
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else
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irena_MAPDEFS = $(ADC_SAMPLE_EARLY)
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endif
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$(QDIR)/irena.rbf: irena.v countbits.v ms5540c.v \
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direna.v adccntl.v filter.v trigger.v triggeror.v \
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sram.v sram1024x32.v pll96.v mul13x13.v
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ms5540c_FLAGS = -sms5540c_test -DMS5540C_TEST
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ms5540c.vvp: ms5540c.v countbits.v
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$(QDIR)/irena2.rbf:
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rm -f irena.rbf
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$(MAKE) ESTHER=1 irena.rbf
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mv irena.rbf irena2.rbf
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mv irena.warnings irena2.warnings
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$(QDIR)/irenacore.rbf: irena.v countbits.v ms5540c.v nmcounter.v \
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direna.v adccntl.v filter.v \
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irena_core.v sfilter.v itof.v \
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sram.v sram1024x32.v pll96.v mul13x13.v
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irenacore2thr.qpf irenacore2thr.qsf irenacore2thr.sdc: irenacore2thr.%: irenacore.%
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cp -v $< $@
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$(QDIR)/irenacore2thr.rbf: irena.v countbits.v ms5540c.v nmcounter.v \
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direna.v adccntl.v filter.v \
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irena_core.v sfilter.v itof.v \
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sram.v sram1024x32.v pll96.v mul13x13.v
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irenacore2thr_MAPDEFS = TWOTHR=1
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irena48.qpf irena48.qsf irena48.sdc: irena48.%: irenacore.%
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cp -v $< $@
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$(QDIR)/irena48.rbf: irena.v countbits.v ms5540c.v nmcounter.v \
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direna.v adccntl.v filter.v \
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irena_core.v sfilter.v itof.v \
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sram.v sram1024x32.v pll96.v mul13x13.v
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irena48_MAPDEFS = DD48=1
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$(QDIR)/i128.rbf: i128.v sfilter.v
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i128_FLAGS = -DAD7276 -DGENSRAM
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i128.vvp: i128.v sfilter.v \
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pulser.v frontend_test.v \
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bitcount.v ms5540c.v \
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frontend.v spi_slave.v spififo_sim.v conf_reg.v packetfifo.v
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