30717ed925
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@9361 bc5caf13-1734-44f8-af43-603852e9ee25
103 lines
2.8 KiB
Makefile
103 lines
2.8 KiB
Makefile
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VERILOG=/usr/local/bin/iverilog
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#VERILOG=/usr/bin/iverilog
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VERILOGFLAGS = -v -DSIMULATION $($*_FLAGS)
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%.vvp:
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$(VERILOG) $(VERILOGFLAGS) -o $@ $^
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vcd/%.fst: %.vvp
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$< -fst | tee $*.log
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.PRECIOUS: vcd/%.fst
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VPATH=.:../../altera:../../altera/mega:../../irena/altera:../../sirena/altera
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NMRENA_SRC = nmrena.v scangen.v \
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frontend.v frontend_test.v spi_slave.v spififo_sim.v conf_reg.v packetfifo.v \
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ms5540c.v countbits.v \
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nmuart.v uart.v fifo16.v nmbaro.v \
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nmcounter.v itof.v mem.v utick.v \
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ltc2656.v ads8688.v
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nmrena.vvp: $(NMRENA_SRC)
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nmrena_FLAGS = -snmrena_test -DNMRENA_TEST -DINFERRED_SRAM -DNMRENA_$(V) -DSLOW_CONTROL
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nmhertz.vvp: $(NMRENA_SRC)
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nmhertz_FLAGS = -snmrena_test -DNMRENA_TEST -DINFERRED_SRAM -DNMHERTZ
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mustang.vvp: $(NMRENA_SRC)
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mustang_FLAGS = -snmrena_test -DNMRENA_TEST -DINFERRED_SRAM -DMUSTANG
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nm_mcs.vvp: $(NMRENA_SRC) nmmcs.v
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nm_mcs_FLAGS = -snmrena_test -DNMRENA_TEST -DINFERRED_SRAM -DMCS
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nmuart.vvp: nmuart.v uart.v conf_reg.v fifo16.v frontend_test.v
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nmuart_FLAGS = -snmuart_test -DNMUART_TEST -DUART3MHZ
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nmbaro.vvp: nmbaro.v frontend_test.v
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nmbaro_FLAGS = -snmbaro_test -DNMBARO_TEST
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nm64.vvp: nmcounter.v itof.v conf_reg.v mem.v frontend_test.v utick.v
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nm64_FLAGS = -snm64_test -DNM64_TEST -DINFERRED_SRAM
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ltc2656.vvp: ltc2656.v frontend_test.v
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ltc2656_FLAGS = -sltc2656_test -DLTC2656_TEST
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ads8688.vvp: ads8688.v frontend_test.v
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ads8688_FLAGS = -sads8688_test -DADS8688_TEST
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nmadc.vvp: ads8688.v frontend_test.v
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nmadc_FLAGS = -snmadc_test -DADS8688_TEST
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paadc.vvp: ads8688.v frontend_test.v conf_reg.v
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paadc_FLAGS = -spaadc_test -DADS8688_TEST
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mcs_pulse.vvp: nmmcs.v
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mcs_pulse_FLAGS = -smcs_pulse_test -DMCS_PULSE_TEST
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ifeq ($V,10)
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QUARTUS=/usr/local/quartus/intelFPGA_lite/20.1/quartus
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else
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QUARTUS=/usr/local/quartus/altera13.1/quartus
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#QUARTUS=/usr/local/quartus/altera9.1sp1/quartus
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endif
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export PATH:=$(PATH):$(QUARTUS)/bin:.
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MAPFLGS = $(patsubst %, --verilog_macro="%",$($*_MAPDEFS))
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ifneq ($V,)
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%$V.qpf: %.qpf
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ln $< $@
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%$V.sdc: %.sdc
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ln $< $@
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endif
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QDIR=quartus
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$(QDIR)/%.rbf: %.qpf %.qsf %.sdc \
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frontend.v spi_slave.v conf_reg.v packetfifo.v spififo.v
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quartus_map $< $(MAPFLGS)
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quartus_fit $<
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quartus_asm $<
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quartus_sta $<
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grep -i warning $(QDIR)/$*.*.rpt > $*.warnings
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$(QDIR)/nmrena$V.rbf: pll96.v nmrena.v scangen.v \
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ms5540c.v countbits.v \
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nmuart.v uart.v fifo16.v itof.v \
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nmcounter.v mem.v ltc2656.v ads8688.v nmbaro.v
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$(QDIR)/nmhertz$V.rbf: pll96.v nmrena.v scangen.v \
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ms5540c.v countbits.v \
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nmuart.v uart.v fifo16.v itof.v \
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nmcounter.v mem.v ltc2656.v ads8688.v
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$(QDIR)/mustang.rbf: pll96.v nmrena.v scangen.v \
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ms5540c.v countbits.v \
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nmuart.v uart.v fifo16.v itof.v \
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nmcounter.v mem.v ltc2656.v ads8688.v nmbaro.v
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$(QDIR)/nm_mcs$V.rbf: pll200.v nmmcs.v nmrena.v scangen.v \
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ms5540c.v countbits.v \
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nmuart.v uart.v fifo16.v itof.v \
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nmcounter.v mem.v ltc2656.v ads8688.v
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