4efba171fa
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@9079 bc5caf13-1734-44f8-af43-603852e9ee25
213 lines
43 KiB
Text
213 lines
43 KiB
Text
quartus/nmrena10.asm.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
|
quartus/nmrena10.asm.rpt:Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
|
|
quartus/nmrena10.fit.rpt: 21. I/O Assignment Warnings
|
|
quartus/nmrena10.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
|
|
quartus/nmrena10.fit.rpt:; I/O Assignment Warnings ;
|
|
quartus/nmrena10.fit.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
|
quartus/nmrena10.fit.rpt:Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
|
|
quartus/nmrena10.fit.rpt:Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
|
|
quartus/nmrena10.fit.rpt:Warning (176674): Following 9 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "clk_T1" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_T1(n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 31
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "spi_miso" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_miso(n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 34
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "trigger" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "trigger(n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 37
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "ARx[3]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[3](n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 50
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "ARx[2]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[2](n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 50
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "spi_sck" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_sck(n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 32
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "clk_12" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_12(n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 30
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "spi_mosi" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_mosi(n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 33
|
|
quartus/nmrena10.fit.rpt: Warning (176118): Pin "ARx[1]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[1](n)" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 50
|
|
quartus/nmrena10.fit.rpt:Warning (176250): Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
|
|
quartus/nmrena10.fit.rpt:Warning (176251): Ignoring some wildcard destinations of fast I/O register assignments
|
|
quartus/nmrena10.fit.rpt:Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
|
|
quartus/nmrena10.fit.rpt:Warning (169064): Following 2 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
|
|
quartus/nmrena10.fit.rpt:Info: Quartus Prime Fitter was successful. 0 errors, 17 warnings
|
|
quartus/nmrena10.map.rpt:; word ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; len ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; dtime ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; fifo_empty ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; c1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; c2 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; c3 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:; c4 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
|
quartus/nmrena10.map.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at ms5540c.v(130): Parameter Declaration in module "ms5540c" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/irena/altera/ms5540c.v Line: 130
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(455): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 455
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(485): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 485
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(489): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 489
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(490): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 490
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(491): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 491
|
|
quartus/nmrena10.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(492): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 492
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(97): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/altera/spi_slave.v Line: 97
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(99): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/altera/spi_slave.v Line: 99
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(256): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/altera/spi_slave.v Line: 256
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at spi_slave.v(258): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/altera/spi_slave.v Line: 258
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(71): truncated value with size 32 to match size of target (3) File: /home/falbala/stephan/solo/eda/altera/packetfifo.v Line: 71
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(152): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/altera/packetfifo.v Line: 152
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at packetfifo.v(173): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/altera/packetfifo.v Line: 173
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (5) File: /home/falbala/stephan/solo/eda/altera/countbits.v Line: 13
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/altera/countbits.v Line: 13
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at scangen.v(64): truncated value with size 5 to match size of target (4) File: /home/falbala/stephan/solo/eda/altera/scangen.v Line: 64
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at scangen.v(91): truncated value with size 32 to match size of target (2) File: /home/falbala/stephan/solo/eda/altera/scangen.v Line: 91
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(134): truncated value with size 32 to match size of target (11) File: /home/falbala/stephan/solo/eda/irena/altera/ms5540c.v Line: 134
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(136): truncated value with size 32 to match size of target (11) File: /home/falbala/stephan/solo/eda/irena/altera/ms5540c.v Line: 136
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(149): truncated value with size 32 to match size of target (12) File: /home/falbala/stephan/solo/eda/irena/altera/ms5540c.v Line: 149
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(159): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/irena/altera/ms5540c.v Line: 159
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ms5540c.v(206): truncated value with size 32 to match size of target (5) File: /home/falbala/stephan/solo/eda/irena/altera/ms5540c.v Line: 206
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at countbits.v(13): truncated value with size 32 to match size of target (16) File: /home/falbala/stephan/solo/eda/altera/countbits.v Line: 13
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(260): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 260
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(349): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 349
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(379): truncated value with size 32 to match size of target (3) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 379
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(381): truncated value with size 32 to match size of target (3) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 381
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at uart.v(352): truncated value with size 32 to match size of target (9) File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 352
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at uart.v(355): truncated value with size 32 to match size of target (9) File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 355
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at uart.v(367): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 367
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at uart.v(369): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 369
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at uart.v(373): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/sirena/altera/uart.v Line: 373
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(61): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 61
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(98): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 98
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmuart.v(149): truncated value with size 32 to match size of target (1) File: /home/falbala/stephan/solo/eda/nm64/altera/nmuart.v Line: 149
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(385): truncated value with size 32 to match size of target (24) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 385
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(413): truncated value with size 32 to match size of target (16) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 413
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(477): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 477
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(555): truncated value with size 32 to match size of target (3) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 555
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(563): truncated value with size 32 to match size of target (16) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 563
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(220): truncated value with size 32 to match size of target (7) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 220
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(222): truncated value with size 32 to match size of target (7) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 222
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at nmcounter.v(304): truncated value with size 32 to match size of target (16) File: /home/falbala/stephan/solo/eda/nm64/altera/nmcounter.v Line: 304
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(21): truncated value with size 32 to match size of target (6) File: /home/falbala/stephan/solo/eda/altera/itof.v Line: 21
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(24): truncated value with size 32 to match size of target (6) File: /home/falbala/stephan/solo/eda/altera/itof.v Line: 24
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(27): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/altera/itof.v Line: 27
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(28): truncated value with size 32 to match size of target (30) File: /home/falbala/stephan/solo/eda/altera/itof.v Line: 28
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(39): truncated value with size 30 to match size of target (12) File: /home/falbala/stephan/solo/eda/altera/itof.v Line: 39
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(41): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 41
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(43): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 43
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(45): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 45
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(41): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 41
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(43): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 43
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(45): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 45
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(41): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 41
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(43): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 43
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(45): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 45
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(63): truncated value with size 50 to match size of target (16) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 63
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(92): truncated value with size 32 to match size of target (12) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 92
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ltc2656.v(94): truncated value with size 32 to match size of target (12) File: /home/falbala/stephan/solo/eda/nm64/altera/ltc2656.v Line: 94
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(219): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 219
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(222): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 222
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(223): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 223
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(224): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 224
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(225): truncated value with size 32 to match size of target (4) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 225
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(243): truncated value with size 32 to match size of target (3) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 243
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(300): truncated value with size 6 to match size of target (5) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 300
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(339): truncated value with size 32 to match size of target (9) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 339
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(31): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 31
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(33): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 33
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(35): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 35
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(53): truncated value with size 32 to match size of target (6) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 53
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(55): truncated value with size 32 to match size of target (6) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 55
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(452): truncated value with size 32 to match size of target (16) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 452
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(453): truncated value with size 32 to match size of target (16) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 453
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(31): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 31
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(33): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 33
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(35): truncated value with size 32 to match size of target (8) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 35
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(53): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 53
|
|
quartus/nmrena10.map.rpt:Warning (10230): Verilog HDL assignment warning at ads8688.v(55): truncated value with size 32 to match size of target (10) File: /home/falbala/stephan/solo/eda/nm64/altera/ads8688.v Line: 55
|
|
quartus/nmrena10.map.rpt:Warning (14284): Synthesized away the following node(s):
|
|
quartus/nmrena10.map.rpt: Warning (14285): Synthesized away the following RAM node(s):
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[8]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 296
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[9]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 328
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[10]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 360
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[11]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 392
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[12]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 424
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[13]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 456
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[14]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 488
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[3].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[15]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 520
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[8]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 296
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[9]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 328
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[10]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 360
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[11]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 392
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[12]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 424
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[13]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 456
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[14]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 488
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[2].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[15]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 520
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[8]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 296
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[9]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 328
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[10]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 360
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[11]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 392
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[12]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 424
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[13]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 456
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[14]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 488
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[1].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[15]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 520
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[8]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 296
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[9]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 328
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[10]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 360
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[11]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 392
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[12]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 424
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[13]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 456
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[14]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 488
|
|
quartus/nmrena10.map.rpt: Warning (14320): Synthesized away node "nmuart:uarts|fifo16:u[0].fifo|scfifo:scfifo_component|scfifo_dtb1:auto_generated|a_dpfifo_ai61:dpfifo|altsyncram_r9j1:FIFOram|q_b[15]" File: /home/falbala/stephan/solo/eda/nm64/altera/db/altsyncram_r9j1.tdf Line: 520
|
|
quartus/nmrena10.map.rpt:Warning (12241): 31 hierarchies have connectivity warnings - see the Connectivity Checks report folder
|
|
quartus/nmrena10.map.rpt:Warning (13034): The following nodes have both tri-state and non-tri-state drivers
|
|
quartus/nmrena10.map.rpt: Warning (13035): Inserted always-enabled tri-state buffer between "AIO[5]" and its non-tri-state driver. File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 55
|
|
quartus/nmrena10.map.rpt:Warning (13039): The following bidirectional pins have no drivers
|
|
quartus/nmrena10.map.rpt: Warning (13040): bidirectional pin "AIO[6]" has no driver File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 55
|
|
quartus/nmrena10.map.rpt:Warning (13009): TRI or OPNDRN buffers permanently enabled
|
|
quartus/nmrena10.map.rpt: Warning (13010): Node "AIO[5]~synth" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 55
|
|
quartus/nmrena10.map.rpt:Warning (15899): PLL "pll96:pll0|altpll:altpll_component|altpll_nn43:auto_generated|pll1" has parameters clk1_multiply_by and clk1_divide_by specified but port CLK[1] is not connected File: /home/falbala/stephan/solo/eda/nm64/altera/db/altpll_nn43.tdf Line: 28
|
|
quartus/nmrena10.map.rpt:Warning (21074): Design contains 4 input pin(s) that do not drive logic
|
|
quartus/nmrena10.map.rpt: Warning (15610): No output dependent on input pin "clk_T1" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 31
|
|
quartus/nmrena10.map.rpt: Warning (15610): No output dependent on input pin "trigger" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 37
|
|
quartus/nmrena10.map.rpt: Warning (15610): No output dependent on input pin "ARx[3]" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 50
|
|
quartus/nmrena10.map.rpt: Warning (15610): No output dependent on input pin "ARx[2]" File: /home/falbala/stephan/solo/eda/nm64/altera/nmrena.v Line: 50
|
|
quartus/nmrena10.map.rpt:Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 129 warnings
|
|
quartus/nmrena10.sta.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
|
quartus/nmrena10.sta.rpt:Info: Quartus Prime Timing Analyzer was successful. 0 errors, 1 warning
|