From 190f8741d4f096c8ee94addc79d3998b87a1918b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stephan=20I=2E=20B=C3=B6ttcher?= Date: Wed, 8 Apr 2026 16:34:17 +0200 Subject: [PATCH 1/6] cmd("O") return fpga_status() --- src/cmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cmd.c b/src/cmd.c index b21e9e1..01204ed 100644 --- a/src/cmd.c +++ b/src/cmd.c @@ -261,7 +261,7 @@ void parse_command(const uint8_t *s, uint8_t n) break; #ifdef HAVE_FPGA case 'O': - r = fpga_power(); + r = fpga_status(); if (bflg & 1) // "O1" power off fpga_power_off(); From 68e5849e2ae19a7f4c05cf6f5557ef89f423969e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stephan=20I=2E=20B=C3=B6ttcher?= Date: Wed, 8 Apr 2026 16:35:43 +0200 Subject: [PATCH 2/6] pipe: fix fpga_start_* return value test --- src/pipe.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/pipe.c b/src/pipe.c index 2ee6058..e89cac9 100644 --- a/src/pipe.c +++ b/src/pipe.c @@ -51,7 +51,7 @@ uint8_t pipe_poll() if (pipe_busy() || !dest) return r; #ifdef HAVE_FPGA - // we need to wait at least until the FPGA raises nCONFIG + // we need to wait at least until the FPGA raises nSTATUS if (dest & pipe_fpga && fpga_reset_poll()) return r; #endif @@ -93,7 +93,7 @@ uint8_t pipe_poll() // Continue the FPGA stream. else if (pipe.source == pipe_fpga) { - if (~fpga_start_read()) + if (!fpga_start_read()) pipe.source = 0; } #endif @@ -204,7 +204,7 @@ adc_done: #ifdef HAVE_FPGA // Resume the FPGA stream - if (dest & pipe_fpga && ~fpga_start_write()) + if (dest & pipe_fpga && !fpga_start_write()) dest &=~ pipe_fpga; else #endif From 5bf152eab71b93b7e487f44073b5663d91cf29f3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stephan=20I=2E=20B=C3=B6ttcher?= Date: Wed, 8 Apr 2026 16:36:49 +0200 Subject: [PATCH 3/6] fpga_power_off(): nCONFIG=0 --- src/fpga.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/fpga.h b/src/fpga.h index 0e24b32..86096d2 100644 --- a/src/fpga.h +++ b/src/fpga.h @@ -27,7 +27,11 @@ void fpga_config(uint16_t page, uint16_t count); static inline uint8_t fpga_power() { return !!(PEN_VPORT.IN & (1< Date: Wed, 8 Apr 2026 16:38:04 +0200 Subject: [PATCH 4/6] spi: fix ~ ! confusion --- src/spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/spi.c b/src/spi.c index 083ab8d..049057f 100644 --- a/src/spi.c +++ b/src/spi.c @@ -26,7 +26,7 @@ uint8_t spi_poll_delay() uint8_t ifg; do { ifg = SPI.INTFLAGS & SPI_RXCIF_bm; - } while (~ifg && t--); + } while (!ifg && t--); return ifg; } From 2575504fcec50d723206653716ae2dab8a003e12 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stephan=20I=2E=20B=C3=B6ttcher?= Date: Wed, 8 Apr 2026 16:38:42 +0200 Subject: [PATCH 5/6] fpga_* fixes --- src/fpga.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/fpga.c b/src/fpga.c index fc01a79..9204ce5 100644 --- a/src/fpga.c +++ b/src/fpga.c @@ -30,7 +30,7 @@ void fpga_reset() nCONFIG_VPORT.OUT &=~ (1<>8, FS_Read|FS_528); + flash_start_stream(page, count >> 3, FS_Read|FS_528); } From 55f5008540c1d603707673f898037fc7c567aac2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stephan=20I=2E=20B=C3=B6ttcher?= Date: Wed, 8 Apr 2026 18:03:22 +0200 Subject: [PATCH 6/6] fpga_config_p(): success --- src/dose.py | 121 ++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 108 insertions(+), 13 deletions(-) diff --git a/src/dose.py b/src/dose.py index e08cbe7..2707e61 100755 --- a/src/dose.py +++ b/src/dose.py @@ -1,6 +1,6 @@ #! /usr/bin/ipython3 --profile=thhor -import sys, time, getopt, fileinput, struct +import sys, os, time, getopt, fileinput, struct import uart from base85 import base85_encode, base85_decode from map import memmap @@ -383,18 +383,21 @@ class dose_cmd(uart.uart): self.cmd(c, page[16*i:16*(i+1)]) return self.cmd("B4 t+timeout: + if self._verbose: + print(f"write_pipe timeout {i=} {b=}", file=sys.stderr) + break + time.sleep(s) + s *= 2 + if s > 1: + s = 1 + if nn: + break + if parity and b==7: + self.cmd("B@4", page[8]) + if b >= len(page): + break + for j in range(4): + self.cmd(f"B{j}", page[b][16*j:16*(j+1)]) + if self._verbose >= 2: + self.peek("pipe", 11) + i += 1 + if n and i >= n: + break + if n and i >= n: + break + if nn: + break + if f: + f.close() + return i + + def fpga_config_p(self, filename="../fpga/quartus/thhor_crs.rbf"): + self.fpga_reset() + n = (os.stat(filename).st_size + 63) // 64 + self.pipe("CMD", "CONFIG", n=n*64) + self.write_pipe(filename, n=n) + def fix_page(self, page): if self.load_galois(): page = bch.fix_page(page)