v 20220529 2 C 49500 46900 1 0 0 resistor-2.sym { T 49900 47250 5 10 0 0 0 0 1 device=RESISTOR T 49950 47000 5 10 1 1 0 4 1 refdes=R4 T 49700 47050 5 10 0 1 0 0 1 footprint=C0603 T 49850 46850 5 10 1 1 0 2 1 value=0Ω } C 46900 46600 1 0 0 AD8005-1.sym { T 47350 46950 5 8 1 1 0 0 1 device=AD8641 T 47300 47500 5 10 1 1 0 0 1 refdes=U1 T 47500 46400 5 10 0 1 0 0 1 footprint=SC70_5 T 47500 46800 5 10 0 1 0 0 1 value=AD8641 } C 49000 45900 1 90 0 resistor-2.sym { T 48650 46300 5 10 0 0 90 0 1 device=RESISTOR T 48900 46350 5 10 1 1 90 4 1 refdes=R3 T 48850 46100 5 10 0 1 90 0 1 footprint=C0603 T 49050 46150 5 10 1 1 90 2 1 value=1MΩ } C 49000 44400 1 90 0 resistor-2.sym { T 48650 44800 5 10 0 0 90 0 1 device=RESISTOR T 48900 44850 5 10 1 1 90 4 1 refdes=R5 T 48850 44600 5 10 0 1 90 0 1 footprint=C0603 T 49050 44650 5 10 1 1 90 2 1 value=47kΩ } C 49700 45900 1 90 0 capacitor-1.sym { T 49000 46100 5 10 0 0 90 0 1 device=CAPACITOR T 49550 46500 5 10 1 1 90 2 1 refdes=C3 T 48800 46100 5 10 0 0 90 0 1 symversion=0.1 T 49650 46200 5 10 0 1 90 0 1 footprint=C0603 T 49450 46450 5 10 1 1 90 0 1 value=1nF } N 48100 47000 49500 47000 4 { T 48200 47050 5 10 1 1 0 0 1 netname=U1out } N 48900 47000 48900 46800 4 N 49500 47000 49500 46800 4 N 49500 45800 48900 45800 4 N 48900 45900 48900 45300 4 N 48900 45300 46700 45300 4 N 46700 45300 46700 46800 4 N 46700 46800 47100 46800 4 { T 46650 46850 5 10 1 1 0 0 1 netname=U1inv } N 47100 47200 46100 47200 4 N 49500 45800 49500 45900 4 C 49000 44100 1 0 1 gnd-1.sym N 47600 47400 47600 49400 4 N 50400 47000 52000 47000 4 { T 50500 47050 5 10 1 1 0 0 1 netname=U2- } N 48900 44400 46100 44400 4 C 45500 47100 1 0 0 in-1.sym { T 45500 47400 5 10 0 0 0 0 1 device=INPUT T 45500 47200 5 10 1 1 0 7 1 refdes=in+ } C 54500 47100 1 0 0 out-1.sym { T 54500 47400 5 10 0 0 0 0 1 device=OUTPUT T 55200 47200 5 10 1 1 0 1 1 refdes=out } C 45500 44300 1 0 0 in-1.sym { T 45500 44600 5 10 0 0 0 0 1 device=INPUT T 45500 44400 5 10 1 1 0 7 1 refdes=in- } C 47500 50000 1 270 0 in-1.sym { T 47800 50000 5 10 0 0 270 0 1 device=INPUT T 47600 50100 5 10 1 1 90 1 1 refdes=V+ } C 47700 42900 1 90 0 in-1.sym { T 47400 42900 5 10 0 0 90 0 1 device=INPUT T 47600 42800 5 10 1 1 270 1 1 refdes=V- } C 40800 40200 0 0 0 title-A3.sym { T 54300 40600 5 10 1 1 0 0 1 revision=$Revision: 7287 $ T 54300 40300 5 10 1 1 0 0 1 author=SiB T 50400 40600 5 10 1 1 0 0 1 file=biashk.sch T 50400 40900 5 10 1 1 0 0 1 svnid=$Id: biashk_pos.sch 7287 2019-02-15 15:28:50Z stephan $ T 49800 41300 5 10 1 1 0 0 1 title=Bias Current HK amplifier } C 51800 46800 1 0 0 AD8005-1.sym { T 52250 47150 5 8 1 1 0 0 1 device=AD8641 T 52200 47700 5 10 1 1 0 0 1 refdes=U2 T 52400 46600 5 10 0 1 0 0 1 footprint=SC70_5 T 52400 47000 5 10 0 1 0 0 1 value=none } C 51400 45300 1 0 0 resistor-2.sym { T 51800 45650 5 10 0 0 0 0 1 device=RESISTOR T 51850 45400 5 10 1 1 0 4 1 refdes=R6 T 51600 45450 5 10 0 1 0 0 1 footprint=C0603 T 51750 45250 5 10 1 1 0 2 1 value=0Ω } C 53600 47100 1 0 0 resistor-2.sym { T 54000 47450 5 10 0 0 0 0 1 device=RESISTOR T 54050 47200 5 10 1 1 0 4 1 refdes=R9 T 53800 47250 5 10 0 1 0 0 1 footprint=C0603 T 53850 47050 5 10 1 1 0 2 1 value=10kΩ } N 51400 45400 51100 45400 4 N 51100 45400 51100 47000 4 C 51700 47300 1 270 1 gnd-1.sym N 52300 45400 53400 45400 4 N 53400 45400 53400 47200 4 N 53000 47200 53600 47200 4 { T 53100 47250 5 10 1 1 0 0 1 netname=U2out } N 52500 47600 52500 49200 4 N 52500 49200 47600 49200 4 N 52500 46800 52500 43500 4 N 52500 43500 47600 43500 4 N 47600 43500 47600 46600 4