v 20220529 2
L 300 200 300 800 3 0 0 0 -1 -1
T 700 900 5 10 0 0 0 0 1
device=74HC1G08
T 700 1100 5 10 0 0 0 0 1
slot=1
T 700 1300 5 10 0 0 0 0 1
numslots=3
T 700 1500 5 10 0 0 0 0 1
slotdef=1:1,2,4
T 700 1700 5 10 0 0 0 0 1
slotdef=2:1,3,4
A 300 500 300 270 180 3 0 0 0 -1 -1
P 600 500 800 500 1 0 1
{
T 700 550 5 8 1 1 0 0 1
pinnumber=4
T 700 450 5 8 0 1 0 2 1
pinseq=3
T 550 500 9 8 0 1 0 6 1
pinlabel=Y
T 550 500 5 8 0 1 0 8 1
pintype=out
}
P 300 700 100 700 1 0 1
{
T 200 750 5 8 1 1 0 6 1
pinnumber=1
T 200 650 5 8 0 1 0 8 1
pinseq=1
T 350 700 9 8 0 1 0 0 1
pinlabel=A
T 350 700 5 8 0 1 0 2 1
pintype=in
}
P 300 300 100 300 1 0 1
{
T 200 350 5 8 1 1 0 6 1
pinnumber=2
T 200 250 5 8 0 1 0 8 1
pinseq=2
T 350 300 9 8 0 1 0 0 1
pinlabel=B
T 350 300 5 8 0 1 0 2 1
pintype=in
}
T 450 500 8 10 1 1 0 4 1
refdes=U?
T 700 1900 5 10 0 0 0 0 1
footprint=SC70_5
T 700 2100 5 10 0 0 0 0 1
description=AND gates with 2 inputs