icucore.fit.rpt:Warning: PLL "pll384:pll0|altpll:altpll_component|altpll_c433:auto_generated|pll1" has parameter clk1_counter set to C1 specified but port CLK[1] is not connected
icucore.fit.rpt:Warning: Feature LogicLock is only available with a valid subscription license. Please purchase a software subscription to gain full access to this feature.
icucore.fit.rpt:Warning: Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
icucore.fit.rpt:Warning: Following 7 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
icucore.fit.rpt: Warning: Pin "clk_T1" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_T1(n)"
icucore.fit.rpt: Warning: Pin "spi_miso" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_miso(n)"
icucore.fit.rpt: Warning: Pin "trigger" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "trigger(n)"
icucore.fit.rpt: Warning: Pin "spi_sck" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_sck(n)"
icucore.fit.rpt: Warning: Pin "clk_12" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_12(n)"
icucore.fit.rpt: Warning: Pin "FE_clk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "FE_clk(n)"
icucore.fit.rpt: Warning: Pin "spi_mosi" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_mosi(n)"
icucore.fit.rpt:Warning: Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
icucore.fit.rpt:Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
icucore.fit.rpt:Warning: Following 24 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
icucore.map.rpt:; Tx_busy ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
icucore.map.rpt:; Tx_full ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
icucore.map.rpt:; Rx_busy ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
icucore.map.rpt:; Rx_brk ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
icucore.map.rpt:; Rx_attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
icucore.map.rpt:; rbi ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
icucore.map.rpt:; halffull ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
icucore.map.rpt:Warning: PLL "pll384:pll0|altpll:altpll_component|altpll_c433:auto_generated|pll1" has parameter clk1_counter set to C1 specified but port CLK[1] is not connected
icucore.map.rpt:Warning: PLL "pll384:pll0|altpll:altpll_component|altpll_c433:auto_generated|pll1" has parameter clk1_counter set to C1 specified but port CLK[1] is not connected