quartus/nm_mcs.fit.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/nm_mcs.fit.rpt:Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
quartus/nm_mcs.fit.rpt:Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
quartus/nm_mcs.fit.rpt:Warning (176674): Following 9 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "clk_T1" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_T1(n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "spi_miso" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_miso(n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "trigger" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "trigger(n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "ARx[3]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[3](n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "ARx[2]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[2](n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "ARx[1]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "ARx[1](n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "spi_sck" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_sck(n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "clk_12" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "clk_12(n)"
quartus/nm_mcs.fit.rpt: Warning (176118): Pin "spi_mosi" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "spi_mosi(n)"
quartus/nm_mcs.fit.rpt:Warning (176250): Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
quartus/nm_mcs.fit.rpt:Warning (176251): Ignoring some wildcard destinations of fast I/O register assignments
quartus/nm_mcs.fit.rpt:Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
quartus/nm_mcs.fit.rpt:Warning (169064): Following 3 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
quartus/nm_mcs.map.rpt:; word ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; attn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; fifo_empty ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; c0 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; c2 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:; c4 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
quartus/nm_mcs.map.rpt:Warning (20028): Parallel compilation is not licensed and has been disabled
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at ms5540c.v(120): Parameter Declaration in module "ms5540c" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at nmmcs.v(258): Parameter Declaration in module "mcs" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at nmmcs.v(85): Parameter Declaration in module "spectrum" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at nmmcs.v(86): Parameter Declaration in module "spectrum" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(455): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(485): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(489): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(490): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(491): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at uart.v(492): Parameter Declaration in module "uart" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (12125): Using design file nmbaro.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
quartus/nm_mcs.map.rpt:Warning (10222): Verilog HDL Parameter Declaration warning at nmbaro.v(60): Parameter Declaration in module "nmbaro" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List
quartus/nm_mcs.map.rpt:Warning (10230): Verilog HDL assignment warning at nmbaro.v(30): truncated value with size 32 to match size of target (8)
quartus/nm_mcs.map.rpt:Warning (10230): Verilog HDL assignment warning at nmbaro.v(32): truncated value with size 32 to match size of target (8)
quartus/nm_mcs.map.rpt:Warning (10230): Verilog HDL assignment warning at nmbaro.v(49): truncated value with size 32 to match size of target (16)
quartus/nm_mcs.map.rpt:Warning (10230): Verilog HDL assignment warning at nmbaro.v(79): truncated value with size 32 to match size of target (8)
quartus/nm_mcs.map.rpt:Warning (10230): Verilog HDL assignment warning at nmbaro.v(83): truncated value with size 32 to match size of target (10)
quartus/nm_mcs.map.rpt:Warning (10230): Verilog HDL assignment warning at nmbaro.v(123): truncated value with size 32 to match size of target (16)
quartus/nm_mcs.map.rpt:Warning (14284): Synthesized away the following node(s):
quartus/nm_mcs.map.rpt: Warning (14285): Synthesized away the following RAM node(s):
quartus/nm_mcs.map.rpt:Warning (15899): PLL "pll200:pll0|altpll:altpll_component|altpll_7263:auto_generated|pll1" has parameters clk0_multiply_by and clk0_divide_by specified but port CLK[0] is not connected
quartus/nm_mcs.map.rpt:Warning (332060): Node: DISC[6] was determined to be a clock but was found without an associated clock assignment.
quartus/nm_mcs.map.rpt:Warning (21074): Design contains 27 input pin(s) that do not drive logic