solo_altera/sirena/altera/encode/Makefile

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Makefile
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export PATH = /usr/bin:/usr:.
VERILOGFLAGS = -v -Wall -DSIMULATION $($*_FLAGS)
VERILOG=iverilog
%.vvp: %.v
$(VERILOG) $(VERILOGFLAGS) -o $@ $^
all: diff
diff: vcd/encode.lxt
diff -u encode.gold encode.log
encode_FLAGS = -s encode_test -DENCODE_TEST
compression.vvp: encode.v
compression_FLAGS = -s compression_test -DCOMPRESSION_TEST
vcd/%.lxt: %.vvp
$< -lxt2 | tee $*.log