| .. |
|
actel
|
HETEPTDIG EM/V04: Libero Project files updated
|
2014-06-06 04:41:52 +00:00 |
|
doc
|
heteptdig datasheet: change of encoding low count rates
|
2020-12-03 20:53:06 +00:00 |
|
heteptana.gold
|
heteptana: gold
|
2019-10-16 15:58:07 +00:00 |
|
heteptana.gtkw
|
meps_ana_test: syntax error free
|
2019-10-16 17:36:02 +00:00 |
|
heteptana.qpf
|
adapt adctest as heteptana
|
2012-08-02 21:51:29 +00:00 |
|
heteptana.qsf
|
heteptana: altera bitfile
|
2015-03-10 21:37:36 +00:00 |
|
heteptana.sdc
|
heteptana: altera bitfile
|
2015-03-10 21:37:36 +00:00 |
|
heteptana.v
|
meps_ana_test: syntax error free
|
2019-10-16 17:36:02 +00:00 |
|
heteptana.warnings
|
heteptana: altera bitfile
|
2015-03-10 21:37:36 +00:00 |
|
heteptana_test.v
|
meps_ana_test: syntax error free
|
2019-10-16 17:36:02 +00:00 |
|
heteptcore.v
|
hetept por: self init message
|
2018-11-21 14:36:11 +00:00 |
|
hkadc.gold
|
heteptana hkadc:
|
2014-11-20 13:42:59 +00:00 |
|
hkadc.gtkw
|
48 MHz ser_clk without PLL, hkadc
|
2012-08-03 23:34:41 +00:00 |
|
hkadc.v
|
heteptana: merge -c 3599,3602 from em/v04
|
2014-12-10 20:09:43 +00:00 |
|
Makefile
|
meps_ana_test: syntax error free
|
2019-10-16 17:36:02 +00:00 |
|
opheater.v
|
fpgas: add module por: Power On Reset
|
2015-04-12 19:47:48 +00:00 |
|
trigger.v
|
draft trigger module for flight
|
2012-08-09 00:39:37 +00:00 |
61400ce703