d4343bb384
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@3921 bc5caf13-1734-44f8-af43-603852e9ee25
51 lines
6.3 KiB
Text
51 lines
6.3 KiB
Text
heteptana.asm.rpt:Info: Quartus II Assembler was successful. 0 errors, 0 warnings
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heteptana.fit.rpt: 5. I/O Assignment Warnings
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heteptana.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
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heteptana.fit.rpt:; I/O Assignment Warnings ;
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heteptana.fit.rpt:Warning: Feature LogicLock is only available with a valid subscription license. Please purchase a software subscription to gain full access to this feature.
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heteptana.fit.rpt:Warning: Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
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heteptana.fit.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
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heteptana.fit.rpt:Warning: Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
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heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[5] to I/O pin
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heteptana.fit.rpt: Warning: Can't pack node filter:f|dout[5] and I/O node SDATA[15] -- I/O node is a dedicated I/O pin
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heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[12] to I/O pin
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heteptana.fit.rpt: Warning: Can't pack node filter:f|dout[12] and I/O node SDATA[22] -- I/O node is a dedicated I/O pin
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heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[15] to I/O pin
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heteptana.fit.rpt: Warning: Can't pack node filter:f|dout[15] and I/O node SDATA[25] -- I/O node is a dedicated I/O pin
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heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[14] to I/O pin
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heteptana.fit.rpt: Warning: Can't pack node filter:f|dout[14] and I/O node SDATA[24] -- I/O node is a dedicated I/O pin
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heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[17] to I/O pin
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heteptana.fit.rpt: Warning: Can't pack node filter:f|dout[17] and I/O node SDATA[27] -- I/O node is a dedicated I/O pin
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heteptana.fit.rpt:Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
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heteptana.fit.rpt:Warning: 32 pins must meet Altera requirements for 3.3, 3.0, and 2.5-V interfaces. Refer to the device Application Note 447 (Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems).
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heteptana.fit.rpt:Info: Quartus II Fitter was successful. 0 errors, 16 warnings
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heteptana.map.rpt:; CSn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; SCLKn ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; dout1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; dine ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; n ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; rrn ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (7 bits) it drives. The 25 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
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heteptana.map.rpt:; dout1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; doute ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; din1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:; dine ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/serializer.v(188)
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../irena/altera/adc128/sfilter.v(459)
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/adc128s102.v(13)
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/adc128s102.v(15)
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/adc128s102.v(68)
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at hkadc.v(9)
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heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at hkadc.v(30)
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heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(402): truncated value with size 16 to match size of target (4)
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heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1374): truncated value with size 30 to match size of target (16)
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heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1425): truncated value with size 3 to match size of target (2)
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heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1436): truncated value with size 4 to match size of target (3)
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heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1438): truncated value with size 4 to match size of target (3)
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heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(39): truncated value with size 30 to match size of target (12)
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heteptana.map.rpt:Warning: 3 hierarchies have connectivity warnings - see the Connectivity Checks report folder
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heteptana.map.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
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heteptana.map.rpt:Info: Quartus II Analysis & Synthesis was successful. 0 errors, 56 warnings
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heteptana.sta.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
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heteptana.sta.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
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heteptana.sta.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
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heteptana.sta.rpt:Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 3 warnings
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