solo_altera/hetept/altera/heteptana.warnings

heteptana.asm.rpt:Info: Quartus II Assembler was successful. 0 errors, 0 warnings
heteptana.fit.rpt:  5. I/O Assignment Warnings
heteptana.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings                         ; Off                                   ; Off                                   ;
heteptana.fit.rpt:; I/O Assignment Warnings                            ;
heteptana.fit.rpt:Warning: Feature LogicLock is only available with a valid subscription license. Please purchase a software subscription to gain full access to this feature.
heteptana.fit.rpt:Warning: Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
heteptana.fit.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
heteptana.fit.rpt:Warning: Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[5] to I/O pin
heteptana.fit.rpt:    Warning: Can't pack node filter:f|dout[5] and I/O node SDATA[15] -- I/O node is a dedicated I/O pin
heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[12] to I/O pin
heteptana.fit.rpt:    Warning: Can't pack node filter:f|dout[12] and I/O node SDATA[22] -- I/O node is a dedicated I/O pin
heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[15] to I/O pin
heteptana.fit.rpt:    Warning: Can't pack node filter:f|dout[15] and I/O node SDATA[25] -- I/O node is a dedicated I/O pin
heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[14] to I/O pin
heteptana.fit.rpt:    Warning: Can't pack node filter:f|dout[14] and I/O node SDATA[24] -- I/O node is a dedicated I/O pin
heteptana.fit.rpt:Warning: Can't pack node filter:f|dout[17] to I/O pin
heteptana.fit.rpt:    Warning: Can't pack node filter:f|dout[17] and I/O node SDATA[27] -- I/O node is a dedicated I/O pin
heteptana.fit.rpt:Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
heteptana.fit.rpt:Warning: 32 pins must meet Altera requirements for 3.3, 3.0, and 2.5-V interfaces. Refer to the device Application Note 447 (Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems).
heteptana.fit.rpt:Info: Quartus II Fitter was successful. 0 errors, 16 warnings
heteptana.map.rpt:; CSn   ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; SCLKn ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; dout1 ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; dine  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; n     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; rrn       ; Input ; Warning  ; Input port expression (32 bits) is wider than the input port (7 bits) it drives.  The 25 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
heteptana.map.rpt:; dout1 ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; doute ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; din1  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:; dine  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/serializer.v(188)
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../irena/altera/adc128/sfilter.v(459)
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/adc128s102.v(13)
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/adc128s102.v(15)
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at ../../altera/adc128s102.v(68)
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at hkadc.v(9)
heteptana.map.rpt:Warning (10335): Unrecognized synthesis attribute "synthesis" at hkadc.v(30)
heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(402): truncated value with size 16 to match size of target (4)
heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1374): truncated value with size 30 to match size of target (16)
heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1425): truncated value with size 3 to match size of target (2)
heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1436): truncated value with size 4 to match size of target (3)
heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at sfilter.v(1438): truncated value with size 4 to match size of target (3)
heteptana.map.rpt:Warning (10230): Verilog HDL assignment warning at itof.v(39): truncated value with size 30 to match size of target (12)
heteptana.map.rpt:Warning: 3 hierarchies have connectivity warnings - see the Connectivity Checks report folder
heteptana.map.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
heteptana.map.rpt:Info: Quartus II Analysis & Synthesis was successful. 0 errors, 56 warnings
heteptana.sta.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
heteptana.sta.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
heteptana.sta.rpt:Warning: Node: ARxCd[1] was determined to be a clock but was found without an associated clock assignment.
heteptana.sta.rpt:Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 3 warnings