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solo_altera/sirena/altera/l3
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terasa 16509299c8 l3.tex: Fix TRIM description. 
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@7294 bc5caf13-1734-44f8-af43-603852e9ee25
2019-02-20 11:23:14 +00:00
..
adder.v l3/adder: rewrite, to see if the Aldec worst path can be optimized 2015-03-03 22:28:52 +00:00
adderi.v l3: revert part of -c 3723: leave verilog files where they were 2015-01-30 08:35:57 +00:00
bitrange.v l3: revert part of -c 3723: leave verilog files where they were 2015-01-30 08:35:57 +00:00
cmp.v l3: revert part of -c 3723: leave verilog files where they were 2015-01-30 08:35:57 +00:00
l3.tex l3.tex: Fix TRIM description. 2019-02-20 11:23:14 +00:00
l3regfifo.v l3: revert part of -c 3723: leave verilog files where they were 2015-01-30 08:35:57 +00:00
log7to4.v l3: revert part of -c 3723: leave verilog files where they were 2015-01-30 08:35:57 +00:00
mult.v l3: revert part of -c 3723: leave verilog files where they were 2015-01-30 08:35:57 +00:00
processor.v l3: pipeline bug fixes 2015-04-19 03:28:25 +00:00
trim.v l3 trim: fix for 9-bit input 2015-04-19 03:20:52 +00:00