solo_altera/erena/altera/erena.map.summary
stephan a03b1930f7 fix 64-bit clock
git-svn-id: svn+ssh://asterix.ieap.uni-kiel.de/home/subversion/stephan/solo/eda@1455 bc5caf13-1734-44f8-af43-603852e9ee25
2013-01-11 08:37:45 +00:00

14 lines
466 B
Text

Analysis & Synthesis Status : Successful - Thu Jan 10 10:43:50 2013
Quartus II Version : 9.1 Build 304 01/25/2010 SP 1 SJ Web Edition
Revision Name : erena
Top-level Entity Name : erena
Family : Cyclone III
Total logic elements : 29,368
Total combinational functions : 19,075
Dedicated logic registers : 23,788
Total registers : 23788
Total pins : 49
Total virtual pins : 0
Total memory bits : 458,752
Embedded Multiplier 9-bit elements : 128
Total PLLs : 1