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d495bc2db1
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d495bc2db1 | ||
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f839ce7def | ||
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4a8a9e3022 |
4 changed files with 18 additions and 27 deletions
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@ -28,8 +28,8 @@ const struct config config = {
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.pwm_max = 0xffff,
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.pwm_max = 0xffff,
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#endif
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#endif
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#ifdef HAVE_FPGA
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#ifdef HAVE_FPGA
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.fpga_config_page = 1,
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.fpga_config_page = 8,
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.fpga_config_count = 511,
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.fpga_config_count = 504,
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#endif
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#endif
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};
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};
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16
src/dose.py
16
src/dose.py
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@ -220,7 +220,7 @@ class dose_cmd(uart.uart):
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r.append((dc, self.adc()))
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r.append((dc, self.adc()))
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return r
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return r
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def flash(self, op=None, resp=True, poll=False, **aa):
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def flash(self, op=None, resp=False, poll=False, **aa):
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c = "F"
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c = "F"
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if poll:
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if poll:
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c = "F@"
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c = "F@"
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@ -254,6 +254,7 @@ class dose_cmd(uart.uart):
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self.wait_for_spi()
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self.wait_for_spi()
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def wait_for_spi(self):
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def wait_for_spi(self):
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return
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while True:
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while True:
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r = self.cmd("F")[1]
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r = self.cmd("F")[1]
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if not r:
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if not r:
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@ -298,10 +299,7 @@ class dose_cmd(uart.uart):
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def flash_status(self, blocking=False):
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def flash_status(self, blocking=False):
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r = (0,0,bytes(2))
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r = (0,0,bytes(2))
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while not r[2][0] & 0x80:
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while not r[2][0] & 0x80:
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self.flash("Status", what="cmdbuf")
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r = self.flash("Status", resp=True, what="cmdbuf")
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r = self.cmd("F<")
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while r[1]:
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r = self.cmd("F<")
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if not blocking:
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if not blocking:
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break
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break
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return tuple(r[2][:2])
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return tuple(r[2][:2])
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@ -312,10 +310,10 @@ class dose_cmd(uart.uart):
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self.flash("Program2", page=page)
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self.flash("Program2", page=page)
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self.flash_status(True)
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self.flash_status(True)
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def write_file2flash(self, page, fn):
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def write_file2flash(self, page, fn, pages):
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n = 0
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n = 0
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with open(fn, "rb") as f:
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with open(fn, "rb") as f:
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while True:
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while not pages or n < pages:
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b =f.read(512)
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b =f.read(512)
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if not b:
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if not b:
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break
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break
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@ -344,7 +342,7 @@ class dose_cmd(uart.uart):
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self.flash(op)
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self.flash(op)
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def flash_Id(self):
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def flash_Id(self):
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r = self.flash("Id", what="cmdbuf")
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r = self.flash("Id", resp=True, what="cmdbuf")
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i = r[2][:5]
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i = r[2][:5]
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print(f"FLASH chip {b2hex(i)}", file=sys.stderr)
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print(f"FLASH chip {b2hex(i)}", file=sys.stderr)
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return i
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return i
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@ -375,7 +373,7 @@ class dose_cmd(uart.uart):
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FPGA_FLGS = {
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FPGA_FLGS = {
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"ABORT": 0x01,
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"ABORT": 0x01,
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"ABORTED": 0x10,
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"DEAD": 0x10,
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"BUSY": 0x20,
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"BUSY": 0x20,
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"SUBMITTED": 0x40,
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"SUBMITTED": 0x40,
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"CONFIG": 0x80,
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"CONFIG": 0x80,
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17
src/fpga.c
17
src/fpga.c
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@ -38,21 +38,15 @@ void fpga_cmd(struct fpga_cmd *c)
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uint8_t n = c->n;
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uint8_t n = c->n;
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uint8_t z = c->z;
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uint8_t z = c->z;
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if (fpga_status() != as_configured) {
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if (fpga_status() != as_configured) {
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c->n = n | fpga_dead;
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n |= fpga_dead;
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if (~n & fpga_configure) {
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c->n = n;
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return;
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return;
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}
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}
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if (n & fpga_abort && spi_abort()) {
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c->n = n | fpga_aborted;
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return;
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}
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}
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else if (spi_busy_p()) {
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c->n = n & ~fpga_busy | fpga_submitted;
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c->n = n | fpga_busy;
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return;
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}
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c->n = n & ~fpga_busy;
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if (n & fpga_submitted)
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if (n & fpga_submitted)
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return;
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return;
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c->n = n | fpga_submitted;
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spi_select(n & fpga_configure ? SPI_CONFIG : 0);
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spi_select(n & fpga_configure ? SPI_CONFIG : 0);
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spi.csize = n &= fpga_size;
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spi.csize = n &= fpga_size;
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@ -62,7 +56,8 @@ void fpga_cmd(struct fpga_cmd *c)
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if (z & fpga_wait_nonzero) {
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if (z & fpga_wait_nonzero) {
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spi.isize = n + (z>>3 & fpga_size); // ignore cmd ± (z[6:4])
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spi.isize = n + (z>>3 & fpga_size); // ignore cmd ± (z[6:4])
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spi.zsize = spi.rsize = z & fpga_size; // read x[3:1] words
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spi.zsize = spi.rsize = z & fpga_size; // read x[3:1] words
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spi.mask = 0xff; // start reading at the first nonzero byte after cmd
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// start reading at the first byte with MSB set after cmd
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spi.mask = spi.wait = 0x80;
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}
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}
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else {
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else {
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spi.zsize = z &= 0x7e; // send z zeros/nop after cmd
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spi.zsize = z &= 0x7e; // send z zeros/nop after cmd
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@ -8,13 +8,11 @@ struct fpga_cmd {
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};
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};
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enum fpga_flags {
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enum fpga_flags {
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fpga_abort = 0x01,
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fpga_size = 0x0e,
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fpga_size = 0x0e,
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fpga_aborted = 0x10,
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fpga_dead = 0x10,
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fpga_busy = 0x20,
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fpga_busy = 0x20,
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fpga_submitted = 0x40,
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fpga_submitted = 0x40,
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fpga_configure = 0x80,
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fpga_configure = 0x80,
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fpga_dead = 0x80,
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fpga_wait_nonzero = 0x01,
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fpga_wait_nonzero = 0x01,
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};
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};
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