Compare commits
No commits in common. "7bc2c22137cfbcc89a5ab954be57b677905a38d8" and "7b4724ef3759c9edb2508a4accd7a8061707b70d" have entirely different histories.
7bc2c22137
...
7b4724ef37
147 changed files with 213 additions and 38522 deletions
26
.gitignore
vendored
26
.gitignore
vendored
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@ -1,26 +0,0 @@
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|||
*~
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||||
fp.py
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||||
__pycache__/
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||||
*.cmd
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||||
*.pcb.bak*
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||||
#*
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||||
*#
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||||
*.new.pcb
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||||
*.save
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||||
fpga/quartus
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||||
fpga/db/
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fpga/incremental_db/
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thhor_crs.xy
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||||
*.gbr
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||||
*.cnc
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||||
*.zip
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||||
gerber/*.pdf
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||||
gerber/*.odt
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||||
gerber/thhor_crs-*.png
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||||
*.o
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||||
*.d
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||||
*.eeprom
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||||
*.hex
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||||
*.map
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||||
pdfs/
|
||||
sensor/*.pdf
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||||
3
.gitmodules
vendored
3
.gitmodules
vendored
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@ -1,3 +0,0 @@
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|||
[submodule "src/bch4369"]
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||||
path = src/bch4369
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||||
url = git@codeberg.org:SiB64/bch4369
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||||
279
FSH-PZO.sch
279
FSH-PZO.sch
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@ -1,279 +0,0 @@
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|||
v 20220529 2
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||||
C 38700 45200 1 0 0 input-1.sym
|
||||
{
|
||||
T 38700 45500 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 38750 45300 5 10 1 1 0 1 1
|
||||
refdes=in
|
||||
}
|
||||
C 45500 45000 1 0 0 output-1.sym
|
||||
{
|
||||
T 45600 45300 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 45750 45100 5 10 1 1 0 1 1
|
||||
refdes=out
|
||||
}
|
||||
C 43500 46200 1 0 0 capacitor-1.sym
|
||||
{
|
||||
T 44100 46500 5 10 1 1 0 0 1
|
||||
refdes=C3
|
||||
T 44100 46250 5 10 1 1 0 0 1
|
||||
value=$C3
|
||||
T 43700 46000 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 43700 47100 5 10 0 0 0 0 1
|
||||
symversion=0.1
|
||||
}
|
||||
N 44200 45500 44200 45800 4
|
||||
N 44200 43500 44200 44700 4
|
||||
C 43400 47100 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 43600 47400 5 10 1 1 0 0 1
|
||||
refdes=R3
|
||||
T 43600 46900 5 10 1 1 0 0 1
|
||||
value=$R3
|
||||
T 43600 46900 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 43700 44900 43600 44900 4
|
||||
N 43600 45300 43700 45300 4
|
||||
{
|
||||
T 43400 45300 5 10 1 1 0 0 1
|
||||
netname=u1inv
|
||||
}
|
||||
N 45200 45100 45200 47200 4
|
||||
N 45200 47200 44300 47200 4
|
||||
N 43400 47200 42600 47200 4
|
||||
N 44400 46400 45200 46400 4
|
||||
N 43500 46400 42600 46400 4
|
||||
C 43500 44600 1 0 0 gnd-1.sym
|
||||
N 44700 45100 45500 45100 4
|
||||
{
|
||||
T 44900 46500 5 10 1 1 0 4 1
|
||||
netname=u1out
|
||||
}
|
||||
C 43500 42300 1 0 0 gnd-1.sym
|
||||
N 44200 45800 44900 45800 4
|
||||
{
|
||||
T 44950 43550 5 10 1 1 0 0 1
|
||||
netname=u1vss
|
||||
}
|
||||
N 44200 43500 43600 43500 4
|
||||
{
|
||||
T 43600 43550 5 10 1 1 0 0 1
|
||||
netname=u1vcc
|
||||
}
|
||||
C 44800 42300 1 0 0 gnd-1.sym
|
||||
C 43500 45500 1 180 1 AD8005-1.sym
|
||||
{
|
||||
T 43400 45550 5 8 1 1 0 0 1
|
||||
device=AD8005
|
||||
T 43500 46000 5 10 1 1 180 6 1
|
||||
refdes=U1
|
||||
T 43400 45700 5 7 1 1 0 0 1
|
||||
footprint=SOT23_5
|
||||
T 44200 45100 5 10 1 1 180 4 1
|
||||
model-name=CFA
|
||||
T 43500 45500 5 10 0 0 180 6 1
|
||||
value=AD8005
|
||||
}
|
||||
N 42600 45300 42600 47200 4
|
||||
C 41200 45100 1 0 0 capacitor-1.sym
|
||||
{
|
||||
T 41550 45350 5 10 1 1 0 6 1
|
||||
refdes=C1
|
||||
T 41550 45250 5 10 1 1 0 8 1
|
||||
value=$C1
|
||||
T 41200 44900 5 10 1 1 0 0 1
|
||||
footprint=C0805
|
||||
T 41400 46000 5 10 0 0 0 0 1
|
||||
symversion=0.1
|
||||
}
|
||||
C 44300 42600 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 44050 43000 5 10 1 1 90 6 1
|
||||
refdes=R5
|
||||
T 44050 43100 5 10 1 1 90 0 1
|
||||
value=75Ω
|
||||
T 44500 42800 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 45300 43500 1 270 0 resistor-1.sym
|
||||
{
|
||||
T 45250 42950 5 10 1 1 90 6 1
|
||||
refdes=R4
|
||||
T 45250 43050 5 10 1 1 90 0 1
|
||||
value=75Ω
|
||||
T 45100 43300 5 10 0 1 270 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 44900 45800 44900 43500 4
|
||||
C 42700 45200 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 42900 45500 5 10 1 1 0 0 1
|
||||
refdes=R2
|
||||
T 42900 45000 5 10 1 1 0 0 1
|
||||
value=220Ω
|
||||
T 42900 45000 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 42100 45300 42700 45300 4
|
||||
{
|
||||
T 42600 46450 5 10 1 1 0 0 1
|
||||
netname=u1fb
|
||||
}
|
||||
N 41200 45300 40400 45300 4
|
||||
{
|
||||
T 40700 45350 5 10 1 1 0 0 1
|
||||
netname=inz
|
||||
}
|
||||
N 44900 43500 45400 43500 4
|
||||
C 43400 43500 1 270 0 capacitor-1.sym
|
||||
{
|
||||
T 44100 43300 5 10 0 0 270 0 1
|
||||
device=CAPACITOR
|
||||
T 43550 43150 5 10 1 1 90 0 1
|
||||
refdes=C5
|
||||
T 43600 43200 5 10 0 1 270 0 1
|
||||
footprint=C0603
|
||||
T 43600 43200 5 10 0 1 270 2 1
|
||||
value=100nF
|
||||
}
|
||||
C 44700 43500 1 270 0 capacitor-1.sym
|
||||
{
|
||||
T 45400 43300 5 10 0 0 270 0 1
|
||||
device=CAPACITOR
|
||||
T 44850 43150 5 10 1 1 90 0 1
|
||||
refdes=C4
|
||||
T 44900 43200 5 10 0 1 270 0 1
|
||||
footprint=C0603
|
||||
T 44900 43200 5 10 0 1 270 2 1
|
||||
value=100nF
|
||||
}
|
||||
C 44300 41800 1 90 0 input-1.sym
|
||||
{
|
||||
T 44000 41800 5 10 0 0 90 0 1
|
||||
device=INPUT
|
||||
T 44200 41850 5 10 1 1 90 1 1
|
||||
refdes=Vcc
|
||||
}
|
||||
C 45500 41700 1 90 0 input-1.sym
|
||||
{
|
||||
T 45200 41700 5 10 0 0 90 0 1
|
||||
device=INPUT
|
||||
T 45400 41750 5 10 1 1 90 1 1
|
||||
refdes=Vss
|
||||
}
|
||||
C 38200 38500 0 0 0 title-A3.sym
|
||||
{
|
||||
T 47700 39600 5 10 1 1 0 0 1
|
||||
id=$Id: FSH-PZO.sch 8584 2023-02-17 10:59:26Z stephan $
|
||||
T 47700 39200 5 10 1 1 0 0 1
|
||||
date=$Date: 2023-02-17 11:59:26 +0100 (Fr, 17 Feb 2023) $
|
||||
T 47700 38900 5 10 1 1 0 0 1
|
||||
filename=FSH-PZO.sch
|
||||
T 51700 38900 5 10 1 1 0 0 1
|
||||
revision=$Revision: 8584 $
|
||||
T 51700 38600 5 10 1 1 0 0 1
|
||||
author=$Author: stephan $
|
||||
}
|
||||
C 40600 44400 1 0 0 capacitor-1.sym
|
||||
{
|
||||
T 40950 44650 5 10 1 1 0 6 1
|
||||
refdes=C0
|
||||
T 40950 44550 5 10 1 1 0 8 1
|
||||
value=$C0
|
||||
T 40600 44200 5 10 1 1 0 0 1
|
||||
footprint=C0805
|
||||
}
|
||||
C 41600 44500 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 42050 44750 5 10 1 1 0 3 1
|
||||
refdes=R0
|
||||
T 42050 44450 5 10 1 1 0 5 1
|
||||
value=$R0
|
||||
T 41800 44300 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 41500 44600 41600 44600 4
|
||||
{
|
||||
T 41500 44650 5 10 1 1 0 3 1
|
||||
netname=pz
|
||||
}
|
||||
N 40600 45300 40600 44600 4
|
||||
N 42500 44200 42500 45300 4
|
||||
T 39000 41800 8 10 1 0 0 0 1
|
||||
parameter=C1:10nF
|
||||
T 39000 42000 8 10 1 0 0 0 1
|
||||
parameter=R1:220Ω (on preamp board)
|
||||
T 39000 41400 8 10 1 0 0 0 1
|
||||
parameter=C3:220pF
|
||||
T 39000 41600 8 10 1 0 0 0 1
|
||||
parameter=R3:10kΩ
|
||||
T 39000 41200 8 10 1 0 0 0 1
|
||||
parameter=R0:10kΩ
|
||||
T 39000 41000 8 10 1 0 0 0 1
|
||||
parameter=C0:220nF
|
||||
T 39000 42300 9 10 1 0 0 0 3
|
||||
Spaping time τ=2.2µs
|
||||
Pole-Zero comp τr=100µs
|
||||
Gain 16
|
||||
C 39500 45200 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 39950 45450 5 10 1 1 0 3 1
|
||||
refdes=R1
|
||||
T 39950 45150 5 10 1 1 0 5 1
|
||||
value=$R1
|
||||
T 39700 45000 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 42700 42500 1 0 0 input-1.sym
|
||||
{
|
||||
T 42700 42800 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 42750 42600 5 10 1 1 0 1 1
|
||||
refdes=GND
|
||||
}
|
||||
N 43600 42600 43500 42600 4
|
||||
C 42900 44100 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 43100 44400 5 10 1 1 0 0 1
|
||||
refdes=R6
|
||||
T 43100 43900 5 10 1 1 0 0 1
|
||||
value=$R6
|
||||
T 43100 43900 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 43800 44200 46200 44200 4
|
||||
N 42900 44200 42500 44200 4
|
||||
C 46100 41900 1 0 0 gnd-1.sym
|
||||
C 45700 43500 1 270 0 resistor-1.sym
|
||||
{
|
||||
T 45500 43300 5 10 0 1 270 0 1
|
||||
footprint=C0603
|
||||
T 45650 42950 5 10 1 1 90 6 1
|
||||
refdes=R7
|
||||
T 45650 43050 5 10 1 1 90 0 1
|
||||
value=75Ω
|
||||
}
|
||||
N 46200 43500 45800 43500 4
|
||||
{
|
||||
T 45700 43550 5 10 1 1 0 0 1
|
||||
netname=r6vss
|
||||
}
|
||||
C 46000 43500 1 270 0 capacitor-1.sym
|
||||
{
|
||||
T 46700 43300 5 10 0 0 270 0 1
|
||||
device=CAPACITOR
|
||||
T 46200 43200 5 10 0 1 270 0 1
|
||||
footprint=C0603
|
||||
T 46200 43200 5 10 0 1 270 2 1
|
||||
value=100nF
|
||||
T 46150 43150 5 10 1 1 90 0 1
|
||||
refdes=C7
|
||||
}
|
||||
N 46200 44200 46200 43500 4
|
||||
N 45800 42500 45400 42500 4
|
||||
N 45400 42500 45400 42600 4
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||||
N 45800 42500 45800 42600 4
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||||
N 46200 42200 46200 42600 4
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||||
133
LDO+1.sch
133
LDO+1.sch
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@ -1,133 +0,0 @@
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|||
v 20220529 2
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||||
C 40800 43800 0 0 0 title-A3.sym
|
||||
{
|
||||
T 49700 45300 15 10 1 1 0 0 1
|
||||
title=Low noise positive LDO regulator
|
||||
T 50300 44500 15 10 1 1 0 0 1
|
||||
Date=$Date: 2024-02-12 21:27:06 +0100 (Mo, 12 Feb 2024) $
|
||||
T 54400 44200 15 10 1 1 0 0 1
|
||||
revision=$Revision: 8853 $
|
||||
T 54400 43900 15 10 1 1 0 0 1
|
||||
author=$Author: stephan $
|
||||
T 49900 44900 15 10 1 1 0 0 1
|
||||
id=$Id: LDO+1.sch 8853 2024-02-12 20:27:06Z stephan $
|
||||
T 50300 44200 15 10 1 1 0 0 1
|
||||
Filename=LDO+1.sch
|
||||
}
|
||||
C 54800 47900 1 0 0 out-1.sym
|
||||
{
|
||||
T 54800 48200 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 55500 48000 5 10 1 1 0 0 1
|
||||
refdes=out
|
||||
}
|
||||
C 51200 46500 1 0 0 LT1761ES5-BYP.sym
|
||||
{
|
||||
T 52700 48100 5 10 0 1 0 0 1
|
||||
device=LT1761ES5-BYP
|
||||
T 51700 47500 5 10 1 1 0 0 1
|
||||
refdes=U1
|
||||
T 51700 47200 5 5 1 1 0 2 1
|
||||
footprint=SOT23_5
|
||||
T 51400 48300 5 10 1 1 0 0 1
|
||||
value=LT1761ES5-BYP
|
||||
}
|
||||
C 54300 47100 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 54300 47700 5 10 1 1 90 0 1
|
||||
refdes=C2
|
||||
T 54000 47300 5 10 1 1 180 0 1
|
||||
value=100nF
|
||||
T 54300 47000 5 10 1 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 52900 48000 54800 48000 4
|
||||
{
|
||||
T 52800 48000 5 10 1 1 0 0 1
|
||||
netname=out
|
||||
}
|
||||
N 54100 47100 52900 47100 4
|
||||
{
|
||||
T 52800 47100 5 10 1 1 0 0 1
|
||||
netname=byp
|
||||
}
|
||||
C 53100 46000 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 53300 46500 5 10 1 1 90 0 1
|
||||
refdes=R2
|
||||
T 53200 46300 5 10 1 1 0 0 1
|
||||
value=120kΩ
|
||||
T 52800 46200 5 10 1 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 53900 47900 1 180 0 resistor-1.sym
|
||||
{
|
||||
T 53400 47700 5 10 1 1 180 0 1
|
||||
refdes=R1
|
||||
T 53600 48300 5 10 1 1 180 0 1
|
||||
value=$R1
|
||||
T 53700 47500 5 10 1 1 180 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 52900 47800 53000 47800 4
|
||||
{
|
||||
T 52800 47800 5 10 1 1 0 0 1
|
||||
netname=adj
|
||||
}
|
||||
N 53900 47800 53900 48000 4
|
||||
N 53000 47800 53000 46900 4
|
||||
N 54800 47100 54800 46000 4
|
||||
N 50900 46000 54800 46000 4
|
||||
{
|
||||
T 51000 46000 5 10 1 1 0 0 1
|
||||
netname=gnd
|
||||
}
|
||||
N 52100 46000 52100 46500 4
|
||||
C 50300 45900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 46200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 46000 5 10 1 1 0 7 1
|
||||
refdes=GND
|
||||
}
|
||||
C 50300 47900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 48200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 48000 5 10 1 1 0 7 1
|
||||
refdes=in
|
||||
}
|
||||
N 50900 48000 51300 48000 4
|
||||
{
|
||||
T 51100 48000 5 10 1 1 0 0 1
|
||||
netname=in
|
||||
}
|
||||
N 50900 47100 50900 46000 4
|
||||
C 50700 48000 1 270 0 capacitor-4.sym
|
||||
{
|
||||
T 51800 47800 5 10 0 0 270 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 50800 47700 5 10 1 1 90 0 1
|
||||
refdes=C1
|
||||
T 51400 47800 5 10 0 0 270 0 1
|
||||
symversion=0.1
|
||||
T 50800 46800 5 10 1 1 90 0 1
|
||||
footprint=P1206
|
||||
T 49900 47400 5 10 1 1 0 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
C 54600 48000 1 270 0 capacitor-4.sym
|
||||
{
|
||||
T 55700 47800 5 10 0 0 270 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 54700 47700 5 10 1 1 90 0 1
|
||||
refdes=C3
|
||||
T 55300 47800 5 10 0 0 270 0 1
|
||||
symversion=0.1
|
||||
T 54700 46800 5 10 1 1 90 0 1
|
||||
footprint=P1206
|
||||
T 55100 47500 5 10 1 1 0 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
T 50100 48900 9 10 1 0 0 0 1
|
||||
IRENA: R2=2k, R1=6k2 (way lower than necessary)
|
||||
131
LDO-1.sch
131
LDO-1.sch
|
|
@ -1,131 +0,0 @@
|
|||
v 20220529 2
|
||||
C 40800 43800 0 0 0 title-A3.sym
|
||||
{
|
||||
T 49700 45300 15 10 1 1 0 0 1
|
||||
title=Low noise negative LDO regulator
|
||||
T 50300 44500 15 10 1 1 0 0 1
|
||||
Date=$Date: 2018-06-27 14:57:49 +0200 (Mi, 27 Jun 2018) $
|
||||
T 54400 44200 15 10 1 1 0 0 1
|
||||
revision=$Revision: 6895 $
|
||||
T 54400 43900 15 10 1 1 0 0 1
|
||||
author=$Author: stephan $
|
||||
T 49900 44900 15 10 1 1 0 0 1
|
||||
id=$Id: LDO-1.sch 6895 2018-06-27 12:57:49Z stephan $
|
||||
T 50300 44200 15 10 1 1 0 0 1
|
||||
Filename=LDO-1.sch
|
||||
}
|
||||
C 54800 47900 1 0 0 out-1.sym
|
||||
{
|
||||
T 54800 48200 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 55500 48000 5 10 1 1 0 0 1
|
||||
refdes=out
|
||||
}
|
||||
C 54300 47100 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 54300 47700 5 10 1 1 90 0 1
|
||||
refdes=C2
|
||||
T 54000 47300 5 10 1 1 180 0 1
|
||||
value=10nF
|
||||
T 54300 47000 5 10 1 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 52900 48000 54800 48000 4
|
||||
{
|
||||
T 52800 48000 5 10 1 1 0 0 1
|
||||
netname=out
|
||||
}
|
||||
N 54100 47100 52900 47100 4
|
||||
{
|
||||
T 52800 47100 5 10 1 1 0 0 1
|
||||
netname=byp
|
||||
}
|
||||
C 53100 46000 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 53300 46500 5 10 1 1 90 0 1
|
||||
refdes=R2
|
||||
T 53200 46300 5 10 1 1 0 0 1
|
||||
value=120kΩ
|
||||
T 52800 46200 5 10 1 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 53900 47900 1 180 0 resistor-1.sym
|
||||
{
|
||||
T 53400 47700 5 10 1 1 180 0 1
|
||||
refdes=R1
|
||||
T 53200 48100 5 10 1 1 0 0 1
|
||||
value=$R1
|
||||
T 53700 47500 5 10 1 1 180 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
N 52900 47800 53000 47800 4
|
||||
{
|
||||
T 52800 47800 5 10 1 1 0 0 1
|
||||
netname=adj
|
||||
}
|
||||
N 53900 47800 53900 48000 4
|
||||
N 53000 47800 53000 46900 4
|
||||
N 54800 47100 54800 46000 4
|
||||
N 50900 46000 54800 46000 4
|
||||
{
|
||||
T 51000 46000 5 10 1 1 0 0 1
|
||||
netname=gnd
|
||||
}
|
||||
N 52100 46000 52100 46500 4
|
||||
C 50300 45900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 46200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 46000 5 10 1 1 0 7 1
|
||||
refdes=GND
|
||||
}
|
||||
C 50300 47900 1 0 0 in-1.sym
|
||||
{
|
||||
T 50300 48200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 50300 48000 5 10 1 1 0 7 1
|
||||
refdes=in
|
||||
}
|
||||
N 50900 48000 51300 48000 4
|
||||
{
|
||||
T 51100 48000 5 10 1 1 0 0 1
|
||||
netname=in
|
||||
}
|
||||
N 50900 47100 50900 46000 4
|
||||
C 51100 47100 1 90 0 capacitor-4.sym
|
||||
{
|
||||
T 50000 47300 5 10 0 0 90 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 51100 47700 5 10 1 1 90 0 1
|
||||
refdes=C1
|
||||
T 50400 47300 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 51100 46800 5 10 1 1 90 0 1
|
||||
footprint=P1206
|
||||
T 50600 47500 5 10 1 1 180 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
C 55000 47100 1 90 0 capacitor-4.sym
|
||||
{
|
||||
T 53900 47300 5 10 0 0 90 0 1
|
||||
device=POLARIZED_CAPACITOR
|
||||
T 55000 47700 5 10 1 1 90 0 1
|
||||
refdes=C3
|
||||
T 54300 47300 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 55000 46600 5 10 1 1 90 0 1
|
||||
footprint=P1206
|
||||
T 55700 47300 5 10 1 1 180 0 1
|
||||
value=10µF 25V
|
||||
}
|
||||
C 51200 46500 1 0 0 LT1964ES5-BYP.sym
|
||||
{
|
||||
T 52700 48100 5 10 0 1 0 0 1
|
||||
device=LT1964ES5-BYP
|
||||
T 51700 47500 5 10 1 1 0 0 1
|
||||
refdes=U1
|
||||
T 51700 47200 5 5 1 1 0 2 1
|
||||
footprint=SOT23_5
|
||||
T 51400 48300 5 10 1 1 0 0 1
|
||||
value=LT1964ES5-BYP
|
||||
}
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
|
||||
PROJ=thhor
|
||||
PROJ=hallo
|
||||
|
||||
PATH:=/usr/local/bin:$(PATH)
|
||||
VPATH=.:bch4369
|
||||
|
|
@ -7,12 +7,12 @@ VPATH=.:bch4369
|
|||
default: all
|
||||
all: $(PROJ).hex $(PROJ)_all
|
||||
|
||||
thhor_all: thhor.eeprom
|
||||
CFLAGS_thhor = -Ibch4369 -DHAVE_FPGA -DSEND_HEX -DTHHOR
|
||||
MCU_thhor = attiny3224
|
||||
SN_thhor = 1
|
||||
C_FILES_thhor = config.c uart.c cmd.c base85.c rtc.c adc.c pwm.c spi.c flash.c bch4369.c
|
||||
S_FILES_thhor = uart_tx.S base85a.S
|
||||
hallo_all: hallo.eeprom
|
||||
CFLAGS_hallo = -Ibch4369 -DHAVE_nFETs -DSEND_HEX -DHALLO
|
||||
MCU_hallo = attiny424
|
||||
SN_hallo = 1
|
||||
C_FILES_hallo = config.c uart.c cmd.c base85.c rtc.c adc.c pwm.c spi.c flash.c bch4369.c
|
||||
S_FILES_hallo = uart_tx.S base85a.S
|
||||
|
||||
dose_all: dose.eeprom dose.userrow
|
||||
SN_dose = 1
|
||||
|
|
@ -79,7 +79,7 @@ OBJCOPY = avr-objcopy
|
|||
|
||||
pMCU-attiny424 = t424
|
||||
pMCU-attiny824 = t824
|
||||
pMCU-attiny3224 = t3224
|
||||
pMCU-attiny824 = t3224
|
||||
|
||||
# WDT
|
||||
fuse0_dose= 0x00
|
||||
|
|
@ -98,19 +98,16 @@ fuse7_dose= 0x00
|
|||
# BOOTEND
|
||||
fuse8_dose= 0x00
|
||||
fuses_dose =$(patsubst %, 0x%, 00 00 7e ff ff f7 ff 00 00)
|
||||
fuses_thhor = $(fuses_dose)
|
||||
|
||||
AVRDUDEPROG = avrdude
|
||||
AVRDUDE = $(AVRDUDEPROG)
|
||||
AVRDUDE_PROGRAMMER = serialupdi
|
||||
AVRDUDE_PORT = /dev/ttyUSB0
|
||||
AVRDUDE_PORT = /dev/ttyUSB1
|
||||
|
||||
AD = $(AVRDUDE) -p $(pMCU-$(MCU)) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
|
||||
|
||||
|
||||
|
||||
sig_dose = 0x1e 0x92 0x2c
|
||||
sig_thhor = 0x1e 0x95 0x28
|
||||
sig_hallo = 0x1e 0x92 0x2c
|
||||
|
||||
id: $(PROJ).id
|
||||
%.id:
|
||||
|
|
@ -132,8 +129,8 @@ ad: $(PROJ).ad
|
|||
fuse: $(PROJ).fuse$F
|
||||
|
||||
%.fuse$F:
|
||||
echo "$*: fuse$F = $(fuse$F_dose)"
|
||||
[ -n "$(fuse$F_dose)" ] && $(AD) -B 5 -U fuse$F:w:$(fuse$F_dose):m
|
||||
echo "$*: fuse$F = $(fuse$F_$*)"
|
||||
[ -n "$(fuse$F_$*)" ] && $(AD) -B 5 -U fuse$F:w:$(fuse$F_$*):m
|
||||
|
||||
clean:
|
||||
rm -f *.hex *.o *.s *.map *.elf *.d
|
||||
205
README.md
205
README.md
|
|
@ -1,19 +1,194 @@
|
|||
# THHΘR Cosmic Ray Sensor
|
||||
# Turbo Weather
|
||||
|
||||
## Sensor
|
||||
## ATtiny424SS resources
|
||||
|
||||
CHAOS Jr: HET BGO and 2× HETB.
|
||||
- BGO: 2 photodiodes × 2 gains = 4 channels
|
||||
- HETB: 2 detector × 2 segments × 2 gains = 8 channels
|
||||
- `TCA0-WO0-PB0`: generate the 32768kHz clock for the MS5534C
|
||||
- `SPI0-PA1…3`: communication with the MS5534C
|
||||
- `USART0-RxD/TxD-PB2…3`: transmission of data, receive commands
|
||||
- `PORTB-PB1`: enable the RF power regulator
|
||||
- `PORTA-PA5`: light up the LED
|
||||
- `ADC0-PA4,6,7`: read Batterie, NTC, and RF power voltage, and internal sources.
|
||||
- `PIT`: generate clock tick, to wake the µC once per second from deep sleep.
|
||||
- `USERROW`: store persistent configuration
|
||||
- `EEPROM`: store `ADC` readings configuration, store sensor test data records.
|
||||
- `RAM`: 256 byte TX buffer, 16 bytes RX buffer, ~128 bytes stack.
|
||||
- `FLASH`: pretty full. With lots of assembly, -O2 fits with -DDEBUG.
|
||||
|
||||
## Electronics
|
||||
## Source files
|
||||
|
||||
- 6 preamps
|
||||
- 12 channel DORN readout, dual gain
|
||||
- 10LC25 FPGA
|
||||
- ATtiny824-XF
|
||||
- AT45B161E for FPGA bitfile and data
|
||||
- RS485 half duplex ifc to OBC
|
||||
- optional HSS serial ifc/spacewire.
|
||||
|
||||
|
||||
- `bate.c`: main program, interface to the MS5534C
|
||||
- `calib.c`: calculate the calibrated the pressure sensor readings.
|
||||
- `adc.c`: configure and run the ADC, calculate calibrated results
|
||||
- `mul.c`: handcraft 16-bit multiplication and decimal printing.
|
||||
- `rtc.c`: configure the _periodic interrupt timer_ `PIT`.
|
||||
- `spi.c`: configure the `SPI0` and run a 16-bit frame.
|
||||
- `uart.c`: configure the USART0, provide Tx and Rx buffers for IO.
|
||||
- `cmd.c`: parse and run simple commands received from the UART.
|
||||
|
||||
## Output records
|
||||
|
||||
The programm issues several types of output lines. Each type is
|
||||
prefixed with a unique capital letter.
|
||||
|
||||
- `V`: sent at boot, a greeting and version.
|
||||
- `B`: sent at boot, a single byte `RSTCTRL.RSTFR`, the reset reason.
|
||||
- `S`: config record (`SEND_CONFIG`): hex dump of the `SIGROW`.
|
||||
- `F`: config record (`SEND_CONFIG`): hex dump of the `FUSES`.
|
||||
- `U`: config record (`SEND_CONFIG`): hex dump of the `USERROW`.
|
||||
- `C`: config record (`SEND_CONFIG`): hex dump of the `config` structure in `RAM`.
|
||||
- `E`: config record (`SEND_CONFIG`): hex dump of the ADC configuration in `EEPROM`.
|
||||
- `W`: calibration record (`SEND_BATEW`): sensor calibration data (hex) read from the sensor.
|
||||
- `D`: sensor record (`SEND_BATED`): sensor reading data (hex) acquired from the sensor.
|
||||
- `P`: pressure record (`SEND_CALIB`): sensor readings in natural units.
|
||||
- `A`: ADC readings (`SEND_ADC_HEX`): hex words, 16-bit range.
|
||||
- `V`: ADC readings (`SEND_ADC_VOLT`): calibrated, natural units.
|
||||
- `X`: Debug (`SEND_DEBUG`): hex dump of the `debug_data` structure.
|
||||
- `R`: command reception.
|
||||
|
||||
Config records are sent at boot, with test data, and when enabled via
|
||||
`SEND_CONFIG` with a subset of sensor readings. The config byte `confp`
|
||||
is the number of readings sent in between without sending config records.
|
||||
|
||||
Debug data is only available when not disabled during compilation. Do
|
||||
`make DEBUG=-DNODEBUG` to disable all debugging code and data.
|
||||
|
||||
The `SEND` flags are stored in byte[3] of the `config` structure to
|
||||
enable the respective output records, with the bit positions
|
||||
|
||||
- `SEND_CONFIG = 0x01`
|
||||
- `SEND_BATED = 0x02`
|
||||
- `SEND_BATEW = 0x04`
|
||||
- `SEND_CLOCK = 0x08`
|
||||
- `SEND_CALIB = 0x10`
|
||||
- `SEND_ADC_HEX = 0x20`
|
||||
- `SEND_ADC_VOLT = 0x40`
|
||||
- `SEND_DEBUG = 0x80`
|
||||
|
||||
## Configuration
|
||||
|
||||
At boot, the configuration is copied from the `USERROW` to the
|
||||
`config` structure in `RAM`, if the first byte in the `USERROW` is
|
||||
the magic `0xba`, and the second byte matches the version of the
|
||||
`config` structure, currently `0x08`. Else, the defaults are used.
|
||||
|
||||
The config structure is
|
||||
- `[0]`: `magic = 0xba`.
|
||||
- `[1]`: `version = 0x08`.
|
||||
- `[2]`: `triggers`: trigger enables.
|
||||
- `[3]`: `send`: output data configuration.
|
||||
- `[4]`: `power`: power management.
|
||||
- `[5]`: `calib_test`: number of test records to send after a reset.
|
||||
- `[6]`: `spi_div`: `SPI0.CTRLA.SPI_PRESC` \[÷64\]
|
||||
- `[7]`: `mclk_delay`: number of `MCLK` ticks to wait before a reading.
|
||||
- `[8]`: `period`: number of seconds-1 between readings.
|
||||
- `[9]`: `confp`: number of readings without config records.
|
||||
- `[10]`: `cpu_clk`: `CLKCTRL.MCLKCTRLB` \[÷2\]
|
||||
- `[11]`: `mclk_period`: `TCA0.SINGLE.CMP0` \[÷76\]
|
||||
- `[12]`: `baud_div`: two bytes little endian \[÷16667\]
|
||||
- `[14]`: `uart_mode`: `USART0.CTRLB`
|
||||
- `[15]`: `pit_period`: `RTC.CLKSEL` \[÷1024\]
|
||||
- `[16]`: `immediate`: number of immediate readings at boot.
|
||||
|
||||
### Triggers
|
||||
|
||||
The `triggers` byte\[2\] enables various reasons to do a sensor reading.
|
||||
|
||||
- `TRIGGER_ONCE = 0x01`: one reading at boot.
|
||||
- `TRIGGER_CONT = 0x02`: continuously read the sensor.
|
||||
- `TRIGGER_UART = 0x04`: read the sensor when the UART Rx input toggles.
|
||||
- `TRIGGER_CLOCK = 0x08`: read periodically, every `period`+1 _seconds_.
|
||||
- `TRIGGER_BREAK = 0x10`: read continuously while the UART Rx input is low.
|
||||
- `TRIGGER_IMMED = 0x20`: do any requested immediate readings.
|
||||
|
||||
_Seconds_ are define by the `PIT`. Those can be up to 8 real seconds
|
||||
long, or much shorter. _Immediate_ readings can be requested at boot
|
||||
or via the command `T`.
|
||||
|
||||
### Power
|
||||
|
||||
The bits in the power byte\[4\] are
|
||||
|
||||
- `POWER_DOWN = 0x01`: Enter `POWER_DOWN` sleep between readings.
|
||||
- `POWER_DOWN_CLI = 0x02`: Disable interrupts before `POWER_DOWN`.
|
||||
- `STOP_MCLK = 0x04`: Stop the `MCLK` after the reading.
|
||||
- `POWER_LED = 0x08`: Turn on the LED during a reading.
|
||||
- `POWER_STDBY = 0x10`: Enter `STANDBY` sleep between readings.
|
||||
- `POWER_RX = 0x20`: Do not `POWER_DOWN` when the `UART` Rx is active
|
||||
- `POWER_RF = 0x40`: Turn on the RF transmitter power.
|
||||
- `POWER_LINE = 0x80`: Send a preamble after rfen()
|
||||
|
||||
`POWER_STDBY` is sufficient to reduce the power to a minimum.
|
||||
`POWER_RX` does not seem to work. From `POWER_DOWN_CLI` we shall
|
||||
never wake up, unless the `WDT` is enabled in the fuses. When the
|
||||
`MCLK` is stopped after a reading, it will be truned on and
|
||||
`mclk_delay` ticks must pass before communication with the sensor
|
||||
resumes. That delay is probably not necessary. `POWER_RF` is
|
||||
necessary to bias the NTC measured by ADC readings. The `POWER_LINE`
|
||||
preamble charges the AC-coupled output of the RF receiver to
|
||||
properly receive subsequent characters.
|
||||
|
||||
## Commands
|
||||
|
||||
Commandlines received via the UART must be in the format
|
||||
- `«C» {[«space»]+ «hex»}+ [«space»]+ «linefeed»`
|
||||
|
||||
A command letter, uppercase, and up to seven (optionally space
|
||||
separated) hex bytes, optionally followed by more space characters and
|
||||
a linefeed. A hex character is one or two hex digits, letters `a`…`f`
|
||||
_must_ be lowercase. Obviously, a single hex digit must be separated
|
||||
with space characters from any following byte. No spaces are required
|
||||
at all when all bytes are written with two digits. The Rx buffer can
|
||||
accomodate commandlines up to 15 bytes long, including the newline
|
||||
char.
|
||||
|
||||
The parser echos the received line, preceeded with the string `R>`.
|
||||
When the command is valid, the answer bytes are sent prefixed with
|
||||
`R!`. Invalid commands are answered with `R?`.
|
||||
|
||||
Most commands require a specific number of hex bytes as arguments. As
|
||||
currently implemented, all commands echo all their arguments and one
|
||||
additional byte.
|
||||
|
||||
### List of commands:
|
||||
|
||||
- `R «ccp»`: Reboot the µC. The argument byte must be `d8`, the
|
||||
`CCP[IOREG]` key, to validate the reset.
|
||||
|
||||
- `C «key» «bytes»…`: write to the `config` structure in `RAM`
|
||||
- `U «key» «bytes»…`: write to persistent config in the `USERROW`
|
||||
- `E «key» «bytes»…`: write to `EEPROM`
|
||||
|
||||
Up to six «bytes» are written. The «key» must be `9d`, the
|
||||
`CCP[SPM]` key, for the persistent stores, and `ba` for the `RAM`.
|
||||
These commands return the old value of the first byte that was
|
||||
written.
|
||||
|
||||
- `T «n»`: trigger «n» more immediate sensor readings.
|
||||
|
||||
- `M «aaaa»`: reads any memory address «aaaa» (two bytes, big endian)
|
||||
and prints the byte.
|
||||
|
||||
- `W «aaaa» «bb»`: write a byte «bb» into any address «aaaa», return
|
||||
the old value of that memory location.
|
||||
|
||||
- `K «bb» «bb» «bb» «bb»`: set the clock. The 32-bit time value must
|
||||
be sent little endian.
|
||||
|
||||
- `D «n»`: process and send calibrated readings for «n» test data
|
||||
records. The `EEPROM` has space for up to five data records.
|
||||
|
||||
## Toolchain
|
||||
|
||||
The ATtiny424 µC requires an up-to-date toolchain
|
||||
- binutits: `./configure --target=avr --program-prefix=avr-`
|
||||
- gcc: `../gcc/configure --program-prefix=avr- --with-avrlibc --target=avr --enable-languages=c --disable-nls`
|
||||
- avr-libc: `./configure --host=avr`
|
||||
|
||||
## TODO (all done)
|
||||
- √ Use the SPI hardware to talk to the sensor.
|
||||
- √ Send results via UART hardware.
|
||||
- × Setup the watchdog. √ Use PIT instead
|
||||
- √ Control power to the RF transmitter
|
||||
- √ Light the LED.
|
||||
- √ Readout the ADCs, thermistors.
|
||||
- √ Readout the internal temperature sensor.
|
||||
|
|
|
|||
1
bch4369
Submodule
1
bch4369
Submodule
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 7f5400fa08129800f103be9a4f3caeeb677c5219
|
||||
180
biashk_pos.sch
180
biashk_pos.sch
|
|
@ -1,180 +0,0 @@
|
|||
v 20220529 2
|
||||
C 49500 46900 1 0 0 resistor-2.sym
|
||||
{
|
||||
T 49900 47250 5 10 0 0 0 0 1
|
||||
device=RESISTOR
|
||||
T 49950 47000 5 10 1 1 0 4 1
|
||||
refdes=R4
|
||||
T 49700 47050 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 49850 46850 5 10 1 1 0 2 1
|
||||
value=0Ω
|
||||
}
|
||||
C 46900 46600 1 0 0 AD8005-1.sym
|
||||
{
|
||||
T 47350 46950 5 8 1 1 0 0 1
|
||||
device=AD8641
|
||||
T 47300 47500 5 10 1 1 0 0 1
|
||||
refdes=U1
|
||||
T 47500 46400 5 10 0 1 0 0 1
|
||||
footprint=SC70_5
|
||||
T 47500 46800 5 10 0 1 0 0 1
|
||||
value=AD8641
|
||||
}
|
||||
C 49000 45900 1 90 0 resistor-2.sym
|
||||
{
|
||||
T 48650 46300 5 10 0 0 90 0 1
|
||||
device=RESISTOR
|
||||
T 48900 46350 5 10 1 1 90 4 1
|
||||
refdes=R3
|
||||
T 48850 46100 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
T 49050 46150 5 10 1 1 90 2 1
|
||||
value=1MΩ
|
||||
}
|
||||
C 49000 44400 1 90 0 resistor-2.sym
|
||||
{
|
||||
T 48650 44800 5 10 0 0 90 0 1
|
||||
device=RESISTOR
|
||||
T 48900 44850 5 10 1 1 90 4 1
|
||||
refdes=R5
|
||||
T 48850 44600 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
T 49050 44650 5 10 1 1 90 2 1
|
||||
value=47kΩ
|
||||
}
|
||||
C 49700 45900 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 49000 46100 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 49550 46500 5 10 1 1 90 2 1
|
||||
refdes=C3
|
||||
T 48800 46100 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 49650 46200 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
T 49450 46450 5 10 1 1 90 0 1
|
||||
value=1nF
|
||||
}
|
||||
N 48100 47000 49500 47000 4
|
||||
{
|
||||
T 48200 47050 5 10 1 1 0 0 1
|
||||
netname=U1out
|
||||
}
|
||||
N 48900 47000 48900 46800 4
|
||||
N 49500 47000 49500 46800 4
|
||||
N 49500 45800 48900 45800 4
|
||||
N 48900 45900 48900 45300 4
|
||||
N 48900 45300 46700 45300 4
|
||||
N 46700 45300 46700 46800 4
|
||||
N 46700 46800 47100 46800 4
|
||||
{
|
||||
T 46650 46850 5 10 1 1 0 0 1
|
||||
netname=U1inv
|
||||
}
|
||||
N 47100 47200 46100 47200 4
|
||||
N 49500 45800 49500 45900 4
|
||||
C 49000 44100 1 0 1 gnd-1.sym
|
||||
N 47600 47400 47600 49400 4
|
||||
N 50400 47000 52000 47000 4
|
||||
{
|
||||
T 50500 47050 5 10 1 1 0 0 1
|
||||
netname=U2-
|
||||
}
|
||||
N 48900 44400 46100 44400 4
|
||||
C 45500 47100 1 0 0 in-1.sym
|
||||
{
|
||||
T 45500 47400 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 45500 47200 5 10 1 1 0 7 1
|
||||
refdes=in+
|
||||
}
|
||||
C 54500 47100 1 0 0 out-1.sym
|
||||
{
|
||||
T 54500 47400 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 55200 47200 5 10 1 1 0 1 1
|
||||
refdes=out
|
||||
}
|
||||
C 45500 44300 1 0 0 in-1.sym
|
||||
{
|
||||
T 45500 44600 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 45500 44400 5 10 1 1 0 7 1
|
||||
refdes=in-
|
||||
}
|
||||
C 47500 50000 1 270 0 in-1.sym
|
||||
{
|
||||
T 47800 50000 5 10 0 0 270 0 1
|
||||
device=INPUT
|
||||
T 47600 50100 5 10 1 1 90 1 1
|
||||
refdes=V+
|
||||
}
|
||||
C 47700 42900 1 90 0 in-1.sym
|
||||
{
|
||||
T 47400 42900 5 10 0 0 90 0 1
|
||||
device=INPUT
|
||||
T 47600 42800 5 10 1 1 270 1 1
|
||||
refdes=V-
|
||||
}
|
||||
C 40800 40200 0 0 0 title-A3.sym
|
||||
{
|
||||
T 54300 40600 5 10 1 1 0 0 1
|
||||
revision=$Revision: 7287 $
|
||||
T 54300 40300 5 10 1 1 0 0 1
|
||||
author=SiB <stephan@psjt.org>
|
||||
T 50400 40600 5 10 1 1 0 0 1
|
||||
file=biashk.sch
|
||||
T 50400 40900 5 10 1 1 0 0 1
|
||||
svnid=$Id: biashk_pos.sch 7287 2019-02-15 15:28:50Z stephan $
|
||||
T 49800 41300 5 10 1 1 0 0 1
|
||||
title=Bias Current HK amplifier
|
||||
}
|
||||
C 51800 46800 1 0 0 AD8005-1.sym
|
||||
{
|
||||
T 52250 47150 5 8 1 1 0 0 1
|
||||
device=AD8641
|
||||
T 52200 47700 5 10 1 1 0 0 1
|
||||
refdes=U2
|
||||
T 52400 46600 5 10 0 1 0 0 1
|
||||
footprint=SC70_5
|
||||
T 52400 47000 5 10 0 1 0 0 1
|
||||
value=none
|
||||
}
|
||||
C 51400 45300 1 0 0 resistor-2.sym
|
||||
{
|
||||
T 51800 45650 5 10 0 0 0 0 1
|
||||
device=RESISTOR
|
||||
T 51850 45400 5 10 1 1 0 4 1
|
||||
refdes=R6
|
||||
T 51600 45450 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 51750 45250 5 10 1 1 0 2 1
|
||||
value=0Ω
|
||||
}
|
||||
C 53600 47100 1 0 0 resistor-2.sym
|
||||
{
|
||||
T 54000 47450 5 10 0 0 0 0 1
|
||||
device=RESISTOR
|
||||
T 54050 47200 5 10 1 1 0 4 1
|
||||
refdes=R9
|
||||
T 53800 47250 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 53850 47050 5 10 1 1 0 2 1
|
||||
value=10kΩ
|
||||
}
|
||||
N 51400 45400 51100 45400 4
|
||||
N 51100 45400 51100 47000 4
|
||||
C 51700 47300 1 270 1 gnd-1.sym
|
||||
N 52300 45400 53400 45400 4
|
||||
N 53400 45400 53400 47200 4
|
||||
N 53000 47200 53600 47200 4
|
||||
{
|
||||
T 53100 47250 5 10 1 1 0 0 1
|
||||
netname=U2out
|
||||
}
|
||||
N 52500 47600 52500 49200 4
|
||||
N 52500 49200 47600 49200 4
|
||||
N 52500 46800 52500 43500 4
|
||||
N 52500 43500 47600 43500 4
|
||||
N 47600 43500 47600 46600 4
|
||||
|
|
@ -243,16 +243,7 @@ void parse_command(const uint8_t *s, uint8_t n)
|
|||
if (cmd_flag('<'))
|
||||
goto send_buffer;
|
||||
break;
|
||||
#ifdef HAVE_FPGA
|
||||
case 'O':
|
||||
r = !!(PEN_VPORT.IN & (1<<PEN_PIN));
|
||||
if (bflg == 1)
|
||||
PEN_VPORT.OUT &=~ (1<<PEN_PIN);
|
||||
else if (bflg == 2)
|
||||
PEN_VPORT.OUT |= (1<<PEN_PIN);
|
||||
break;
|
||||
#endif
|
||||
#ifndef THHOR
|
||||
#ifndef HALLO
|
||||
case 'P':
|
||||
if (have_b)
|
||||
pipe_config((void*)cmd_buffer);
|
||||
|
|
@ -272,7 +263,7 @@ void parse_command(const uint8_t *s, uint8_t n)
|
|||
fpga_cmd((void*)cmd_buffer);
|
||||
goto send_buffer;
|
||||
#endif
|
||||
#endif // THHOR
|
||||
#endif // HALLO
|
||||
case 'M':
|
||||
if (!have_b)
|
||||
goto error;
|
||||
471
dorn.sch
471
dorn.sch
|
|
@ -1,471 +0,0 @@
|
|||
v 20220529 2
|
||||
C 61100 31800 0 0 0 title-A3.sym
|
||||
{
|
||||
T 74700 31900 15 10 1 1 0 0 1
|
||||
author=$Author: stephan $
|
||||
T 74700 32200 15 10 1 1 0 0 1
|
||||
revision=$Revision: 9391 $
|
||||
T 70900 32800 15 10 1 1 0 0 1
|
||||
id=$Id: dorn-leia.sch 9391 2025-10-16 14:31:23Z stephan $
|
||||
}
|
||||
T 46400 60100 8 10 0 1 0 0 1
|
||||
netname=X41out
|
||||
T 72300 40300 8 10 0 1 0 0 1
|
||||
netname=X35in
|
||||
T 72300 35900 8 10 0 1 0 0 1
|
||||
netname=X36in
|
||||
C 71100 37700 1 0 0 ADC128S102-16.sym
|
||||
{
|
||||
T 71900 38300 5 10 1 1 0 0 1
|
||||
device=ADC128S102
|
||||
T 72200 39000 5 10 1 1 0 0 1
|
||||
refdes=U1
|
||||
T 73100 38300 5 10 1 1 0 2 1
|
||||
footprint=TSSOP_4_16
|
||||
T 72700 38550 5 7 0 1 180 0 1
|
||||
value=ADC128S102
|
||||
}
|
||||
C 72300 37400 1 0 0 gnd-1.sym
|
||||
C 71800 37400 1 0 0 gnd-1.sym
|
||||
C 72200 40100 1 0 0 generic-power.sym
|
||||
{
|
||||
T 72400 40350 5 10 0 1 270 7 1
|
||||
net=Vdig:1
|
||||
T 72400 40350 3 7 1 1 0 3 1
|
||||
value=Vdig
|
||||
}
|
||||
N 67300 39200 71100 39200 4
|
||||
{
|
||||
T 69200 39300 5 10 1 1 0 7 1
|
||||
netname=OUTA
|
||||
}
|
||||
C 70700 39700 1 270 1 capacitor-1.sym
|
||||
{
|
||||
T 71000 40050 5 10 1 1 270 1 1
|
||||
refdes=C0
|
||||
T 70600 40150 5 10 1 1 90 4 1
|
||||
value=10nF NP0
|
||||
T 71400 39900 5 10 0 0 90 2 1
|
||||
device=CAPACITOR
|
||||
T 71600 39900 5 10 0 0 90 2 1
|
||||
symversion=0.1
|
||||
T 70700 40200 5 10 1 1 90 2 1
|
||||
footprint=C0805
|
||||
}
|
||||
C 71000 40900 1 180 0 gnd-1.sym
|
||||
N 65600 39400 71100 39400 4
|
||||
{
|
||||
T 69200 39500 5 10 1 1 0 7 1
|
||||
netname=OUTB
|
||||
}
|
||||
N 70300 39400 70300 39700 4
|
||||
N 68100 39600 71100 39600 4
|
||||
{
|
||||
T 69200 39700 5 10 1 1 0 7 1
|
||||
netname=OUTC
|
||||
}
|
||||
N 69700 39200 69700 39700 4
|
||||
N 70900 39600 70900 39700 4
|
||||
C 71000 37200 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 70900 37300 5 10 1 1 90 1 1
|
||||
refdes=C7
|
||||
T 70900 37700 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 70300 37400 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 70100 37400 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 71000 37700 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 70500 37200 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 70400 37300 5 10 1 1 90 1 1
|
||||
refdes=C6
|
||||
T 70400 37700 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 69800 37400 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 69600 37400 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 70500 37700 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 70000 37200 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 69900 37300 5 10 1 1 90 1 1
|
||||
refdes=C5
|
||||
T 69900 37700 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 69300 37400 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 69100 37400 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 70000 37700 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 69500 37200 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 69400 37300 5 10 1 1 90 1 1
|
||||
refdes=C4
|
||||
T 69400 37700 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 68800 37400 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 68600 37400 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 69500 37700 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 69000 37200 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 68900 37300 5 10 1 1 90 1 1
|
||||
refdes=C3
|
||||
T 68900 37700 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 68300 37400 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 68100 37400 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 69000 37700 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 70700 36900 1 0 0 gnd-1.sym
|
||||
N 70800 38100 70800 38200 4
|
||||
N 66900 38200 71100 38200 4
|
||||
N 66900 38400 71100 38400 4
|
||||
N 70300 38400 70300 38100 4
|
||||
N 69800 38100 69800 38600 4
|
||||
N 66900 38600 71100 38600 4
|
||||
N 66900 38800 71100 38800 4
|
||||
N 69300 38800 69300 38100 4
|
||||
N 66900 39000 71100 39000 4
|
||||
N 68800 39000 68800 38100 4
|
||||
C 73600 35800 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 73500 35900 5 10 1 1 90 1 1
|
||||
refdes=C8
|
||||
T 73500 36300 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 72900 36000 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 72700 36000 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 73600 36300 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 74100 35800 1 90 0 capacitor-1.sym
|
||||
{
|
||||
T 74000 35900 5 10 1 1 90 1 1
|
||||
refdes=C9
|
||||
T 74000 36300 5 10 1 1 90 1 1
|
||||
value=100nF
|
||||
T 73400 36000 5 10 0 0 90 0 1
|
||||
device=CAPACITOR
|
||||
T 73200 36000 5 10 0 0 90 0 1
|
||||
symversion=0.1
|
||||
T 74100 36300 5 10 0 1 90 0 1
|
||||
footprint=C0603
|
||||
}
|
||||
C 73800 35500 1 0 0 gnd-1.sym
|
||||
C 73300 35500 1 0 0 gnd-1.sym
|
||||
C 71700 40100 1 0 0 generic-power.sym
|
||||
{
|
||||
T 71900 40350 5 10 0 1 270 7 1
|
||||
net=Vadc:1
|
||||
T 71900 40350 3 7 1 1 0 3 1
|
||||
value=Vadc
|
||||
}
|
||||
C 73700 36700 1 0 0 generic-power.sym
|
||||
{
|
||||
T 73900 36950 5 10 0 1 270 7 1
|
||||
net=Vdig:1
|
||||
T 73900 36950 3 7 1 1 0 3 1
|
||||
value=Vdig
|
||||
}
|
||||
C 68500 36000 1 90 0 resistor-1.sym
|
||||
{
|
||||
T 68200 36200 5 10 1 1 90 0 1
|
||||
refdes=R7
|
||||
T 68700 36200 5 10 1 1 90 0 1
|
||||
footprint=C0603
|
||||
T 68200 36600 5 10 1 1 90 0 1
|
||||
value=$R7
|
||||
}
|
||||
N 68400 36900 68400 38200 4
|
||||
C 75400 38800 1 0 0 output-1.sym
|
||||
{
|
||||
T 75500 39100 5 10 0 0 0 0 1
|
||||
device=OUTPUT
|
||||
T 75650 38900 5 10 1 1 0 1 1
|
||||
refdes=DOUT
|
||||
}
|
||||
C 64700 37100 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 64900 36900 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 65300 36900 5 10 1 1 0 0 1
|
||||
refdes=R2
|
||||
T 64800 36900 5 10 1 1 0 0 1
|
||||
value=100Ω
|
||||
}
|
||||
N 64700 41600 64600 41600 4
|
||||
{
|
||||
T 64600 41550 5 5 1 1 0 1 1
|
||||
netname=Aout
|
||||
}
|
||||
C 63600 40500 1 0 0 gnd-1.sym
|
||||
C 63800 42300 1 0 0 vcc-1.sym
|
||||
C 64200 40900 1 180 0 vss-1.sym
|
||||
N 64000 42300 64000 42500 4
|
||||
N 64000 40900 64000 40700 4
|
||||
N 63700 40800 63700 40700 4
|
||||
C 63100 36300 1 0 0 FSH-1.sym
|
||||
{
|
||||
T 63900 37400 5 10 0 1 0 0 1
|
||||
device=SK
|
||||
T 63500 37000 5 10 1 1 0 1 1
|
||||
refdes=C
|
||||
T 63500 37200 5 6 1 1 0 1 1
|
||||
source=FSH-PZO.sch
|
||||
}
|
||||
C 64700 39300 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 64900 39100 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 65300 39100 5 10 1 1 0 0 1
|
||||
refdes=R1
|
||||
T 64800 39100 5 10 1 1 0 0 1
|
||||
value=100Ω
|
||||
}
|
||||
N 64700 39400 64600 39400 4
|
||||
{
|
||||
T 64600 39350 5 5 1 1 0 1 1
|
||||
netname=Bout
|
||||
}
|
||||
C 63600 38300 1 0 0 gnd-1.sym
|
||||
C 63800 40100 1 0 0 vcc-1.sym
|
||||
C 64200 38700 1 180 0 vss-1.sym
|
||||
N 64000 40100 64000 40300 4
|
||||
N 64000 38700 64000 38500 4
|
||||
N 63700 38600 63700 38500 4
|
||||
C 63100 38500 1 0 0 FSH-1.sym
|
||||
{
|
||||
T 63900 39600 5 10 0 1 0 0 1
|
||||
device=SK
|
||||
T 63500 39200 5 10 1 1 0 1 1
|
||||
refdes=B
|
||||
T 63500 39400 5 6 1 1 0 1 1
|
||||
source=FSH-PZO.sch
|
||||
}
|
||||
C 64700 41500 1 0 0 resistor-1.sym
|
||||
{
|
||||
T 64900 41300 5 10 0 1 0 0 1
|
||||
footprint=C0603
|
||||
T 65300 41300 5 10 1 1 0 0 1
|
||||
refdes=R0
|
||||
T 64800 41300 5 10 1 1 0 0 1
|
||||
value=100Ω
|
||||
}
|
||||
N 64700 37200 64600 37200 4
|
||||
{
|
||||
T 64600 37150 5 5 1 1 0 1 1
|
||||
netname=Cout
|
||||
}
|
||||
C 63600 36100 1 0 0 gnd-1.sym
|
||||
C 63800 37900 1 0 0 vcc-1.sym
|
||||
C 64200 36500 1 180 0 vss-1.sym
|
||||
N 64000 37900 64000 38100 4
|
||||
N 64000 36500 64000 36300 4
|
||||
N 63700 36400 63700 36300 4
|
||||
C 63100 40700 1 0 0 FSH-1.sym
|
||||
{
|
||||
T 63900 41800 5 10 0 1 0 0 1
|
||||
device=SK
|
||||
T 63500 41400 5 10 1 1 0 1 1
|
||||
refdes=A
|
||||
T 63500 41600 5 6 1 1 0 1 1
|
||||
source=FSH-PZO.sch
|
||||
}
|
||||
C 73200 36700 1 0 0 generic-power.sym
|
||||
{
|
||||
T 73400 36950 5 10 0 1 270 7 1
|
||||
net=Vadc:1
|
||||
T 73400 36950 3 7 1 1 0 3 1
|
||||
value=Vadc
|
||||
}
|
||||
C 68600 36000 1 180 0 generic-power.sym
|
||||
{
|
||||
T 68400 35750 5 10 0 1 90 7 1
|
||||
net=Vadc:1
|
||||
T 68400 35750 3 7 1 1 180 3 1
|
||||
value=Vadc
|
||||
}
|
||||
N 68100 39600 68100 41600 4
|
||||
N 68100 41600 65600 41600 4
|
||||
N 67300 37200 67300 39200 4
|
||||
N 67300 37200 65600 37200 4
|
||||
C 64700 35500 1 0 0 input-1.sym
|
||||
{
|
||||
T 64700 35800 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 64750 35600 5 10 1 1 0 1 1
|
||||
refdes=VCC
|
||||
}
|
||||
C 64700 35000 1 0 0 input-1.sym
|
||||
{
|
||||
T 64700 35300 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 64750 35100 5 10 1 1 0 1 1
|
||||
refdes=VSS
|
||||
}
|
||||
C 72500 35700 1 0 0 input-1.sym
|
||||
{
|
||||
T 72500 36000 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 72550 35800 5 10 1 1 0 1 1
|
||||
refdes=AGND
|
||||
}
|
||||
C 62300 41500 1 0 0 input-1.sym
|
||||
{
|
||||
T 62300 41800 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 62350 41600 5 10 1 1 0 1 1
|
||||
refdes=IN0
|
||||
}
|
||||
C 62300 39300 1 0 0 input-1.sym
|
||||
{
|
||||
T 62300 39600 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 62350 39400 5 10 1 1 0 1 1
|
||||
refdes=IN1
|
||||
}
|
||||
C 62300 37100 1 0 0 input-1.sym
|
||||
{
|
||||
T 62300 37400 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 62350 37200 5 10 1 1 0 1 1
|
||||
refdes=IN2
|
||||
}
|
||||
N 73300 35800 73400 35800 4
|
||||
C 74800 36800 1 180 0 input-1.sym
|
||||
{
|
||||
T 74800 36500 5 10 0 0 180 0 1
|
||||
device=INPUT
|
||||
T 74750 36700 5 10 1 1 180 1 1
|
||||
refdes=VD
|
||||
}
|
||||
N 73900 36700 74000 36700 4
|
||||
C 72500 36600 1 0 0 input-1.sym
|
||||
{
|
||||
T 72500 36900 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 72550 36700 5 10 1 1 0 1 1
|
||||
refdes=VA
|
||||
}
|
||||
N 73300 36700 73400 36700 4
|
||||
C 76200 39600 1 180 0 input-1.sym
|
||||
{
|
||||
T 76200 39300 5 10 0 0 180 0 1
|
||||
device=INPUT
|
||||
T 76150 39500 5 10 1 1 180 1 1
|
||||
refdes=SCLK
|
||||
}
|
||||
C 66100 38900 1 0 0 input-1.sym
|
||||
{
|
||||
T 66100 39200 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 66150 39000 5 10 1 1 0 1 1
|
||||
refdes=IN3
|
||||
}
|
||||
C 66100 38700 1 0 0 input-1.sym
|
||||
{
|
||||
T 66100 39000 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 66150 38800 5 10 1 1 0 1 1
|
||||
refdes=IN4
|
||||
}
|
||||
C 66100 38500 1 0 0 input-1.sym
|
||||
{
|
||||
T 66100 38800 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 66150 38600 5 10 1 1 0 1 1
|
||||
refdes=IN5
|
||||
}
|
||||
C 66100 38300 1 0 0 input-1.sym
|
||||
{
|
||||
T 66100 38600 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 66150 38400 5 10 1 1 0 1 1
|
||||
refdes=IN6
|
||||
}
|
||||
C 66100 38100 1 0 0 input-1.sym
|
||||
{
|
||||
T 66100 38400 5 10 0 0 0 0 1
|
||||
device=INPUT
|
||||
T 66150 38200 5 10 1 1 0 1 1
|
||||
refdes=IN7
|
||||
}
|
||||
C 74700 35900 1 180 0 input-1.sym
|
||||
{
|
||||
T 74700 35600 5 10 0 0 180 0 1
|
||||
device=INPUT
|
||||
T 74650 35800 5 10 1 1 180 1 1
|
||||
refdes=DGND
|
||||
}
|
||||
N 75400 39500 74000 39500 4
|
||||
C 76200 39300 1 180 0 input-1.sym
|
||||
{
|
||||
T 76200 39000 5 10 0 0 180 0 1
|
||||
device=INPUT
|
||||
T 76150 39200 5 10 1 1 180 1 1
|
||||
refdes=nCS
|
||||
}
|
||||
N 75400 39200 74000 39200 4
|
||||
C 76200 38700 1 180 0 input-1.sym
|
||||
{
|
||||
T 76200 38400 5 10 0 0 180 0 1
|
||||
device=INPUT
|
||||
T 76150 38600 5 10 1 1 180 1 1
|
||||
refdes=DIN
|
||||
}
|
||||
N 75400 38600 74000 38600 4
|
||||
C 65500 35800 1 270 0 vcc-1.sym
|
||||
C 65500 35300 1 270 0 vss-1.sym
|
||||
C 70200 36900 1 0 0 gnd-1.sym
|
||||
C 69700 36900 1 0 0 gnd-1.sym
|
||||
C 69200 36900 1 0 0 gnd-1.sym
|
||||
C 68700 36900 1 0 0 gnd-1.sym
|
||||
C 70400 40900 1 180 0 gnd-1.sym
|
||||
C 69800 40900 1 180 0 gnd-1.sym
|
||||
C 70100 39700 1 270 1 capacitor-1.sym
|
||||
{
|
||||
T 70400 40050 5 10 1 1 270 1 1
|
||||
refdes=C1
|
||||
T 70000 40150 5 10 1 1 90 4 1
|
||||
value=10nF NP0
|
||||
T 70800 39900 5 10 0 0 90 2 1
|
||||
device=CAPACITOR
|
||||
T 71000 39900 5 10 0 0 90 2 1
|
||||
symversion=0.1
|
||||
T 70100 40200 5 10 1 1 90 2 1
|
||||
footprint=C0805
|
||||
}
|
||||
C 69500 39700 1 270 1 capacitor-1.sym
|
||||
{
|
||||
T 69800 40050 5 10 1 1 270 1 1
|
||||
refdes=C2
|
||||
T 69400 40150 5 10 1 1 90 4 1
|
||||
value=10nF NP0
|
||||
T 70200 39900 5 10 0 0 90 2 1
|
||||
device=CAPACITOR
|
||||
T 70400 39900 5 10 0 0 90 2 1
|
||||
symversion=0.1
|
||||
T 69500 40200 5 10 1 1 90 2 1
|
||||
footprint=C0805
|
||||
}
|
||||
T 65400 40000 9 10 1 0 0 0 2
|
||||
Channel Order was reversed
|
||||
for easier routing
|
||||
N 74000 38900 75400 38900 4
|
||||
|
|
@ -16,7 +16,7 @@ tty = None
|
|||
baud = 115200
|
||||
out = None
|
||||
debug = None
|
||||
map_fn = "thhor.map"
|
||||
map_fn = "hallo.map"
|
||||
|
||||
def Debug(e, *a):
|
||||
if debug:
|
||||
|
|
@ -358,25 +358,12 @@ class dose_cmd(uart.uart):
|
|||
self.flash(op, size=s, what=what, byte=i)
|
||||
self.wait_for_spi()
|
||||
|
||||
def power(self, on=None):
|
||||
if on==True:
|
||||
c = 'O1'
|
||||
elif on==False:
|
||||
c = 'O0'
|
||||
elif on is None:
|
||||
c = 'O'
|
||||
else:
|
||||
raise ValueError(f".power expects True or False, got {on!r}")
|
||||
r = self.cmd(c)
|
||||
print(f"Power was {("off", "ON")[r[1]]}", file=sys.stderr)
|
||||
return r
|
||||
|
||||
if tty:
|
||||
tty = dose_cmd(tty, baud)
|
||||
tty._export(globals())
|
||||
tty._verbose = False
|
||||
|
||||
uart.set_prompt("GRETEL")
|
||||
uart.set_prompt("TurboD")
|
||||
|
||||
def b2hex(b, sep=" "):
|
||||
return sep.join([f"{x:02x}" for x in b])
|
||||
|
|
@ -4,8 +4,8 @@
|
|||
*/
|
||||
MEMORY
|
||||
{
|
||||
eemap : ORIGIN = 0x1400, LENGTH = 0x100
|
||||
eedef : ORIGIN = 0x810000, LENGTH = 0x100
|
||||
eemap : ORIGIN = 0x1400, LENGTH = 0x80
|
||||
eedef : ORIGIN = 0x810000, LENGTH = 0x80
|
||||
uumap : ORIGIN = 0x1300, LENGTH = 0x20
|
||||
uudef : ORIGIN = 0x850000, LENGTH = 0x20
|
||||
}
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
#!/bin/sh -x
|
||||
sed -Ei 's, ([A-Z0-9]+/)?U\?-\?,,g' "$1.net"
|
||||
18
fp/BCN16.fp
18
fp/BCN16.fp
|
|
@ -1,18 +0,0 @@
|
|||
|
||||
Element["" "" "" "" 78400 377200 0 0 0 100 ""]
|
||||
(
|
||||
Pad[-4800 -4400 -4800 -2000 1600 2000 3600 "" "8" "square"]
|
||||
Pad[-1600 -4400 -1600 -2000 1600 2000 3600 "" "7" "square"]
|
||||
Pad[1600 -4400 1600 -2000 1600 2000 3600 "" "6" "square"]
|
||||
Pad[4800 -4400 4800 -2000 1600 2000 3600 "" "5" "square"]
|
||||
Pad[-4800 2000 -4800 4400 1600 2000 3600 "" "1" "square,edge2"]
|
||||
Pad[-1600 2000 -1600 4400 1600 2000 3600 "" "2" "square,edge2"]
|
||||
Pad[1600 2000 1600 4400 1600 2000 3600 "" "3" "square,edge2"]
|
||||
Pad[4800 2000 4800 4400 1600 2000 3600 "" "4" "square,edge2"]
|
||||
ElementLine [-6300 -3200 6300 -3200 800]
|
||||
ElementLine [6300 -3200 6300 3200 800]
|
||||
ElementLine [6300 3200 -6300 3200 800]
|
||||
ElementLine [-6300 3200 -6300 -3200 800]
|
||||
ElementLine [-6300 2200 -5500 3200 800]
|
||||
|
||||
)
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
Element["" "C0603" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-32mil -2mil -32mil 2mil 35mil 20mil 41mil "" "1" "square"]
|
||||
Pad[32mil -2mil 32mil 2mil 35mil 20mil 41mil "" "2" "square"]
|
||||
ElementLine[-30mil -15mil -30mil 15mil 5mil]
|
||||
ElementLine[-30mil 15mil 30mil 15mil 5mil]
|
||||
ElementLine[30mil 15mil 30mil -15mil 5mil]
|
||||
ElementLine[30mil -15mil -30mil -15mil 5mil]
|
||||
)
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
Element["" "C0805" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-34.5mil -10mil -34.5mil 10mil 40mil 20mil 46mil "" "1" "square"]
|
||||
Pad[34.5mil -10mil 34.5mil 10mil 40mil 20mil 46mil "" "2" "square"]
|
||||
ElementLine[-40mil -25mil -40mil 25mil 5mil]
|
||||
ElementLine[-40mil 25mil 40mil 25mil 5mil]
|
||||
ElementLine[40mil 25mil 40mil -25mil 5mil]
|
||||
ElementLine[40mil -25mil -40mil -25mil 5mil]
|
||||
)
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
Element["" "C1206" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-55mil -10mil -55mil 10mil 50mil 20mil 56mil "" "1" "square"]
|
||||
Pad[55mil -10mil 55mil 10mil 50mil 20mil 56mil "" "2" "square"]
|
||||
ElementLine[-60mil -30mil -60mil 30mil 5mil]
|
||||
ElementLine[-60mil 30mil 60mil 30mil 5mil]
|
||||
ElementLine[60mil 30mil 60mil -30mil 5mil]
|
||||
ElementLine[60mil -30mil -60mil -30mil 5mil]
|
||||
)
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
Element["" "C2220" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-80mil -62.5mil -80mil 62.5mil 100mil 20mil 106mil "" "1" "square"]
|
||||
Pad[80mil -62.5mil 80mil 62.5mil 100mil 20mil 106mil "" "2" "square"]
|
||||
ElementLine[-110mil -100mil -110mil 100mil 5mil]
|
||||
ElementLine[-110mil 100mil 110mil 100mil 5mil]
|
||||
ElementLine[110mil 100mil 110mil -100mil 5mil]
|
||||
ElementLine[110mil -100mil -110mil -100mil 5mil]
|
||||
)
|
||||
17
fp/DLP31D.fp
17
fp/DLP31D.fp
|
|
@ -1,17 +0,0 @@
|
|||
|
||||
Element["" "" "L?" "" 81.6000mm 17.1000mm -0.6000mm 0.6000mm 1 82 ""]
|
||||
(
|
||||
Pad[-1.1000mm -1.2000mm -0.6000mm -1.2000mm 0.4000mm 20.00mil 0.9080mm "1" "1" "square"]
|
||||
Pad[-1.1000mm -0.4000mm -0.6000mm -0.4000mm 0.4000mm 20.00mil 0.9080mm "2" "2" "square"]
|
||||
Pad[-1.1000mm 0.4000mm -0.6000mm 0.4000mm 0.4000mm 20.00mil 0.9080mm "3" "3" "square"]
|
||||
Pad[-1.1000mm 1.2000mm -0.6000mm 1.2000mm 0.4000mm 20.00mil 0.9080mm "4" "4" "square"]
|
||||
Pad[0.6000mm -1.2000mm 1.1000mm -1.2000mm 0.4000mm 20.00mil 0.9080mm "8" "8" "square,edge2"]
|
||||
Pad[0.6000mm -0.4000mm 1.1000mm -0.4000mm 0.4000mm 20.00mil 0.9080mm "7" "7" "square,edge2"]
|
||||
Pad[0.6000mm 0.4000mm 1.1000mm 0.4000mm 0.4000mm 20.00mil 0.9080mm "6" "6" "square,edge2"]
|
||||
Pad[0.6000mm 1.2000mm 1.1000mm 1.2000mm 0.4000mm 20.00mil 0.9080mm "5" "5" "square,edge2"]
|
||||
ElementLine [-0.8000mm -1.5000mm 0.8000mm -1.5000mm 0.1200mm]
|
||||
ElementLine [0.8000mm -1.5000mm 0.8000mm 1.5000mm 0.1200mm]
|
||||
ElementLine [0.8000mm 1.5000mm -0.8000mm 1.5000mm 0.1200mm]
|
||||
ElementLine [-0.8000mm 1.5000mm -0.8000mm -1.5000mm 0.1200mm]
|
||||
|
||||
)
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
Element["" "EIA7343" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-3.11mm 0 -3.33mm 0 2.55mm 20mil 2.7024mm "" "1" "square"]
|
||||
Pad[3.11mm 0mm 3.33mm 0mm 2.55mm 20mil 2.7024mm "" "2" "square"]
|
||||
ElementLine[-3.65mm -2.15mm -3.65mm 2.15mm 5mil]
|
||||
ElementLine[-3.65mm 2.15mm 3.65mm 2.15mm 5mil]
|
||||
ElementLine[3.65mm 2.15mm 3.65mm -2.15mm 5mil]
|
||||
ElementLine[3.65mm -2.15mm -3.65mm -2.15mm 5mil]
|
||||
ElementLine[-3.1025mm -2.15mm -3.1025mm 2.15mm 5mil]
|
||||
)
|
||||
|
|
@ -1,152 +0,0 @@
|
|||
Element["" "EQFP_20_144" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-10mm -8.75mm -10.9mm -8.75mm 0.25mm 20mil 0.4024mm "" "1" "square"]
|
||||
Pad[-10mm -8.25mm -10.9mm -8.25mm 0.25mm 20mil 0.4024mm "" "2" "square"]
|
||||
Pad[-10mm -7.75mm -10.9mm -7.75mm 0.25mm 20mil 0.4024mm "" "3" "square"]
|
||||
Pad[-10mm -7.25mm -10.9mm -7.25mm 0.25mm 20mil 0.4024mm "" "4" "square"]
|
||||
Pad[-10mm -6.75mm -10.9mm -6.75mm 0.25mm 20mil 0.4024mm "" "5" "square"]
|
||||
Pad[-10mm -6.25mm -10.9mm -6.25mm 0.25mm 20mil 0.4024mm "" "6" "square"]
|
||||
Pad[-10mm -5.75mm -10.9mm -5.75mm 0.25mm 20mil 0.4024mm "" "7" "square"]
|
||||
Pad[-10mm -5.25mm -10.9mm -5.25mm 0.25mm 20mil 0.4024mm "" "8" "square"]
|
||||
Pad[-10mm -4.75mm -10.9mm -4.75mm 0.25mm 20mil 0.4024mm "" "9" "square"]
|
||||
Pad[-10mm -4.25mm -10.9mm -4.25mm 0.25mm 20mil 0.4024mm "" "10" "square"]
|
||||
Pad[-10mm -3.75mm -10.9mm -3.75mm 0.25mm 20mil 0.4024mm "" "11" "square"]
|
||||
Pad[-10mm -3.25mm -10.9mm -3.25mm 0.25mm 20mil 0.4024mm "" "12" "square"]
|
||||
Pad[-10mm -2.75mm -10.9mm -2.75mm 0.25mm 20mil 0.4024mm "" "13" "square"]
|
||||
Pad[-10mm -2.25mm -10.9mm -2.25mm 0.25mm 20mil 0.4024mm "" "14" "square"]
|
||||
Pad[-10mm -1.75mm -10.9mm -1.75mm 0.25mm 20mil 0.4024mm "" "15" "square"]
|
||||
Pad[-10mm -1.25mm -10.9mm -1.25mm 0.25mm 20mil 0.4024mm "" "16" "square"]
|
||||
Pad[-10mm -0.75mm -10.9mm -0.75mm 0.25mm 20mil 0.4024mm "" "17" "square"]
|
||||
Pad[-10mm -0.25mm -10.9mm -0.25mm 0.25mm 20mil 0.4024mm "" "18" "square"]
|
||||
Pad[-10mm 0.25mm -10.9mm 0.25mm 0.25mm 20mil 0.4024mm "" "19" "square"]
|
||||
Pad[-10mm 0.75mm -10.9mm 0.75mm 0.25mm 20mil 0.4024mm "" "20" "square"]
|
||||
Pad[-10mm 1.25mm -10.9mm 1.25mm 0.25mm 20mil 0.4024mm "" "21" "square"]
|
||||
Pad[-10mm 1.75mm -10.9mm 1.75mm 0.25mm 20mil 0.4024mm "" "22" "square"]
|
||||
Pad[-10mm 2.25mm -10.9mm 2.25mm 0.25mm 20mil 0.4024mm "" "23" "square"]
|
||||
Pad[-10mm 2.75mm -10.9mm 2.75mm 0.25mm 20mil 0.4024mm "" "24" "square"]
|
||||
Pad[-10mm 3.25mm -10.9mm 3.25mm 0.25mm 20mil 0.4024mm "" "25" "square"]
|
||||
Pad[-10mm 3.75mm -10.9mm 3.75mm 0.25mm 20mil 0.4024mm "" "26" "square"]
|
||||
Pad[-10mm 4.25mm -10.9mm 4.25mm 0.25mm 20mil 0.4024mm "" "27" "square"]
|
||||
Pad[-10mm 4.75mm -10.9mm 4.75mm 0.25mm 20mil 0.4024mm "" "28" "square"]
|
||||
Pad[-10mm 5.25mm -10.9mm 5.25mm 0.25mm 20mil 0.4024mm "" "29" "square"]
|
||||
Pad[-10mm 5.75mm -10.9mm 5.75mm 0.25mm 20mil 0.4024mm "" "30" "square"]
|
||||
Pad[-10mm 6.25mm -10.9mm 6.25mm 0.25mm 20mil 0.4024mm "" "31" "square"]
|
||||
Pad[-10mm 6.75mm -10.9mm 6.75mm 0.25mm 20mil 0.4024mm "" "32" "square"]
|
||||
Pad[-10mm 7.25mm -10.9mm 7.25mm 0.25mm 20mil 0.4024mm "" "33" "square"]
|
||||
Pad[-10mm 7.75mm -10.9mm 7.75mm 0.25mm 20mil 0.4024mm "" "34" "square"]
|
||||
Pad[-10mm 8.25mm -10.9mm 8.25mm 0.25mm 20mil 0.4024mm "" "35" "square"]
|
||||
Pad[-10mm 8.75mm -10.9mm 8.75mm 0.25mm 20mil 0.4024mm "" "36" "square"]
|
||||
Pad[-8.75mm 10mm -8.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "37" "square"]
|
||||
Pad[-8.25mm 10mm -8.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "38" "square"]
|
||||
Pad[-7.75mm 10mm -7.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "39" "square"]
|
||||
Pad[-7.25mm 10mm -7.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "40" "square"]
|
||||
Pad[-6.75mm 10mm -6.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "41" "square"]
|
||||
Pad[-6.25mm 10mm -6.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "42" "square"]
|
||||
Pad[-5.75mm 10mm -5.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "43" "square"]
|
||||
Pad[-5.25mm 10mm -5.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "44" "square"]
|
||||
Pad[-4.75mm 10mm -4.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "45" "square"]
|
||||
Pad[-4.25mm 10mm -4.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "46" "square"]
|
||||
Pad[-3.75mm 10mm -3.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "47" "square"]
|
||||
Pad[-3.25mm 10mm -3.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "48" "square"]
|
||||
Pad[-2.75mm 10mm -2.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "49" "square"]
|
||||
Pad[-2.25mm 10mm -2.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "50" "square"]
|
||||
Pad[-1.75mm 10mm -1.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "51" "square"]
|
||||
Pad[-1.25mm 10mm -1.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "52" "square"]
|
||||
Pad[-0.75mm 10mm -0.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "53" "square"]
|
||||
Pad[-0.25mm 10mm -0.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "54" "square"]
|
||||
Pad[0.25mm 10mm 0.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "55" "square"]
|
||||
Pad[0.75mm 10mm 0.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "56" "square"]
|
||||
Pad[1.25mm 10mm 1.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "57" "square"]
|
||||
Pad[1.75mm 10mm 1.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "58" "square"]
|
||||
Pad[2.25mm 10mm 2.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "59" "square"]
|
||||
Pad[2.75mm 10mm 2.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "60" "square"]
|
||||
Pad[3.25mm 10mm 3.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "61" "square"]
|
||||
Pad[3.75mm 10mm 3.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "62" "square"]
|
||||
Pad[4.25mm 10mm 4.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "63" "square"]
|
||||
Pad[4.75mm 10mm 4.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "64" "square"]
|
||||
Pad[5.25mm 10mm 5.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "65" "square"]
|
||||
Pad[5.75mm 10mm 5.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "66" "square"]
|
||||
Pad[6.25mm 10mm 6.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "67" "square"]
|
||||
Pad[6.75mm 10mm 6.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "68" "square"]
|
||||
Pad[7.25mm 10mm 7.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "69" "square"]
|
||||
Pad[7.75mm 10mm 7.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "70" "square"]
|
||||
Pad[8.25mm 10mm 8.25mm 10.9mm 0.25mm 20mil 0.4024mm "" "71" "square"]
|
||||
Pad[8.75mm 10mm 8.75mm 10.9mm 0.25mm 20mil 0.4024mm "" "72" "square"]
|
||||
Pad[10mm 8.75mm 10.9mm 8.75mm 0.25mm 20mil 0.4024mm "" "73" "square"]
|
||||
Pad[10mm 8.25mm 10.9mm 8.25mm 0.25mm 20mil 0.4024mm "" "74" "square"]
|
||||
Pad[10mm 7.75mm 10.9mm 7.75mm 0.25mm 20mil 0.4024mm "" "75" "square"]
|
||||
Pad[10mm 7.25mm 10.9mm 7.25mm 0.25mm 20mil 0.4024mm "" "76" "square"]
|
||||
Pad[10mm 6.75mm 10.9mm 6.75mm 0.25mm 20mil 0.4024mm "" "77" "square"]
|
||||
Pad[10mm 6.25mm 10.9mm 6.25mm 0.25mm 20mil 0.4024mm "" "78" "square"]
|
||||
Pad[10mm 5.75mm 10.9mm 5.75mm 0.25mm 20mil 0.4024mm "" "79" "square"]
|
||||
Pad[10mm 5.25mm 10.9mm 5.25mm 0.25mm 20mil 0.4024mm "" "80" "square"]
|
||||
Pad[10mm 4.75mm 10.9mm 4.75mm 0.25mm 20mil 0.4024mm "" "81" "square"]
|
||||
Pad[10mm 4.25mm 10.9mm 4.25mm 0.25mm 20mil 0.4024mm "" "82" "square"]
|
||||
Pad[10mm 3.75mm 10.9mm 3.75mm 0.25mm 20mil 0.4024mm "" "83" "square"]
|
||||
Pad[10mm 3.25mm 10.9mm 3.25mm 0.25mm 20mil 0.4024mm "" "84" "square"]
|
||||
Pad[10mm 2.75mm 10.9mm 2.75mm 0.25mm 20mil 0.4024mm "" "85" "square"]
|
||||
Pad[10mm 2.25mm 10.9mm 2.25mm 0.25mm 20mil 0.4024mm "" "86" "square"]
|
||||
Pad[10mm 1.75mm 10.9mm 1.75mm 0.25mm 20mil 0.4024mm "" "87" "square"]
|
||||
Pad[10mm 1.25mm 10.9mm 1.25mm 0.25mm 20mil 0.4024mm "" "88" "square"]
|
||||
Pad[10mm 0.75mm 10.9mm 0.75mm 0.25mm 20mil 0.4024mm "" "89" "square"]
|
||||
Pad[10mm 0.25mm 10.9mm 0.25mm 0.25mm 20mil 0.4024mm "" "90" "square"]
|
||||
Pad[10mm -0.25mm 10.9mm -0.25mm 0.25mm 20mil 0.4024mm "" "91" "square"]
|
||||
Pad[10mm -0.75mm 10.9mm -0.75mm 0.25mm 20mil 0.4024mm "" "92" "square"]
|
||||
Pad[10mm -1.25mm 10.9mm -1.25mm 0.25mm 20mil 0.4024mm "" "93" "square"]
|
||||
Pad[10mm -1.75mm 10.9mm -1.75mm 0.25mm 20mil 0.4024mm "" "94" "square"]
|
||||
Pad[10mm -2.25mm 10.9mm -2.25mm 0.25mm 20mil 0.4024mm "" "95" "square"]
|
||||
Pad[10mm -2.75mm 10.9mm -2.75mm 0.25mm 20mil 0.4024mm "" "96" "square"]
|
||||
Pad[10mm -3.25mm 10.9mm -3.25mm 0.25mm 20mil 0.4024mm "" "97" "square"]
|
||||
Pad[10mm -3.75mm 10.9mm -3.75mm 0.25mm 20mil 0.4024mm "" "98" "square"]
|
||||
Pad[10mm -4.25mm 10.9mm -4.25mm 0.25mm 20mil 0.4024mm "" "99" "square"]
|
||||
Pad[10mm -4.75mm 10.9mm -4.75mm 0.25mm 20mil 0.4024mm "" "100" "square"]
|
||||
Pad[10mm -5.25mm 10.9mm -5.25mm 0.25mm 20mil 0.4024mm "" "101" "square"]
|
||||
Pad[10mm -5.75mm 10.9mm -5.75mm 0.25mm 20mil 0.4024mm "" "102" "square"]
|
||||
Pad[10mm -6.25mm 10.9mm -6.25mm 0.25mm 20mil 0.4024mm "" "103" "square"]
|
||||
Pad[10mm -6.75mm 10.9mm -6.75mm 0.25mm 20mil 0.4024mm "" "104" "square"]
|
||||
Pad[10mm -7.25mm 10.9mm -7.25mm 0.25mm 20mil 0.4024mm "" "105" "square"]
|
||||
Pad[10mm -7.75mm 10.9mm -7.75mm 0.25mm 20mil 0.4024mm "" "106" "square"]
|
||||
Pad[10mm -8.25mm 10.9mm -8.25mm 0.25mm 20mil 0.4024mm "" "107" "square"]
|
||||
Pad[10mm -8.75mm 10.9mm -8.75mm 0.25mm 20mil 0.4024mm "" "108" "square"]
|
||||
Pad[8.75mm -10mm 8.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "109" "square"]
|
||||
Pad[8.25mm -10mm 8.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "110" "square"]
|
||||
Pad[7.75mm -10mm 7.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "111" "square"]
|
||||
Pad[7.25mm -10mm 7.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "112" "square"]
|
||||
Pad[6.75mm -10mm 6.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "113" "square"]
|
||||
Pad[6.25mm -10mm 6.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "114" "square"]
|
||||
Pad[5.75mm -10mm 5.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "115" "square"]
|
||||
Pad[5.25mm -10mm 5.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "116" "square"]
|
||||
Pad[4.75mm -10mm 4.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "117" "square"]
|
||||
Pad[4.25mm -10mm 4.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "118" "square"]
|
||||
Pad[3.75mm -10mm 3.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "119" "square"]
|
||||
Pad[3.25mm -10mm 3.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "120" "square"]
|
||||
Pad[2.75mm -10mm 2.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "121" "square"]
|
||||
Pad[2.25mm -10mm 2.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "122" "square"]
|
||||
Pad[1.75mm -10mm 1.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "123" "square"]
|
||||
Pad[1.25mm -10mm 1.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "124" "square"]
|
||||
Pad[0.75mm -10mm 0.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "125" "square"]
|
||||
Pad[0.25mm -10mm 0.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "126" "square"]
|
||||
Pad[-0.25mm -10mm -0.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "127" "square"]
|
||||
Pad[-0.75mm -10mm -0.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "128" "square"]
|
||||
Pad[-1.25mm -10mm -1.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "129" "square"]
|
||||
Pad[-1.75mm -10mm -1.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "130" "square"]
|
||||
Pad[-2.25mm -10mm -2.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "131" "square"]
|
||||
Pad[-2.75mm -10mm -2.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "132" "square"]
|
||||
Pad[-3.25mm -10mm -3.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "133" "square"]
|
||||
Pad[-3.75mm -10mm -3.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "134" "square"]
|
||||
Pad[-4.25mm -10mm -4.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "135" "square"]
|
||||
Pad[-4.75mm -10mm -4.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "136" "square"]
|
||||
Pad[-5.25mm -10mm -5.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "137" "square"]
|
||||
Pad[-5.75mm -10mm -5.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "138" "square"]
|
||||
Pad[-6.25mm -10mm -6.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "139" "square"]
|
||||
Pad[-6.75mm -10mm -6.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "140" "square"]
|
||||
Pad[-7.25mm -10mm -7.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "141" "square"]
|
||||
Pad[-7.75mm -10mm -7.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "142" "square"]
|
||||
Pad[-8.25mm -10mm -8.25mm -10.9mm 0.25mm 20mil 0.4024mm "" "143" "square"]
|
||||
Pad[-8.75mm -10mm -8.75mm -10.9mm 0.25mm 20mil 0.4024mm "" "144" "square"]
|
||||
Pad[0 0 0 0 4mm 20mil 4.1524mm "" "0" "square"]
|
||||
ElementLine[-10mm -10mm -10mm 10mm 5mil]
|
||||
ElementLine[-10mm 10mm 10mm 10mm 5mil]
|
||||
ElementLine[10mm 10mm 10mm -10mm 5mil]
|
||||
ElementLine[10mm -10mm -10mm -10mm 5mil]
|
||||
ElementArc[-8mm -8mm -1mm -1mm 0 360 5mil]
|
||||
)
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
Element["" "HE_100mil_8_2" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pin[-50mil -150mil 58mil 20mil 64mil 38mil "" "1" ""]
|
||||
Pin[50mil -150mil 58mil 20mil 64mil 38mil "" "2" ""]
|
||||
Pin[-50mil -50mil 58mil 20mil 64mil 38mil "" "3" ""]
|
||||
Pin[50mil -50mil 58mil 20mil 64mil 38mil "" "4" ""]
|
||||
Pin[-50mil 50mil 58mil 20mil 64mil 38mil "" "5" ""]
|
||||
Pin[50mil 50mil 58mil 20mil 64mil 38mil "" "6" ""]
|
||||
Pin[-50mil 150mil 58mil 20mil 64mil 38mil "" "7" ""]
|
||||
Pin[50mil 150mil 58mil 20mil 64mil 38mil "" "8" ""]
|
||||
ElementLine[-100mil -200mil -100mil 200mil 5mil]
|
||||
ElementLine[-100mil 200mil 100mil 200mil 5mil]
|
||||
ElementLine[100mil 200mil 100mil -200mil 5mil]
|
||||
ElementLine[100mil -200mil -100mil -200mil 5mil]
|
||||
ElementLine[0mil -200mil 0mil -100mil 5mil]
|
||||
ElementLine[-100mil -100mil 0mil -100mil 5mil]
|
||||
)
|
||||
15
fp/L7x7mm.fp
15
fp/L7x7mm.fp
|
|
@ -1,15 +0,0 @@
|
|||
|
||||
Element["" "" "L?" "" 113.0000mm 16.0000mm -0.6000mm -0.8000mm 0 100 ""]
|
||||
(
|
||||
Pad[-2.4000mm -2.4000mm 2.4000mm -2.4000mm 2.6000mm 20.00mil 3.1080mm "1" "1" "square"]
|
||||
Pad[-2.4000mm 2.4000mm 2.4000mm 2.4000mm 2.6000mm 20.00mil 3.1080mm "2" "2" "square"]
|
||||
ElementLine [-3.5000mm -3.5000mm 3.5000mm -3.5000mm 0.1500mm]
|
||||
ElementLine [3.5000mm -3.5000mm 3.5000mm 3.5000mm 0.1500mm]
|
||||
ElementLine [3.5000mm 3.5000mm -3.5000mm 3.5000mm 0.1500mm]
|
||||
ElementLine [-3.5000mm 3.5000mm -3.5000mm -3.5000mm 0.1500mm]
|
||||
ElementArc [0.0000 0.0000 2.5000mm 2.5000mm 180 90 0.1500mm]
|
||||
ElementArc [-0.0000mm -0.0000mm 2.5000mm 2.5000mm 90 90 0.1500mm]
|
||||
ElementArc [-0.0000mm 0.0000mm 2.5000mm 2.5000mm 0 90 0.1500mm]
|
||||
ElementArc [0.0000mm 0.0000mm 2.5000mm 2.5000mm 270 90 0.1500mm]
|
||||
|
||||
)
|
||||
19
fp/LLLLLL.fp
19
fp/LLLLLL.fp
|
|
@ -1,19 +0,0 @@
|
|||
|
||||
Element["" "" "L?" "" 110.0000mm 18.0000mm 0.0000 0.0000 0 100 ""]
|
||||
(
|
||||
Pin[0.0mm 5.4mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "1" ""]
|
||||
Pin[2.7mm 4.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "7" ""]
|
||||
Pin[4.7mm 2.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "2" ""]
|
||||
Pin[5.4mm 0.0mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "8" ""]
|
||||
Pin[4.7mm -2.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "3" ""]
|
||||
Pin[2.7mm -4.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "9" ""]
|
||||
Pin[0.0mm -5.4mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "4" ""]
|
||||
Pin[-2.7mm -4.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "10" ""]
|
||||
Pin[-4.7mm -2.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "5" ""]
|
||||
Pin[-5.4mm -0.0mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "11" ""]
|
||||
Pin[-4.7mm 2.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "6" ""]
|
||||
Pin[-2.7mm 4.7mm 1.0000mm 0.5000mm 1.1524mm 0.5000mm "" "12" ""]
|
||||
|
||||
ElementArc [0.0000 0.0000 5.0000mm 5.0000mm 0 360 0.2000mm]
|
||||
ElementArc [0.0000 0.0000 3.0000mm 3.0000mm 0 360 0.2000mm]
|
||||
)
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
Element["" "MSOPE_3_8" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-1.8mm -0.975mm -2.4mm -0.975mm 0.4mm 20mil 0.5524mm "" "1" "square"]
|
||||
Pad[-1.8mm -0.325mm -2.4mm -0.324999mm 0.4mm 20mil 0.5524mm "" "2" "square"]
|
||||
Pad[-1.8mm 0.325001mm -2.4mm 0.325001mm 0.4mm 20mil 0.5524mm "" "3" "square"]
|
||||
Pad[-1.8mm 0.975001mm -2.4mm 0.975001mm 0.4mm 20mil 0.5524mm "" "4" "square"]
|
||||
Pad[1.8mm 0.975001mm 2.4mm 0.975001mm 0.4mm 20mil 0.5524mm "" "5" "square"]
|
||||
Pad[1.8mm 0.325001mm 2.4mm 0.325001mm 0.4mm 20mil 0.5524mm "" "6" "square"]
|
||||
Pad[1.8mm -0.324999mm 2.4mm -0.324999mm 0.4mm 20mil 0.5524mm "" "7" "square"]
|
||||
Pad[1.8mm -0.974999mm 2.4mm -0.974999mm 0.4mm 20mil 0.5524mm "" "8" "square"]
|
||||
Pad[0 0.054999mm 0 -0.054999mm 1.68mm 20mil 1.8324mm "" "0" "square"]
|
||||
ElementLine[-1.8mm -1.3mm -1.8mm 1.3mm 5mil]
|
||||
ElementLine[-1.8mm 1.3mm 1.8mm 1.3mm 5mil]
|
||||
ElementLine[1.8mm 1.3mm 1.8mm -1.3mm 5mil]
|
||||
ElementLine[1.8mm -1.3mm -1.8mm -1.3mm 5mil]
|
||||
ElementArc[-1.656mm -1.156mm -0.072mm -0.072mm 0 360 5mil]
|
||||
)
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
Element["" "MSOP_3_8" "U?" "unknown" 0 0 0 0 0 50 ""] (
|
||||
Pad[-1.8mm -0.975mm -2.4mm -0.975mm 0.4mm 20mil 0.5524mm "" "1" "square"]
|
||||
Pad[-1.8mm -0.325mm -2.4mm -0.324999mm 0.4mm 20mil 0.5524mm "" "2" "square"]
|
||||
Pad[-1.8mm 0.325001mm -2.4mm 0.325001mm 0.4mm 20mil 0.5524mm "" "3" "square"]
|
||||
Pad[-1.8mm 0.975001mm -2.4mm 0.975001mm 0.4mm 20mil 0.5524mm "" "4" "square"]
|
||||
Pad[1.8mm 0.975001mm 2.4mm 0.975001mm 0.4mm 20mil 0.5524mm "" "5" "square"]
|
||||
Pad[1.8mm 0.325001mm 2.4mm 0.325001mm 0.4mm 20mil 0.5524mm "" "6" "square"]
|
||||
Pad[1.8mm -0.324999mm 2.4mm -0.324999mm 0.4mm 20mil 0.5524mm "" "7" "square"]
|
||||
Pad[1.8mm -0.974999mm 2.4mm -0.974999mm 0.4mm 20mil 0.5524mm "" "8" "square"]
|
||||
ElementLine[-1.8mm -1.3mm -1.8mm 1.3mm 5mil]
|
||||
ElementLine[-1.8mm 1.3mm 1.8mm 1.3mm 5mil]
|
||||
ElementLine[1.8mm 1.3mm 1.8mm -1.3mm 5mil]
|
||||
ElementLine[1.8mm -1.3mm -1.8mm -1.3mm 5mil]
|
||||
ElementArc[-1.656mm -1.156mm -0.072mm -0.072mm 0 360 5mil]
|
||||
)
|
||||
|
|
@ -1,52 +0,0 @@
|
|||
|
||||
Element["" "" "CONN?" "" 2230.00mil 5995.00mil -30.00mil 70.00mil 1 100 ""]
|
||||
(
|
||||
Pin[0.0000 310.00mil 65.00mil 20.00mil 70.00mil 43.00mil "" "0" ""]
|
||||
Pin[0.0000 -310.00mil 65.00mil 20.00mil 70.00mil 43.00mil "" "0" ""]
|
||||
Pad[25.00mil 212.50mil 95.00mil 212.50mil 17.00mil 20.00mil 37.00mil "" "37" "square,edge2"]
|
||||
Pad[25.00mil 187.50mil 95.00mil 187.50mil 17.00mil 20.00mil 37.00mil "" "36" "square,edge2"]
|
||||
Pad[25.00mil 162.50mil 95.00mil 162.50mil 17.00mil 20.00mil 37.00mil "" "35" "square,edge2"]
|
||||
Pad[25.00mil 137.50mil 95.00mil 137.50mil 17.00mil 20.00mil 37.00mil "" "34" "square,edge2"]
|
||||
Pad[25.00mil 112.50mil 95.00mil 112.50mil 17.00mil 20.00mil 37.00mil "" "33" "square,edge2"]
|
||||
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fp/XO53.fp
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fp/ZJYS2P.fp
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fp/ZJYS2P.fp
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fp/qsat60x80.fp
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fp/qsat60x80.fp
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|
||||
Pin[58.5000mm 2.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[58.5000mm 78.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[2.5000mm 78.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[2.5000mm 40.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[58.5000mm 40.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[30.5000mm 78.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[30.5000mm 2.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[58.5000mm 59.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[2.5000mm 59.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[2.5000mm 21.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[55.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[56.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[54.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[53.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[51.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[52.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[50.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[49.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[47.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[48.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[46.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[45.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[43.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[44.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[42.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[41.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[39.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[40.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[38.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[37.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[35.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[36.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[34.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[33.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[32.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[27.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[28.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[26.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[25.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[23.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[24.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[22.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[21.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[19.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[20.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[18.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[17.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[15.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[16.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[14.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[13.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[11.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[12.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[10.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[9.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[7.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[8.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[6.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[5.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[4.5000mm 1.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[55.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[56.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[54.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[53.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[51.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[52.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[50.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[49.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[47.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[48.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[46.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[45.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[43.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[44.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[42.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[41.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[39.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[40.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[38.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[37.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[35.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[36.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[34.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[33.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[32.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[27.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[28.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[26.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[25.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[23.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[24.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[22.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[21.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[19.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[20.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[18.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[17.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[15.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[16.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[14.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[13.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[11.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[12.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[10.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[9.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[7.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[8.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[6.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[5.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[4.5000mm 79.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 5.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 4.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 6.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 7.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 9.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 8.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 10.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 11.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 13.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 12.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 14.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 15.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 17.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 16.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 18.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 19.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[58.5000mm 21.5000mm 3.0000mm 0.4000mm 3.1000mm 2.2000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 24.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 23.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 25.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 26.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 28.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 27.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 29.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 30.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 32.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 31.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 33.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 34.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 36.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 35.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 37.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 38.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 43.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 42.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 44.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 45.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 47.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 46.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 48.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 49.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 51.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 50.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 52.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 53.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 55.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 54.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 56.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 57.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 62.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 61.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 2500.00mil 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 64.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 66.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 65.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 67.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 68.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 70.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 69.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 71.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 72.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 74.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 73.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 75.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[59.5000mm 76.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 62.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 61.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 2500.00mil 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 64.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 66.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 65.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 67.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 68.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 70.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 69.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 71.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 72.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 74.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 73.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 75.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 76.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 43.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 42.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 44.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 45.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 47.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 46.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 48.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 49.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 51.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 50.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 52.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 53.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 55.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 54.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 56.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 57.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 24.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 23.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 25.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 26.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 28.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 27.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 29.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 30.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 32.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 31.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 33.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 34.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 36.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 35.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 37.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 38.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 5.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 4.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 6.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 7.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 9.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 8.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 10.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 11.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 13.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 12.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 14.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 15.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 17.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 16.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 18.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pin[1.5000mm 19.5000mm 1.0000mm 0.4000mm 1.1524mm 0.5000mm "" "1" "thermal(1S)"]
|
||||
Pad[2.5000mm 2.5000mm 58.5000mm 2.5000mm 3.0000mm 0.4000mm 4.0000mm "" "1" ""]
|
||||
Pad[58.5000mm 2.5000mm 58.5000mm 78.5000mm 3.0000mm 0.4000mm 4.0000mm "" "1" ""]
|
||||
Pad[2.5000mm 78.5000mm 58.5000mm 78.5000mm 3.0000mm 0.4000mm 4.0000mm "" "1" ""]
|
||||
Pad[2.5000mm 2.5000mm 2.5000mm 78.5000mm 3.0000mm 0.4000mm 4.0000mm "" "1" ""]
|
||||
Pad[2.5000mm 2.5000mm 58.5000mm 2.5000mm 3.0000mm 0.4000mm 3.4000mm "" "1" "onsolder"]
|
||||
Pad[2.5000mm 2.5000mm 2.5000mm 78.5000mm 3.0000mm 0.4000mm 3.4000mm "" "1" "onsolder"]
|
||||
Pad[2.5000mm 78.5000mm 58.5000mm 78.5000mm 3.0000mm 0.4000mm 3.4000mm "" "1" "onsolder"]
|
||||
Pad[58.5000mm 2.5000mm 58.5000mm 78.5000mm 3.0000mm 0.4000mm 3.4000mm "" "1" "onsolder"]
|
||||
ElementLine [2.5000mm 0.5000mm 58.5000mm 0.5000mm 6.00mil]
|
||||
ElementLine [60.5000mm 2.5000mm 60.5000mm 78.5000mm 6.00mil]
|
||||
ElementLine [58.5000mm 80.5000mm 2.5000mm 80.5000mm 6.00mil]
|
||||
ElementLine [0.5000mm 78.5000mm 0.5000mm 2.5000mm 6.00mil]
|
||||
ElementArc [2.5000mm 2.5000mm 2.0000mm 2.0000mm 270.000000 90.000000 6.00mil]
|
||||
ElementArc [58.5000mm 2.5000mm 2.0000mm 2.0000mm 180.000000 90.000000 6.00mil]
|
||||
ElementArc [58.5000mm 78.5000mm 2.0000mm 2.0000mm 90.000000 90.000000 6.00mil]
|
||||
ElementArc [2.5000mm 78.5000mm 2.0000mm 2.0000mm 0.000000 90.000000 6.00mil]
|
||||
|
||||
)
|
||||
|
|
@ -1,42 +0,0 @@
|
|||
|
||||
VERILOG=/usr/bin/iverilog
|
||||
|
||||
VERILOGFLAGS = -v -DSIMULATION $($*_FLAGS)
|
||||
%.vvp:
|
||||
$(VERILOG) $(VERILOGFLAGS) $(VFLAGS) -o $@ $^
|
||||
|
||||
vcd/%.fst: %.vvp
|
||||
$< -fst | tee $*.log
|
||||
|
||||
.PRECIOUS: vcd/%.fst
|
||||
|
||||
THHOR_CRS_SRC = thhor_crs.v pll.v
|
||||
|
||||
thhor_crs.vvp: $(THHOR_CRS_SRC)
|
||||
thhor_crs_FLAGS = -sthhor_crs_test -DTHHOR_CRS -DTHHOR_CRS_TEST
|
||||
|
||||
CYCLONE=10
|
||||
|
||||
ifeq ($(CYCLONE),10)
|
||||
QUARTUS=/usr/local/quartus/intelFPGA_lite/20.1/quartus
|
||||
else
|
||||
QUARTUS=/usr/local/quartus/altera13.1/quartus
|
||||
endif
|
||||
export PATH:=$(QUARTUS)/bin:$(PATH):.
|
||||
|
||||
MAPFLGS = $(patsubst %, --verilog_macro="%",$($*_MAPDEFS) $(MAPDEFS))
|
||||
|
||||
QDIR=quartus
|
||||
$(QDIR)/%.rbf: %.qpf %.qsf %.sdc
|
||||
quartus_map $< $(MAPFLGS)
|
||||
quartus_fit $<
|
||||
quartus_asm $<
|
||||
quartus_sta $<
|
||||
grep -i warning $(QDIR)/$*.*.rpt \
|
||||
| grep -v 'behaves as a Local Parameter Declaration because the module' \
|
||||
| grep -v 'truncated value with size 32 to match size of target' \
|
||||
| sed 's/\.v([0-9]\+)/.v(…)/;s/File: .* Line: [0-9]\+$$//' \
|
||||
> $*.warnings
|
||||
grep '^; -' $(QDIR)/$*.sta.rpt >> $*.warnings || echo Timing OK
|
||||
|
||||
$(QDIR)/thhor_crs.rbf: thhor_crs.v pll.v
|
||||
353
fpga/pll.v
353
fpga/pll.v
|
|
@ -1,353 +0,0 @@
|
|||
//
|
||||
// ALTERA megafunctions for plls and simulation models
|
||||
|
||||
`ifdef SIMULATION
|
||||
|
||||
`timescale 1ns/1ps
|
||||
|
||||
module pll192
|
||||
(
|
||||
input inclk0, // 12 MHz
|
||||
output reg c0, // 192 MHz
|
||||
output reg c1, // 96 MHz
|
||||
output reg c2, // 64 MHz
|
||||
output reg c3, // 32 MHz
|
||||
output reg c4, // 16 MHz
|
||||
output reg locked
|
||||
);
|
||||
|
||||
always @(posedge inclk0)
|
||||
begin
|
||||
#0 c0 = 1;
|
||||
#2.604 c0 = 0; // 1/192MHz = 5.208ns -> 2.604ns
|
||||
repeat (15) // still 19 or 16?
|
||||
// 20*4.167(old value) = 83.34ns -> 83.34/5.208 = 16
|
||||
begin
|
||||
#2.604 c0 = 1;
|
||||
#2.604 c0 = 0;
|
||||
end
|
||||
end
|
||||
always @(posedge inclk0)
|
||||
begin
|
||||
#2.604 c1 = 1;
|
||||
#5.208 c1 = 0; // 1/96MHz = 10.417 -> 5.208ns
|
||||
repeat (7) //still 39?
|
||||
begin
|
||||
#5.208 c1 = 1;
|
||||
#5.208 c1 = 0;
|
||||
end
|
||||
locked <= 1;
|
||||
end
|
||||
always @(posedge inclk0)
|
||||
begin
|
||||
#0 c2 = 1;
|
||||
#7.8125 c2 = 0; // 1/64MHz = 15.625 -> 7.8125ns
|
||||
repeat (15)
|
||||
begin
|
||||
#7.8215 c2 = 1;
|
||||
#7.8215 c2 = 0;
|
||||
end
|
||||
end
|
||||
always @(posedge inclk0)
|
||||
begin
|
||||
#7.8125 c3 = 1;
|
||||
#15.625 c3 = 0; // 1/32MHz = 31.25 -> 15.625ns
|
||||
repeat (7)
|
||||
begin
|
||||
#15.625 c3 = 1;
|
||||
#15.625 c3 = 0;
|
||||
end
|
||||
end
|
||||
always @(posedge inclk0)
|
||||
begin
|
||||
#15.625 c4 = 1;
|
||||
#31.25 c4 = 0; // 1/16MHz = 62.5 -> 31.25ns
|
||||
repeat (3)
|
||||
begin
|
||||
#31.25 c4 = 1;
|
||||
#31.25 c4 = 0;
|
||||
end
|
||||
end
|
||||
|
||||
endmodule // pll192
|
||||
|
||||
`else
|
||||
`ifndef PLL_LOW_LEVEL
|
||||
|
||||
module pll192
|
||||
(
|
||||
input inclk0,
|
||||
output c0, c1, c2, c3, c4,
|
||||
output locked
|
||||
);
|
||||
|
||||
// inclk 12 MHz
|
||||
//
|
||||
// "192.000000"
|
||||
// "96.000000"
|
||||
// "64.000000"
|
||||
// "32.000000"
|
||||
// "16.000000"
|
||||
|
||||
altpll altpll_component
|
||||
(
|
||||
.inclk ({1'b0, inclk0}),
|
||||
.clk ({c4, c3, c2, c1, c0}),
|
||||
.locked (locked),
|
||||
.activeclock (),
|
||||
.areset (1'b0),
|
||||
.clkbad (),
|
||||
.clkena ({6{1'b1}}),
|
||||
.clkloss (),
|
||||
.clkswitch (1'b0),
|
||||
.configupdate (1'b0),
|
||||
.enable0 (),
|
||||
.enable1 (),
|
||||
.extclk (),
|
||||
.extclkena ({4{1'b1}}),
|
||||
.fbin (1'b1),
|
||||
.fbmimicbidir (),
|
||||
.fbout (),
|
||||
.fref (),
|
||||
.icdrclk (),
|
||||
.pfdena (1'b1),
|
||||
.phasecounterselect ({4{1'b1}}),
|
||||
.phasedone (),
|
||||
.phasestep (1'b1),
|
||||
.phaseupdown (1'b1),
|
||||
.pllena (1'b1),
|
||||
.scanaclr (1'b0),
|
||||
.scanclk (1'b0),
|
||||
.scanclkena (1'b1),
|
||||
.scandata (1'b0),
|
||||
.scandataout (),
|
||||
.scandone (),
|
||||
.scanread (1'b0),
|
||||
.scanwrite (1'b0),
|
||||
.sclkout0 (),
|
||||
.sclkout1 (),
|
||||
.vcooverrange (),
|
||||
.vcounderrange ()
|
||||
);
|
||||
|
||||
defparam
|
||||
altpll_component.bandwidth_type = "AUTO",
|
||||
altpll_component.clk0_divide_by = 1,
|
||||
altpll_component.clk0_duty_cycle = 50,
|
||||
altpll_component.clk0_multiply_by = 16,
|
||||
altpll_component.clk0_phase_shift = "0",
|
||||
altpll_component.clk1_divide_by = 1,
|
||||
altpll_component.clk1_duty_cycle = 50,
|
||||
altpll_component.clk1_multiply_by = 8,
|
||||
altpll_component.clk1_phase_shift = "2600",
|
||||
altpll_component.clk2_divide_by = 3,
|
||||
altpll_component.clk2_duty_cycle = 50,
|
||||
altpll_component.clk2_multiply_by = 16,
|
||||
altpll_component.clk2_phase_shift = "0",
|
||||
altpll_component.clk3_divide_by = 3,
|
||||
altpll_component.clk3_duty_cycle = 50,
|
||||
altpll_component.clk3_multiply_by = 8,
|
||||
altpll_component.clk3_phase_shift = "7800",
|
||||
altpll_component.clk4_divide_by = 3,
|
||||
altpll_component.clk4_duty_cycle = 50,
|
||||
altpll_component.clk4_multiply_by = 4,
|
||||
altpll_component.clk4_phase_shift = "23440",
|
||||
altpll_component.compensate_clock = "CLK0",
|
||||
altpll_component.inclk0_input_frequency = 83333,
|
||||
altpll_component.intended_device_family = "Cyclone 10 LP",
|
||||
altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll192",
|
||||
altpll_component.lpm_type = "altpll",
|
||||
altpll_component.operation_mode = "NORMAL",
|
||||
altpll_component.pll_type = "AUTO",
|
||||
altpll_component.port_activeclock = "PORT_UNUSED",
|
||||
altpll_component.port_areset = "PORT_UNUSED",
|
||||
altpll_component.port_clkbad0 = "PORT_UNUSED",
|
||||
altpll_component.port_clkbad1 = "PORT_UNUSED",
|
||||
altpll_component.port_clkloss = "PORT_UNUSED",
|
||||
altpll_component.port_clkswitch = "PORT_UNUSED",
|
||||
altpll_component.port_configupdate = "PORT_UNUSED",
|
||||
altpll_component.port_fbin = "PORT_UNUSED",
|
||||
altpll_component.port_inclk0 = "PORT_USED",
|
||||
altpll_component.port_inclk1 = "PORT_UNUSED",
|
||||
altpll_component.port_locked = "PORT_USED",
|
||||
altpll_component.port_pfdena = "PORT_UNUSED",
|
||||
altpll_component.port_phasecounterselect = "PORT_UNUSED",
|
||||
altpll_component.port_phasedone = "PORT_UNUSED",
|
||||
altpll_component.port_phasestep = "PORT_UNUSED",
|
||||
altpll_component.port_phaseupdown = "PORT_UNUSED",
|
||||
altpll_component.port_pllena = "PORT_UNUSED",
|
||||
altpll_component.port_scanaclr = "PORT_UNUSED",
|
||||
altpll_component.port_scanclk = "PORT_UNUSED",
|
||||
altpll_component.port_scanclkena = "PORT_UNUSED",
|
||||
altpll_component.port_scandata = "PORT_UNUSED",
|
||||
altpll_component.port_scandataout = "PORT_UNUSED",
|
||||
altpll_component.port_scandone = "PORT_UNUSED",
|
||||
altpll_component.port_scanread = "PORT_UNUSED",
|
||||
altpll_component.port_scanwrite = "PORT_UNUSED",
|
||||
altpll_component.port_clk0 = "PORT_USED",
|
||||
altpll_component.port_clk1 = "PORT_USED",
|
||||
altpll_component.port_clk2 = "PORT_USED",
|
||||
altpll_component.port_clk3 = "PORT_USED",
|
||||
altpll_component.port_clk4 = "PORT_USED",
|
||||
altpll_component.port_clk5 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena0 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena1 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena2 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena3 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena4 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena5 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk0 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk1 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk2 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk3 = "PORT_UNUSED",
|
||||
altpll_component.self_reset_on_loss_lock = "OFF",
|
||||
altpll_component.width_clock = 5;
|
||||
|
||||
endmodule
|
||||
|
||||
`else // !`ifdef PLL_LOW_LEVEL
|
||||
|
||||
module pll192
|
||||
(
|
||||
input inclk0;
|
||||
output c0, c1, c2, c3, c4;
|
||||
output locked;
|
||||
);
|
||||
|
||||
altpll altpll_component
|
||||
(
|
||||
.inclk ({1'b0, inclk0}),
|
||||
.clk ({c4, c3, c2, c1, c0}),
|
||||
.locked (locked),
|
||||
.activeclock (),
|
||||
.areset (1'b0),
|
||||
.clkbad (),
|
||||
.clkena ({6{1'b1}}),
|
||||
.clkloss (),
|
||||
.clkswitch (1'b0),
|
||||
.configupdate (1'b0),
|
||||
.enable0 (),
|
||||
.enable1 (),
|
||||
.extclk (),
|
||||
.extclkena ({4{1'b1}}),
|
||||
.fbin (1'b1),
|
||||
.fbmimicbidir (),
|
||||
.fbout (),
|
||||
.fref (),
|
||||
.icdrclk (),
|
||||
.pfdena (1'b1),
|
||||
.phasecounterselect ({4{1'b1}}),
|
||||
.phasedone (),
|
||||
.phasestep (1'b1),
|
||||
.phaseupdown (1'b1),
|
||||
.pllena (1'b1),
|
||||
.scanaclr (1'b0),
|
||||
.scanclk (1'b0),
|
||||
.scanclkena (1'b1),
|
||||
.scandata (1'b0),
|
||||
.scandataout (),
|
||||
.scandone (),
|
||||
.scanread (1'b0),
|
||||
.scanwrite (1'b0),
|
||||
.sclkout0 (),
|
||||
.sclkout1 (),
|
||||
.vcooverrange (),
|
||||
.vcounderrange ()
|
||||
);
|
||||
|
||||
defparam
|
||||
altpll_component.charge_pump_current_bits = 1,
|
||||
altpll_component.compensate_clock = "CLK0",
|
||||
altpll_component.inclk0_input_frequency = 83333,
|
||||
`ifdef CYCLONE10
|
||||
altpll_component.intended_device_family = "Cyclone 10 LP",
|
||||
`endif
|
||||
altpll_component.loop_filter_c_bits = 0,
|
||||
altpll_component.loop_filter_r_bits = 24,
|
||||
altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll192",
|
||||
altpll_component.lpm_type = "altpll",
|
||||
altpll_component.m = 32,
|
||||
altpll_component.m_initial = 1,
|
||||
altpll_component.m_ph = 0,
|
||||
altpll_component.n = 1,
|
||||
altpll_component.operation_mode = "NORMAL",
|
||||
altpll_component.pll_type = "AUTO",
|
||||
altpll_component.port_activeclock = "PORT_UNUSED",
|
||||
altpll_component.port_areset = "PORT_UNUSED",
|
||||
altpll_component.port_clkbad0 = "PORT_UNUSED",
|
||||
altpll_component.port_clkbad1 = "PORT_UNUSED",
|
||||
altpll_component.port_clkloss = "PORT_UNUSED",
|
||||
altpll_component.port_clkswitch = "PORT_UNUSED",
|
||||
altpll_component.port_configupdate = "PORT_UNUSED",
|
||||
altpll_component.port_fbin = "PORT_UNUSED",
|
||||
altpll_component.port_inclk0 = "PORT_USED",
|
||||
altpll_component.port_inclk1 = "PORT_UNUSED",
|
||||
altpll_component.port_locked = "PORT_USED",
|
||||
altpll_component.port_pfdena = "PORT_UNUSED",
|
||||
altpll_component.port_phasecounterselect = "PORT_UNUSED",
|
||||
altpll_component.port_phasedone = "PORT_UNUSED",
|
||||
altpll_component.port_phasestep = "PORT_UNUSED",
|
||||
altpll_component.port_phaseupdown = "PORT_UNUSED",
|
||||
altpll_component.port_pllena = "PORT_UNUSED",
|
||||
altpll_component.port_scanaclr = "PORT_UNUSED",
|
||||
altpll_component.port_scanclk = "PORT_UNUSED",
|
||||
altpll_component.port_scanclkena = "PORT_UNUSED",
|
||||
altpll_component.port_scandata = "PORT_UNUSED",
|
||||
altpll_component.port_scandataout = "PORT_UNUSED",
|
||||
altpll_component.port_scandone = "PORT_UNUSED",
|
||||
altpll_component.port_scanread = "PORT_UNUSED",
|
||||
altpll_component.port_scanwrite = "PORT_UNUSED",
|
||||
altpll_component.port_clk0 = "PORT_USED",
|
||||
altpll_component.port_clk1 = "PORT_USED",
|
||||
altpll_component.port_clk2 = "PORT_USED",
|
||||
altpll_component.port_clk3 = "PORT_USED",
|
||||
altpll_component.port_clk4 = "PORT_USED",
|
||||
altpll_component.port_clk5 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena0 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena1 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena2 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena3 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena4 = "PORT_UNUSED",
|
||||
altpll_component.port_clkena5 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk0 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk1 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk2 = "PORT_UNUSED",
|
||||
altpll_component.port_extclk3 = "PORT_UNUSED",
|
||||
altpll_component.self_reset_on_loss_lock = "OFF",
|
||||
altpll_component.vco_post_scale = 2,
|
||||
altpll_component.width_clock = 5,
|
||||
altpll_component.c0_high = 1,
|
||||
altpll_component.c0_initial = 1,
|
||||
altpll_component.c0_low = 1,
|
||||
altpll_component.c0_mode = "even",
|
||||
altpll_component.c0_ph = 0,
|
||||
altpll_component.c1_high = 2,
|
||||
altpll_component.c1_initial = 2,
|
||||
altpll_component.c1_low = 2,
|
||||
altpll_component.c1_mode = "even",
|
||||
altpll_component.c1_ph = 0,
|
||||
altpll_component.c2_high = 3,
|
||||
altpll_component.c2_initial = 1,
|
||||
altpll_component.c2_low = 3,
|
||||
altpll_component.c2_mode = "even",
|
||||
altpll_component.c2_ph = 0,
|
||||
altpll_component.c3_high = 6,
|
||||
altpll_component.c3_initial = 4,
|
||||
altpll_component.c3_low = 6,
|
||||
altpll_component.c3_mode = "even",
|
||||
altpll_component.c3_ph = 0,
|
||||
altpll_component.c4_high = 12,
|
||||
altpll_component.c4_initial = 10,
|
||||
altpll_component.c4_low = 12,
|
||||
altpll_component.c4_mode = "even",
|
||||
altpll_component.c4_ph = 0,
|
||||
altpll_component.clk0_counter = "c0",
|
||||
altpll_component.clk1_counter = "c1",
|
||||
altpll_component.clk2_counter = "c2",
|
||||
altpll_component.clk3_counter = "c3",
|
||||
altpll_component.clk4_counter = "c4";
|
||||
|
||||
endmodule
|
||||
|
||||
`endif // !`ifdef PLL_LOW_LEVEL
|
||||
`endif // !`ifdef SIMULATION
|
||||
|
|
@ -1,31 +0,0 @@
|
|||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Copyright (C) 2020 Intel Corporation. All rights reserved.
|
||||
# Your use of Intel Corporation's design tools, logic functions
|
||||
# and other software and tools, and any partner logic
|
||||
# functions, and any output files from any of the foregoing
|
||||
# (including device programming or simulation files), and any
|
||||
# associated documentation or information are expressly subject
|
||||
# to the terms and conditions of the Intel Program License
|
||||
# Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
# the Intel FPGA IP License Agreement, or other applicable license
|
||||
# agreement, including, without limitation, that your use is for
|
||||
# the sole purpose of programming logic devices manufactured by
|
||||
# Intel and sold by Intel or its authorized distributors. Please
|
||||
# refer to the applicable agreement for further details, at
|
||||
# https://fpgasoftware.intel.com/eula.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Quartus Prime
|
||||
# Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
|
||||
# Date created = 15:55:15 January 24, 2024
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
QUARTUS_VERSION = "20.1"
|
||||
DATE = "15:55:15 January 24, 2024"
|
||||
|
||||
# Revisions
|
||||
|
||||
PROJECT_REVISION = "thhor_crs"
|
||||
|
|
@ -1,206 +0,0 @@
|
|||
# -*- tcl -*-
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Notes:
|
||||
#
|
||||
# 1) The default values for assignments are stored in the file:
|
||||
# irena_assignment_defaults.qdf
|
||||
# If this file doesn't exist, see file:
|
||||
# assignment_defaults.qdf
|
||||
#
|
||||
# 2) Altera recommends that you do not modify this file. This
|
||||
# file is updated automatically by the Quartus II software
|
||||
# and any changes you make may be lost or overwritten.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY quartus
|
||||
|
||||
set_global_assignment -name DEVICE 10CL025YE144I7G
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY thhor_crs
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
|
||||
set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
|
||||
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
|
||||
set_global_assignment -name MISC_FILE thhor_crs.dpf
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
|
||||
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
|
||||
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
|
||||
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
|
||||
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
|
||||
set_global_assignment -name GENERATE_RBF_FILE ON
|
||||
set_global_assignment -name CRC_ERROR_CHECKING ON
|
||||
set_global_assignment -name FORCE_CONFIGURATION_VCCIO OFF
|
||||
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
|
||||
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
|
||||
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
|
||||
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF
|
||||
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
|
||||
set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING ON
|
||||
set_global_assignment -name SYNCHRONIZER_IDENTIFICATION AUTO
|
||||
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS OFF
|
||||
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
|
||||
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
|
||||
set_global_assignment -name EDA_SIMULATION_TOOL "Custom Verilog HDL"
|
||||
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
|
||||
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
|
||||
set_global_assignment -name ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS OFF
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
|
||||
############ Left 3.3V
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to xclk
|
||||
set_location_assignment PIN_22 -to xclk
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_ssel
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_sck
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_mosi
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_miso
|
||||
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to spi_ssel
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to spi_miso
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to spi_mosi
|
||||
|
||||
set_location_assignment PIN_8 -to spi_ssel
|
||||
set_location_assignment PIN_11 -to spi_sck
|
||||
set_location_assignment PIN_13 -to spi_mosi
|
||||
set_location_assignment PIN_10 -to spi_miso
|
||||
|
||||
############# right 2.5V
|
||||
|
||||
# LVDS spacewire
|
||||
|
||||
set_instance_assignment -name IO_STANDARD LVDS -to S_OUT
|
||||
set_instance_assignment -name IO_STANDARD LVDS -to D_OUT
|
||||
set_instance_assignment -name IO_STANDARD LVDS -to S_IN
|
||||
set_instance_assignment -name IO_STANDARD LVDS -to D_IN
|
||||
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to S_OUT
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to D_OUT
|
||||
|
||||
set_location_assignment PIN_87 -to S_OUT
|
||||
set_location_assignment PIN_86 -to "S_OUT(n)"
|
||||
set_location_assignment PIN_103 -to D_OUT
|
||||
set_location_assignment PIN_101 -to "D_OUT(n)"
|
||||
set_location_assignment PIN_91 -to S_IN
|
||||
set_location_assignment PIN_90 -to "S_IN(n)"
|
||||
|
||||
# Pressure Sensor
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "2.5 V" -to pt_Dout
|
||||
set_instance_assignment -name IO_STANDARD "2.5 V" -to pt_Din
|
||||
set_instance_assignment -name IO_STANDARD "2.5 V" -to pt_MCLK
|
||||
set_instance_assignment -name IO_STANDARD "2.5 V" -to pt_SCLK
|
||||
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to pt_Din
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to pt_Dout
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to pt_MCLK
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to pt_SCLK
|
||||
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to pt_DOUT
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "8mA" -to pt_Din
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "8mA" -to pt_MCLK
|
||||
set_instance_assignment -name CURRENT_STRENGTH_NEW "8mA" -to pt_SCLK
|
||||
|
||||
set_instance_assignment -name SLEW_RATE 0 -to pt_Din
|
||||
set_instance_assignment -name SLEW_RATE 0 -to pt_MCLK
|
||||
set_instance_assignment -name SLEW_RATE 0 -to pt_SCLK
|
||||
|
||||
set_location_assignment PIN_77 -to pt_Dout
|
||||
set_location_assignment PIN_80 -to pt_Din
|
||||
set_location_assignment PIN_83 -to pt_MCLK
|
||||
set_location_assignment PIN_76 -to pt_SCLK
|
||||
|
||||
########## bottom 3.3V
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to ADC_nCS
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to ADC_SCK
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to ADC_DIN
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to ADC_DOUT
|
||||
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ADC_nCS
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ADC_SCK
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ADC_DIN
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to ADC_DOUT
|
||||
|
||||
set_location_assignment PIN_66 -to ADC_nCS[0]
|
||||
set_location_assignment PIN_69 -to ADC_SCK[0]
|
||||
set_location_assignment PIN_67 -to ADC_DIN[0]
|
||||
set_location_assignment PIN_68 -to ADC_DOUT[0]
|
||||
|
||||
set_location_assignment PIN_58 -to ADC_nCS[1]
|
||||
set_location_assignment PIN_65 -to ADC_SCK[1]
|
||||
set_location_assignment PIN_59 -to ADC_DIN[1]
|
||||
set_location_assignment PIN_60 -to ADC_DOUT[1]
|
||||
|
||||
set_location_assignment PIN_46 -to ADC_nCS[2]
|
||||
set_location_assignment PIN_51 -to ADC_SCK[2]
|
||||
set_location_assignment PIN_49 -to ADC_DIN[2]
|
||||
set_location_assignment PIN_50 -to ADC_DOUT[2]
|
||||
|
||||
set_location_assignment PIN_39 -to ADC_nCS[3]
|
||||
set_location_assignment PIN_44 -to ADC_SCK[3]
|
||||
set_location_assignment PIN_42 -to ADC_DIN[3]
|
||||
set_location_assignment PIN_43 -to ADC_DOUT[3]
|
||||
|
||||
########## Spares 3.3V left, top
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to P33
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to P33
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to P33
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to P33
|
||||
|
||||
set_location_assignment PIN_6 -to P33[0]
|
||||
set_location_assignment PIN_7 -to P33[1]
|
||||
set_location_assignment PIN_28 -to P33[2]
|
||||
set_location_assignment PIN_31 -to P33[3]
|
||||
set_location_assignment PIN_32 -to P33[4]
|
||||
set_location_assignment PIN_33 -to P33[5]
|
||||
set_location_assignment PIN_71 -to P33[6]
|
||||
set_location_assignment PIN_72 -to P33[7]
|
||||
|
||||
|
||||
########## Spares 2.5V right, bottom
|
||||
|
||||
set_instance_assignment -name IO_STANDARD "2.5 V" -to P25
|
||||
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to P25
|
||||
set_instance_assignment -name FAST_INPUT_REGISTER ON -to P25
|
||||
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to P25
|
||||
|
||||
set_location_assignment PIN_106 -to P25[0]
|
||||
set_location_assignment PIN_111 -to P25[1]
|
||||
set_location_assignment PIN_112 -to P25[2]
|
||||
set_location_assignment PIN_113 -to P25[3]
|
||||
set_location_assignment PIN_114 -to P25[4]
|
||||
set_location_assignment PIN_115 -to P25[5]
|
||||
set_location_assignment PIN_119 -to P25[6]
|
||||
set_location_assignment PIN_120 -to P25[7]
|
||||
set_location_assignment PIN_121 -to P25[8]
|
||||
set_location_assignment PIN_125 -to P25[9]
|
||||
set_location_assignment PIN_132 -to P25[10]
|
||||
set_location_assignment PIN_133 -to P25[11]
|
||||
set_location_assignment PIN_135 -to P25[12]
|
||||
set_location_assignment PIN_136 -to P25[13]
|
||||
set_location_assignment PIN_137 -to P25[14]
|
||||
set_location_assignment PIN_141 -to P25[15]
|
||||
set_location_assignment PIN_142 -to P25[16]
|
||||
set_location_assignment PIN_143 -to P25[17]
|
||||
set_location_assignment PIN_144 -to P25[18]
|
||||
|
||||
########## Sources
|
||||
|
||||
set_global_assignment -name VERILOG_FILE thhor_crs.v
|
||||
set_global_assignment -name VERILOG_FILE pll.v
|
||||
|
||||
set_global_assignment -name VERILOG_MACRO "TARGET_ALTERA=1"
|
||||
set_global_assignment -name VERILOG_MACRO "TARGET_10C25=1"
|
||||
set_global_assignment -name VERILOG_MACRO "INFERRED_SRAM=1"
|
||||
|
||||
|
|
@ -1,7 +0,0 @@
|
|||
create_clock -name xclk -period 83.333 xclk
|
||||
derive_pll_clocks
|
||||
derive_clock_uncertainty
|
||||
set_false_path -from spi_sck -to xclk
|
||||
set_false_path -from xclk -to spi_sck
|
||||
set_false_path -from spi_sck -to {pll|altpll_component|auto_generated|pll1|clk[3]}
|
||||
set_false_path -from {pll|altpll_component|auto_generated|pll1|clk[3]} -to spi_sck
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
|
||||
module thhor_crs
|
||||
(
|
||||
input xclk,
|
||||
input spi_ssel, spi_sck, spi_mosi,
|
||||
output spi_miso,
|
||||
|
||||
// Barometer
|
||||
output pt_MCLK, pt_SCLK, pt_Din,
|
||||
input pt_Dout,
|
||||
|
||||
// ADCs
|
||||
output [3:0] ADC_nCS, ADC_SCK, ADC_DIN,
|
||||
input [3:0] ADC_DOUT,
|
||||
|
||||
// LVDS
|
||||
output S_OUT, D_OUT,
|
||||
input S_IN, D_IN,
|
||||
|
||||
// Spare Pins
|
||||
inout [18:0] P25,
|
||||
inout [7:0] P33
|
||||
);
|
||||
|
||||
wire pll_locked;
|
||||
wire mclk;
|
||||
pll192 pll(.inclk0(xclk),
|
||||
.c3(mclk),
|
||||
.locked(pll_locked)
|
||||
);
|
||||
|
||||
reg r;
|
||||
assign spi_miso = r;
|
||||
always @(posedge mclk)
|
||||
if (spi_ssel)
|
||||
r <= spi_mosi;
|
||||
|
||||
endmodule // thhor_crs
|
||||
|
|
@ -1,96 +0,0 @@
|
|||
quartus/thhor_crs.asm.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
||||
quartus/thhor_crs.asm.rpt:Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
|
||||
quartus/thhor_crs.fit.rpt: 21. I/O Assignment Warnings
|
||||
quartus/thhor_crs.fit.rpt:; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
|
||||
quartus/thhor_crs.fit.rpt:; I/O Assignment Warnings ;
|
||||
quartus/thhor_crs.fit.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
||||
quartus/thhor_crs.fit.rpt:Warning (15564): Compensate clock of PLL "pll192:pll|altpll:altpll_component|pll192_altpll:auto_generated|pll1" has been set to clock3
|
||||
quartus/thhor_crs.fit.rpt:Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
|
||||
quartus/thhor_crs.fit.rpt:Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
|
||||
quartus/thhor_crs.fit.rpt:Warning (176674): Following 4 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.
|
||||
quartus/thhor_crs.fit.rpt: Warning (176118): Pin "S_OUT" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "S_OUT(n)"
|
||||
quartus/thhor_crs.fit.rpt: Warning (176118): Pin "D_OUT" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "D_OUT(n)"
|
||||
quartus/thhor_crs.fit.rpt: Warning (176118): Pin "S_IN" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "S_IN(n)"
|
||||
quartus/thhor_crs.fit.rpt: Warning (176118): Pin "D_IN" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "D_IN(n)"
|
||||
quartus/thhor_crs.fit.rpt:Critical Warning (169085): No exact pin location assignment(s) for 1 pins of 56 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report.
|
||||
quartus/thhor_crs.fit.rpt:Warning (176225): Can't pack node r to I/O pin
|
||||
quartus/thhor_crs.fit.rpt:Warning (176250): Ignoring invalid fast I/O register assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
|
||||
quartus/thhor_crs.fit.rpt:Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
|
||||
quartus/thhor_crs.fit.rpt:Warning (169177): 15 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing Cyclone 10 LP Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems.
|
||||
quartus/thhor_crs.fit.rpt:Warning (169203): PCI-clamp diode is not supported in this mode. The following 1 pins must meet the Intel FPGA requirements for 3.3V, 3.0V, and 2.5V interfaces if they are connected to devices other than the supported configuration devices. In these cases, Intel recommends termination method as specified in the Application Note 447.
|
||||
quartus/thhor_crs.fit.rpt:Warning (169064): Following 27 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
|
||||
quartus/thhor_crs.fit.rpt:Info: Quartus Prime Fitter was successful. 0 errors, 16 warnings
|
||||
quartus/thhor_crs.map.rpt:; c0 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
||||
quartus/thhor_crs.map.rpt:; c1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
||||
quartus/thhor_crs.map.rpt:; c2 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
||||
quartus/thhor_crs.map.rpt:; c4 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
|
||||
quartus/thhor_crs.map.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "ADC_nCS" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "ADC_SCK" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "ADC_DIN" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "pt_MCLK" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "pt_SCLK" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "pt_Din" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "S_OUT" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (10034): Output port "D_OUT" at thhor_crs.v(…) has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (12241): 1 hierarchies have connectivity warnings - see the Connectivity Checks report folder
|
||||
quartus/thhor_crs.map.rpt:Warning (13039): The following bidirectional pins have no drivers
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[0]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[1]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[2]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[3]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[4]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[5]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[6]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[7]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[8]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[9]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[10]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[11]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[12]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[13]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[14]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[15]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[16]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[17]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P25[18]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[0]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[1]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[2]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[3]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[4]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[5]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[6]" has no driver
|
||||
quartus/thhor_crs.map.rpt: Warning (13040): bidirectional pin "P33[7]" has no driver
|
||||
quartus/thhor_crs.map.rpt:Warning (13024): Output pins are stuck at VCC or GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "pt_MCLK" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "pt_SCLK" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "pt_Din" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_nCS[0]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_nCS[1]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_nCS[2]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_nCS[3]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_SCK[0]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_SCK[1]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_SCK[2]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_SCK[3]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_DIN[0]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_DIN[1]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_DIN[2]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "ADC_DIN[3]" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "S_OUT" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt: Warning (13410): Pin "D_OUT" is stuck at GND
|
||||
quartus/thhor_crs.map.rpt:Warning (15897): PLL "pll192:pll|altpll:altpll_component|pll192_altpll:auto_generated|pll1" has parameter compensate_clock set to clock0 but port CLK[0] is not connected
|
||||
quartus/thhor_crs.map.rpt:Warning (15899): PLL "pll192:pll|altpll:altpll_component|pll192_altpll:auto_generated|pll1" has parameters clk0_multiply_by and clk0_divide_by specified but port CLK[0] is not connected
|
||||
quartus/thhor_crs.map.rpt:Warning (21074): Design contains 8 input pin(s) that do not drive logic
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "spi_sck"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "pt_Dout"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "ADC_DOUT[0]"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "ADC_DOUT[1]"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "ADC_DOUT[2]"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "ADC_DOUT[3]"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "S_IN"
|
||||
quartus/thhor_crs.map.rpt: Warning (15610): No output dependent on input pin "D_IN"
|
||||
quartus/thhor_crs.map.rpt:Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 67 warnings
|
||||
quartus/thhor_crs.sta.rpt:Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
||||
quartus/thhor_crs.sta.rpt:Info: Quartus Prime Timing Analyzer was successful. 0 errors, 1 warning
|
||||
4
gafrc
4
gafrc
|
|
@ -1,4 +0,0 @@
|
|||
(component-library "./sym")
|
||||
(source-library "./sym")
|
||||
(component-library ".")
|
||||
(source-library ".")
|
||||
|
|
@ -1,3 +0,0 @@
|
|||
PROJ = thhor_crs
|
||||
VERSION = v01
|
||||
include gerber.makefile
|
||||
|
|
@ -1,28 +0,0 @@
|
|||
# Project thhor_crs version v01
|
||||
|
||||
Six layer rigid PCB, 6mil/8mil rules, 0.3mm vias, 8mil annular
|
||||
|
||||
- Size: 60x80 mm²
|
||||
- Thickness: 1.6 mm.
|
||||
- With soldermask, no silk.
|
||||
- Surface finish HAL.
|
||||
|
||||
## Copper layer order:
|
||||
|
||||
- thhor_crs.top.gbr top side copper
|
||||
- thhor_crs.signal.gbr inner routing
|
||||
- thhor_crs.grounds.gbr power return planes
|
||||
- thhor_crs.power.gbr power planes
|
||||
- thhor_crs.ground.gbr chassis/analog ground
|
||||
- thhor_crs.bottom.gbr back side copper
|
||||
|
||||
## Mechanical layers
|
||||
|
||||
- thhor_crs.plated-drill.cnc drill file
|
||||
- thhor_crs.outline.gbr board outline
|
||||
- thhor_crs.topmask.gbr soldermask top
|
||||
- thhor_crs.bottommask.gbr soldermask bottom
|
||||
|
||||
## Pretty picture
|
||||
|
||||
|
||||
|
|
@ -1,85 +0,0 @@
|
|||
#! /usr/bin/python3
|
||||
|
||||
from fileinput import input
|
||||
from sys import stdout, argv
|
||||
from getopt import getopt
|
||||
|
||||
oo,ff = getopt(argv[1:], "hH:")
|
||||
|
||||
hierarchy = '/'
|
||||
for o,v in oo:
|
||||
if o=="-h":
|
||||
hierarchy = None
|
||||
if o=="-H":
|
||||
hierarchy = v
|
||||
|
||||
headers=[]
|
||||
items=[]
|
||||
|
||||
for l in input(ff):
|
||||
# header lines start with a hash
|
||||
if l[0]=='#':
|
||||
headers.append(l)
|
||||
continue
|
||||
# everything else is a parts, four komma separated fields
|
||||
item = l.split(',')
|
||||
count = int(item[0])
|
||||
footprint = item[1].strip('"')
|
||||
value = item[2].strip('"')
|
||||
# the last field is a space separated list of refdes
|
||||
parts = item[3].split()
|
||||
parts = [i for i in parts if i != "(unknown)"]
|
||||
parts.sort()
|
||||
prefix = ""
|
||||
ppp = []
|
||||
for p in parts:
|
||||
# hierachical refdes Xn/Rm
|
||||
if hierarchy:
|
||||
pp = p.split(hierarchy,1)
|
||||
else:
|
||||
pp = ["",p]
|
||||
# toplevel parts have an empty prefix
|
||||
if len(pp)==1:
|
||||
pp = ["",p]
|
||||
# collect all parts with the same prefix
|
||||
if pp[0]==prefix:
|
||||
ppp.append(p)
|
||||
continue
|
||||
# new prefix: emit old refdes list
|
||||
if ppp:
|
||||
items.append([footprint,value,prefix,count,ppp])
|
||||
ppp=[p]
|
||||
prefix=pp[0]
|
||||
# emit last refdes list
|
||||
if ppp:
|
||||
items.append([footprint,value,prefix,count,ppp])
|
||||
|
||||
# sort by footprint/value/prefix
|
||||
items.sort()
|
||||
|
||||
# print headers
|
||||
for h in headers:
|
||||
stdout.write(h)
|
||||
|
||||
# ten refdes per line
|
||||
nni = 10
|
||||
|
||||
for f,v,x,c,i in items:
|
||||
# first nni refdes with part attributes
|
||||
l = len(i[0])
|
||||
i1 = 0
|
||||
i2 = 1
|
||||
while i2<len(i) and l+len(i[i2]) < 40:
|
||||
l += len(i[i2])+1
|
||||
i2 += 1
|
||||
stdout.write("%-7.7s %-16.16s %3u/%-3u %s\n"
|
||||
% (f,v,len(i),c," ".join(i[i1:i2])))
|
||||
# remaining refdes on continuation lines
|
||||
while i2<len(i):
|
||||
i1=i2
|
||||
i2 += 1
|
||||
l = len(i[i1])
|
||||
while i2<len(i) and l+len(i[i2]) < 40:
|
||||
l += len(i[i2])+1
|
||||
i2 += 1
|
||||
stdout.write("%33s%s\n" % (""," ".join(i[i1:i2])))
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
|
||||
# PROJ = …
|
||||
# VERSION = v01
|
||||
|
||||
GERBERS = $(PROJ).plated-drill.cnc
|
||||
GVP2MAKE = ./gvp2make.py
|
||||
GV_OPT = -D600
|
||||
|
||||
default: zip bom png
|
||||
|
||||
png: $(patsubst %.gvp, %.png, $(wildcard $(PROJ)*.gvp))
|
||||
|
||||
%.png: %.gvp $(GERBERS)
|
||||
$(GVP2MAKE) -o $@ $< -w -B0 -w --background=#ffffff -A group=1.0 -X $(GV_OPT)
|
||||
|
||||
zip: $(PROJ)_$(VERSION).zip
|
||||
|
||||
GERBER_AWK = '/- +[-a-z_]+\.[-a-z]+\.[-a-z]+ +[a-z]/{print $$2}'
|
||||
|
||||
%_$(VERSION).zip: README.md %.plated-drill.cnc
|
||||
rm -fv $@
|
||||
zip $@ $< $$(awk $(GERBER_AWK) $<)
|
||||
|
||||
%.plated-drill.cnc: ../%.pcb
|
||||
pcb -x gerber --gerberfile $* --name-style single $<
|
||||
|
||||
bom: $(PROJ)_bom.pdf
|
||||
|
||||
%.bom: ../%.pcb
|
||||
pcb -x bom --bomfile $@ $<
|
||||
|
||||
%_bom.txt: %.bom
|
||||
bom.py -h $< > $@
|
||||
|
||||
%_bom.pdf: %.bom bom.py
|
||||
bom.py -h $< | utf82pdf > $@
|
||||
|
||||
.PRECIOUS: %.plated-drill.cnc %.png
|
||||
|
|
@ -1,159 +0,0 @@
|
|||
#!/usr/bin/python3
|
||||
|
||||
# $Id: gvp2make.py 8411 2022-02-28 11:50:10Z stephan $
|
||||
# This script is free software (c) 2010 Stephan I. Böttcher
|
||||
# Distributed under GNU GPL Version 2 or later.
|
||||
|
||||
"""
|
||||
Julian <thepurlieu@gmail.com> writes:
|
||||
|
||||
> Stephan,
|
||||
> Yes, you can do it, however you can't use the project file for the
|
||||
> process. Here's how:
|
||||
>
|
||||
> gerbv --export=png --dpi=600 --foreground=#ff0000ff
|
||||
> --foreground=#00ff0088 file1.gbx file2.gbx .......and so on
|
||||
>
|
||||
> Hope this helps. Cheers--
|
||||
"""
|
||||
|
||||
|
||||
usage="""
|
||||
Prints a gerbv commandline to export a project to png,
|
||||
with adjusted layer opacities.
|
||||
Options:
|
||||
-h print this help
|
||||
-g gerbv path of the gerbv executable
|
||||
-x png export format
|
||||
-o layout.png~ output file
|
||||
-D 600 dpi resolution
|
||||
-w <option> gerbv option
|
||||
-A layer=alpha alpha between 0 and 1.0
|
||||
-X execute the command
|
||||
-M print Makefile to stdout
|
||||
"""
|
||||
|
||||
options=[
|
||||
"gerbv",
|
||||
"--export=png",
|
||||
"--output=layout.png~",
|
||||
"--dpi=600",
|
||||
]
|
||||
|
||||
"""
|
||||
The layer names are the second dot-separated part of the filename.
|
||||
Digits are stripped from the layer name and tried again.
|
||||
"""
|
||||
|
||||
opacities = {
|
||||
"DEFAULT": 0.7,
|
||||
"frontsilk": 1.0,
|
||||
"topsilk": 1.0,
|
||||
"bottomsilk": 1.0,
|
||||
"backsilk": 1.0,
|
||||
"outline": 1.0,
|
||||
"plated-drill": 1.0,
|
||||
"frontpaste": 0.5,
|
||||
"backpaste": 0.5,
|
||||
"front": 0.3,
|
||||
"component": 0.3,
|
||||
"back": 0.3,
|
||||
"backside": 0.3,
|
||||
"group": 0.2,
|
||||
"signal": 0.2,
|
||||
"ground": 0.1,
|
||||
"grounds": 0.1,
|
||||
"power": 0.1,
|
||||
"nocoating": 0.5,
|
||||
}
|
||||
|
||||
execcmd=False
|
||||
makefile=False
|
||||
|
||||
import sys, os
|
||||
from getopt import gnu_getopt as getopt
|
||||
oo,ifile = getopt(sys.argv[1:], "hg:x:o:w:D:XMA:")
|
||||
for o,v in oo:
|
||||
if o=="-h":
|
||||
print("Synopsis:", sys.argv[0], "<options> gerbv-project-file", usage)
|
||||
sys.exit()
|
||||
if o=="-g":
|
||||
options[0]=v
|
||||
if o=="-x":
|
||||
options[1]="--export=%s" % v
|
||||
if o=="-o":
|
||||
options[2]="--output=%s" % v
|
||||
if o=="-D":
|
||||
options[3]="--dpi=%s" % v
|
||||
if o=="-w":
|
||||
options.append(v)
|
||||
if o=="-X":
|
||||
execcmd=True
|
||||
if o=="-M":
|
||||
makefile=True
|
||||
if o=="-A":
|
||||
vv=v.split("=")
|
||||
opacities[vv[0]]=float(vv[1])
|
||||
|
||||
def parselayer(l):
|
||||
r = {}
|
||||
for ll in l.strip().split("(cons"):
|
||||
lll = ll.strip().split(" ",1)
|
||||
r[lll[0].strip("'#()")] = lll[1].strip("#()")
|
||||
return r
|
||||
|
||||
layers = {}
|
||||
from fileinput import input
|
||||
|
||||
LL=""
|
||||
for l in input(ifile):
|
||||
LL+=l.strip()
|
||||
nopen=0
|
||||
nclose=0
|
||||
for L in LL:
|
||||
if L=='(':
|
||||
nopen += 1
|
||||
if L==')':
|
||||
nclose += 1
|
||||
if nopen==nclose:
|
||||
ll = parselayer(LL)
|
||||
if "define-layer!" in ll and "visible" in ll and ll["visible"]=="t":
|
||||
layers[int(ll["define-layer!"])] = ll
|
||||
LL=""
|
||||
|
||||
files=[]
|
||||
lnumbers = list(layers.keys())
|
||||
lnumbers.sort()
|
||||
for n in lnumbers:
|
||||
ll = layers[n]
|
||||
fn = ll["filename"].strip('"')
|
||||
files.append(fn)
|
||||
try:
|
||||
ltype = fn.split(".")[1]
|
||||
try:
|
||||
opacity = opacities[ltype]
|
||||
except KeyError:
|
||||
opacity = opacities[ltype.strip("0123456789")]
|
||||
except:
|
||||
opacity = opacities["DEFAULT"]
|
||||
color = [int(c)/65536. for c in ll["color"].split()]
|
||||
if "alpha" in ll:
|
||||
opacity = int(ll["alpha"])/65536
|
||||
if len(color)<4:
|
||||
color.append(opacity)
|
||||
options.append("--foreground=#%02x%02x%02x%02x" % tuple(
|
||||
[int(c*255) for c in color]))
|
||||
|
||||
if makefile:
|
||||
target = options[2].split("=")[1]
|
||||
print ("GERBV="+options[0])
|
||||
print ("FORMAT="+options[1].split("=")[1])
|
||||
print ("DPI="+options[3].split("=")[1])
|
||||
print (target+": \\\n\t "+" \\\n\t ".join(files))
|
||||
print ("\t$(GERBV) --output=$@ --export=$(FORMAT) --dpi=$(DPI) \\")
|
||||
print ("\t "+" \\\n\t ".join(options[4:])+" \\\n\t $<")
|
||||
else:
|
||||
cmd = " ".join(options+files)
|
||||
print (cmd)
|
||||
if execcmd:
|
||||
os.system(cmd)
|
||||
|
|
@ -1,83 +0,0 @@
|
|||
(gerbv-file-version! "2.0A")
|
||||
(define-layer! 14 (cons 'filename "thhor_crs.ground.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(27113 27113 27113))
|
||||
(cons 'alpha #(12079))
|
||||
)
|
||||
(define-layer! 13 (cons 'filename "thhor_crs.grounds.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(65535 50491 34053))
|
||||
(cons 'alpha #(27242))
|
||||
)
|
||||
(define-layer! 12 (cons 'filename "thhor_crs.power.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(65535 34990 63468))
|
||||
(cons 'alpha #(23130))
|
||||
)
|
||||
(define-layer! 11 (cons 'filename "thhor_crs.signal.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 24400 24400))
|
||||
(cons 'alpha #(38293))
|
||||
)
|
||||
(define-layer! 10 (cons 'filename "thhor_crs.bottom.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(60294 24022 3320))
|
||||
(cons 'alpha #(30326))
|
||||
)
|
||||
(define-layer! 9 (cons 'filename "thhor_crs.bottompaste.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 19099 1954))
|
||||
)
|
||||
(define-layer! 8 (cons 'filename "thhor_crs.bottommask.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(29344 65535 28765))
|
||||
)
|
||||
(define-layer! 7 (cons 'filename "thhor_crs.top.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(63383 4945 17070))
|
||||
(cons 'alpha #(27242))
|
||||
)
|
||||
(define-layer! 6 (cons 'filename "thhor_crs.toppaste.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(65535 2469 0))
|
||||
(cons 'alpha #(23644))
|
||||
)
|
||||
(define-layer! 5 (cons 'filename "thhor_crs.topmask.gbr")
|
||||
(cons 'inverted #t)
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(25200 65535 30627))
|
||||
)
|
||||
(define-layer! 4 (cons 'filename "thhor_crs.plated-drill.cnc")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(61307 61307 61307))
|
||||
(cons 'alpha #(65535))
|
||||
(cons 'attribs (list
|
||||
(list 'autodetect 'Boolean 1)
|
||||
(list 'zero_suppression 'Enum 0)
|
||||
(list 'units 'Enum 0)
|
||||
(list 'digits 'Integer 4)
|
||||
))
|
||||
)
|
||||
(define-layer! 3 (cons 'filename "thhor_crs.bottomsilk.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(0 0 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 2 (cons 'filename "thhor_crs.topsilk.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 1 (cons 'filename "thhor_crs.outline.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 47429 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 0 (cons 'filename "thhor_crs.fab.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
)
|
||||
(define-layer! -1 (cons 'filename ".")
|
||||
(cons 'color #(65535 65535 65535))
|
||||
)
|
||||
(set-render-type! 3)
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
(gerbv-file-version! "2.0A")
|
||||
(define-layer! 14 (cons 'filename "thhor_crs.ground.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(27113 27113 27113))
|
||||
(cons 'alpha #(12079))
|
||||
)
|
||||
(define-layer! 13 (cons 'filename "thhor_crs.grounds.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(65535 50491 34053))
|
||||
(cons 'alpha #(27242))
|
||||
)
|
||||
(define-layer! 12 (cons 'filename "thhor_crs.power.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(65535 34990 63468))
|
||||
(cons 'alpha #(23130))
|
||||
)
|
||||
(define-layer! 11 (cons 'filename "thhor_crs.signal.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 24400 24400))
|
||||
(cons 'alpha #(38293))
|
||||
)
|
||||
(define-layer! 10 (cons 'filename "thhor_crs.bottom.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(60294 24022 3320))
|
||||
)
|
||||
(define-layer! 9 (cons 'filename "thhor_crs.bottompaste.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(63479 30069 17733))
|
||||
)
|
||||
(define-layer! 8 (cons 'filename "thhor_crs.bottommask.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(29344 65535 28765))
|
||||
)
|
||||
(define-layer! 7 (cons 'filename "thhor_crs.top.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(63383 4945 17070))
|
||||
(cons 'alpha #(27242))
|
||||
)
|
||||
(define-layer! 6 (cons 'filename "thhor_crs.toppaste.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 2469 0))
|
||||
(cons 'alpha #(23644))
|
||||
)
|
||||
(define-layer! 5 (cons 'filename "thhor_crs.topmask.gbr")
|
||||
(cons 'inverted #t)
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(25200 65535 30627))
|
||||
)
|
||||
(define-layer! 4 (cons 'filename "thhor_crs.plated-drill.cnc")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(61307 61307 61307))
|
||||
(cons 'alpha #(65535))
|
||||
(cons 'attribs (list
|
||||
(list 'autodetect 'Boolean 1)
|
||||
(list 'zero_suppression 'Enum 0)
|
||||
(list 'units 'Enum 0)
|
||||
(list 'digits 'Integer 4)
|
||||
))
|
||||
)
|
||||
(define-layer! 3 (cons 'filename "thhor_crs.bottomsilk.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 2 (cons 'filename "thhor_crs.topsilk.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(0 0 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 1 (cons 'filename "thhor_crs.outline.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 47429 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 0 (cons 'filename "thhor_crs.fab.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
)
|
||||
(define-layer! -1 (cons 'filename ".")
|
||||
(cons 'color #(65535 65535 65535))
|
||||
)
|
||||
(set-render-type! 3)
|
||||
7008
gerber/thhor_crs.dxf
7008
gerber/thhor_crs.dxf
File diff suppressed because it is too large
Load diff
|
|
@ -1,82 +0,0 @@
|
|||
(gerbv-file-version! "2.0A")
|
||||
(define-layer! 14 (cons 'filename "thhor_crs.ground.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(27113 27113 27113))
|
||||
(cons 'alpha #(12079))
|
||||
)
|
||||
(define-layer! 13 (cons 'filename "thhor_crs.grounds.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(65535 50491 34053))
|
||||
(cons 'alpha #(27242))
|
||||
)
|
||||
(define-layer! 12 (cons 'filename "thhor_crs.power.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 34990 63468))
|
||||
(cons 'alpha #(23130))
|
||||
)
|
||||
(define-layer! 11 (cons 'filename "thhor_crs.signal.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(0 24400 24400))
|
||||
(cons 'alpha #(38293))
|
||||
)
|
||||
(define-layer! 10 (cons 'filename "thhor_crs.bottom.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(60294 24022 3320))
|
||||
)
|
||||
(define-layer! 9 (cons 'filename "thhor_crs.bottompaste.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(63479 30069 17733))
|
||||
)
|
||||
(define-layer! 8 (cons 'filename "thhor_crs.bottommask.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(29344 65535 28765))
|
||||
)
|
||||
(define-layer! 7 (cons 'filename "thhor_crs.top.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(63383 4945 17070))
|
||||
(cons 'alpha #(27242))
|
||||
)
|
||||
(define-layer! 6 (cons 'filename "thhor_crs.toppaste.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 2469 0))
|
||||
(cons 'alpha #(23644))
|
||||
)
|
||||
(define-layer! 5 (cons 'filename "thhor_crs.topmask.gbr")
|
||||
(cons 'inverted #t)
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(25200 65535 30627))
|
||||
)
|
||||
(define-layer! 4 (cons 'filename "thhor_crs.plated-drill.cnc")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(61307 61307 61307))
|
||||
(cons 'alpha #(65535))
|
||||
(cons 'attribs (list
|
||||
(list 'autodetect 'Boolean 1)
|
||||
(list 'zero_suppression 'Enum 0)
|
||||
(list 'units 'Enum 0)
|
||||
(list 'digits 'Integer 4)
|
||||
))
|
||||
)
|
||||
(define-layer! 3 (cons 'filename "thhor_crs.bottomsilk.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 2 (cons 'filename "thhor_crs.topsilk.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 1 (cons 'filename "thhor_crs.outline.gbr")
|
||||
(cons 'visible #t)
|
||||
(cons 'color #(65535 47429 0))
|
||||
(cons 'alpha #(65535))
|
||||
)
|
||||
(define-layer! 0 (cons 'filename "thhor_crs.fab.gbr")
|
||||
(cons 'visible #f)
|
||||
(cons 'color #(0 0 0))
|
||||
)
|
||||
(define-layer! -1 (cons 'filename ".")
|
||||
(cons 'color #(65535 65535 65535))
|
||||
)
|
||||
(set-render-type! 3)
|
||||
Binary file not shown.
|
Before Width: | Height: | Size: 172 KiB |
|
|
@ -1,5 +1,5 @@
|
|||
//
|
||||
// thhor.c
|
||||
// hallo.c
|
||||
//
|
||||
|
||||
// int = int8_t
|
||||
|
|
@ -37,7 +37,7 @@ int main()
|
|||
magic.reset_source = RSTCTRL.RSTFR;
|
||||
|
||||
RSTCTRL.RSTFR = magic.reset_source;
|
||||
send_str("\nV THHOR CRS V0.0");
|
||||
send_str("\nV Turbo Hallo V0.0");
|
||||
send_hex_byte_eol(magic.reset_source);
|
||||
|
||||
while (1) {
|
||||
|
|
@ -396,11 +396,9 @@ SFR = {
|
|||
"PORTMUX_EVSYSROUTEA": (0x05E0, 1),
|
||||
"PORTA_PIN3CTRL": (0x0413, 1),
|
||||
"VPORTB_DIR": (0x0004, 1),
|
||||
"VPORTB": (0x0004, 4),
|
||||
"ADC0_INTCTRL": (0x0604, 1),
|
||||
"NVMCTRL_DATAH": (0x1007, 1),
|
||||
"VPORTA_DIR": (0x0000, 1),
|
||||
"VPORTA": (0x0000, 4),
|
||||
"VREF_CTRLB": (0x00A1, 1),
|
||||
"NVMCTRL_DATAL": (0x1006, 1),
|
||||
"TWI0_SADDR": (0x08AC, 1),
|
||||
16
make-fp.py
16
make-fp.py
|
|
@ -1,16 +0,0 @@
|
|||
#! /usr/bin/python3
|
||||
|
||||
from fp import *
|
||||
|
||||
make(TSSOP, (14,16))
|
||||
make(MSOP, (8,))
|
||||
part(MSOP, name="MSOPE", th_pad=True)
|
||||
make(SOIC, (8,))
|
||||
make(SOT, (3,5))
|
||||
make(SC70, (5,))
|
||||
make(SOD, ("C0603", "C0805", "C1206", "P1206", "C2220"))
|
||||
make(SOD, ("SOD123", "SOD323F", "SOD523"))
|
||||
make(EIA, ("EIA7343",))
|
||||
part(QFN, name="EQFP", n=144, th_pad=True, width=20*mm, th_pad_width=4/20,
|
||||
pad_width=0.25*mm, pad_offset=-0.125*mm)
|
||||
make(HEADER, (8,))
|
||||
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Add table
Add a link
Reference in a new issue