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2 commits
8470575aa7 ... fb0ff6f300

Author SHA1 Message Date
Stephan I. Böttcher
fb0ff6f300 layout complete 2025-12-20 20:04:44 +01:00
Stephan I. Böttcher
773d85528a layout … 2025-12-20 11:59:52 +01:00
3 changed files with 4830 additions and 4416 deletions
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52
thhor_crs.net
View file

@ -17,10 +17,10 @@ XFET/adj XFET/R2-2 XFET/R1-2 XFET/U1-4
Vfet CONN1-2 CONN1-3 XFET/C3-1 XFET/R1-1 XFET/C2-2 XFET/U1-5
XSSP/adj XSSP/U1-4 XSSP/R1-2 XSSP/R2-2
XSSP/byp XSSP/U1-3 XSSP/C2-1
VssP CONN1-5 R57-2 R56-2 XSSP/U1-5 XSSP/C3-2 XSSP/R1-1 XSSP/C2-2
VssP CONN1-5 R65-1 XSSP/U1-5 XSSP/C3-2 XSSP/R1-1 XSSP/C2-2
XCCP/byp XCCP/C2-1 XCCP/U1-3
XCCP/adj XCCP/R2-2 XCCP/R1-2 XCCP/U1-4
VccP CONN1-4 R65-1 XCCP/C3-1 XCCP/R1-1 XCCP/C2-2 XCCP/U1-5
VccP CONN1-4 R57-2 R56-2 XCCP/C3-1 XCCP/R1-1 XCCP/C2-2 XCCP/U1-5
XIO/byp XIO/C2-1 XIO/U1-3
XIO/adj XIO/R2-2 XIO/R1-2 XIO/U1-4
XB/U2out XB/R6-2 XB/R9-1 XB/U2-1
@ -66,16 +66,16 @@ D/OUTA D/R2-2 D/C2-1 D/U1-6
D/OUTB D/R1-2 D/C1-1 D/U1-5
D/OUTC D/R0-2 D/C0-1 D/U1-4
HKD7 R61-2 C55-2 D/R7-2 D/C7-2 D/U1-11
HKD5 R57-1 R65-2 C59-2 D/C5-2 D/U1-9
HKD5 R51-1 R53-2 C51-2 D/C5-2 D/U1-9
HKD4 R74-1 C63-2 D/C4-2 D/U1-8
HKD3 R51-1 R53-2 C51-2 D/C3-2 D/U1-7
SD2 CONN1-8 D/C/R1-1
SD1 CONN1-9 D/B/R1-1
HKD3 R69-2 C60-2 R68-1 D/C3-2 D/U1-7
SD2 CONN1-9 D/C/R1-1
SD1 CONN1-11 D/B/R1-1
DIND R1-6 D/U1-14
SCKD R1-8 D/U1-16
nCSD R1-5 D/U1-1
DOUTD R1-7 D/U1-15
SD0 CONN1-10 D/A/R1-1
SD0 CONN1-12 D/A/R1-1
C/A/r6vss C/A/C7-1 C/A/R7-1 C/A/R6-2
C/A/pz C/A/R0-1 C/A/C0-2
C/A/inz C/A/R1-2 C/A/C0-1 C/A/C1-1
@ -104,16 +104,16 @@ C/OUTA C/R2-2 C/C2-1 C/U1-6
C/OUTB C/R1-2 C/C1-1 C/U1-5
C/OUTC C/R0-2 C/C0-1 C/U1-4
HKC7 CONN1-6 C54-2 C/R7-2 C/C7-2 C/U1-11
HKC5 R64-2 C58-2 R56-1 C/C5-2 C/U1-9
HKC4 R72-1 R73-2 C62-2 C/C4-2 C/U1-8
HKC5 R72-1 R73-2 C62-2 C/C5-2 C/U1-9
HKC4 R62-2 C56-2 R54-1 C/C4-2 C/U1-8
HKC3 R52-2 C50-2 R50-1 C/C3-2 C/U1-7
SC2 CONN1-11 C/C/R1-1
SC1 CONN1-12 C/B/R1-1
SC2 CONN1-10 C/C/R1-1
SC1 CONN1-8 C/B/R1-1
DINC R2-6 C/U1-14
SCKC R2-8 C/U1-16
nCSC R2-5 C/U1-1
DOUTC R2-7 C/U1-15
SC0 CONN1-13 C/A/R1-1
SC0 CONN1-16 C/A/R1-1
B/A/r6vss B/A/C7-1 B/A/R7-1 B/A/R6-2
B/A/pz B/A/R0-1 B/A/C0-2
B/A/inz B/A/R1-2 B/A/C0-1 B/A/C1-1
@ -141,17 +141,17 @@ B/Cout B/C/U1-1 B/C/C3-2 B/C/R3-2 B/R2-1
B/OUTA B/R2-2 B/C2-1 B/U1-6
B/OUTB B/R1-2 B/C1-1 B/U1-5
B/OUTC B/R0-2 B/C0-1 B/U1-4
HKB7 CONN1-25 C53-2 B/R7-2 B/C7-2 B/U1-11
HKB5 R55-1 R63-2 C57-2 B/C5-2 B/U1-9
HKB4 R70-1 C61-2 B/C4-2 B/U1-8
HKB3 C34-2 R34-2 B/C3-2 B/U1-7
SB2 CONN1-14 B/C/R1-1
SB1 CONN1-15 B/B/R1-1
HKB7 CONN1-7 C53-2 B/R7-2 B/C7-2 B/U1-11
HKB5 C34-2 R34-2 B/C5-2 B/U1-9
HKB4 R55-1 R63-2 C57-2 B/C4-2 B/U1-8
HKB3 R70-1 C61-2 B/C3-2 B/U1-7
SB2 CONN1-17 B/C/R1-1
SB1 CONN1-19 B/B/R1-1
DINB R3-6 B/U1-14
SCKB R3-8 B/U1-16
nCSB R3-5 B/U1-1
DOUTB R3-7 B/U1-15
SB0 CONN1-16 B/A/R1-1
SB0 CONN1-18 B/A/R1-1
A/A/r6vss A/A/C7-1 A/A/R7-1 A/A/R6-2
A/A/pz A/A/R0-1 A/A/C0-2
A/A/inz A/A/R1-2 A/A/C0-1 A/A/C1-1
@ -182,20 +182,20 @@ A/OUTC A/R0-2 A/C0-1 A/U1-4
VccS R55-2 R54-2 XCCS/C3-1 XCCS/R1-1 XCCS/C2-2 XCCS/U1-5 D/A/R5-1 D/B/R5-1 D/C/R5-1 C/A/R5-1 C/B/R5-1 C/C/R5-1 B/A/R5-1 B/B/R5-1 B/C/R5-1 A/A/R5-1 A/B/R5-1 A/C/R5-1
VssS R63-1 XSSS/U1-5 XSSS/C3-2 XSSS/R1-1 XSSS/C2-2 D/A/R7-2 D/A/R4-2 D/B/R7-2 D/B/R4-2 D/C/R7-2 D/C/R4-2 C/A/R7-2 C/A/R4-2 C/B/R7-2 C/B/R4-2 C/C/R7-2 C/C/R4-2 B/A/R7-2 B/A/R4-2 B/B/R7-2 B/B/R4-2 B/C/R7-2 \
B/C/R4-2 A/A/R7-2 A/A/R4-2 A/B/R7-2 A/B/R4-2 A/C/R7-2 A/C/R4-2
HKA7 CONN1-7 C52-2 A/R7-2 A/C7-2 A/U1-11
HKA7 CONN1-25 C52-2 A/R7-2 A/C7-2 A/U1-11
HK6 R66-1 R67-2 C64-2 D/C6-2 D/U1-10 C/C6-2 C/U1-10 B/C6-2 B/U1-10 A/C6-2 A/U1-10
HKA5 R62-2 C56-2 R54-1 A/C5-2 A/U1-9
HKA4 R69-2 C60-2 R68-1 A/C4-2 A/U1-8
HKA3 R39-2 A/C3-2 A/U1-7
SA2 CONN1-17 A/C/R1-1
SA1 CONN1-18 A/B/R1-1
HKA5 R39-2 A/C5-2 A/U1-9
HKA4 R64-2 C58-2 R56-1 A/C4-2 A/U1-8
HKA3 R57-1 R65-2 C59-2 A/C3-2 A/U1-7
SA2 CONN1-15 A/C/R1-1
SA1 CONN1-14 A/B/R1-1
DINA R4-6 A/U1-14
Vadc C141-1 C140-1 R36-2 R66-2 XADC/C3-1 XADC/R1-1 XADC/C2-2 XADC/U1-5 D/R7-1 D/C9-2 D/C8-2 D/U1-13 D/U1-2 C/R7-1 C/C9-2 C/C8-2 C/U1-13 C/U1-2 B/R7-1 B/C9-2 B/C8-2 B/U1-13 B/U1-2 A/R7-1 A/C9-2 A/C8-2 \
A/U1-13 A/U1-2
SCKA R4-8 A/U1-16
nCSA R4-5 A/U1-1
DOUTA R4-7 A/U1-15
SA0 CONN1-19 A/A/R1-1
SA0 CONN1-13 A/A/R1-1
XPLL/byp XPLL/C2-1 XPLL/U1-3
XPLL/adj XPLL/R2-2 XPLL/R1-2 XPLL/U1-4
XP/D2A XP/L2-3 XP/D2-2

9058
thhor_crs.pcb
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File diff suppressed because it is too large Load diff

312
thhor_crs.sch
View file

@ -1606,13 +1606,13 @@ T 27950 52150 5 10 1 1 0 0 1
value=0Ω
}
N 28600 52000 28800 52000 4
C 32500 51300 1 0 0 io-1.sym
C 23300 35300 1 90 0 io-1.sym
{
T 33400 51500 5 10 0 0 0 0 1
T 23100 36200 5 10 0 0 90 0 1
net=HKA3:1
T 32700 51900 5 10 0 0 0 0 1
T 22700 35500 5 10 0 0 90 0 1
device=none
T 33000 51400 5 8 1 1 0 4 1
T 23200 35800 5 8 1 1 90 4 1
value=HKA3
}
N 26100 51400 27600 51400 4
@ -2081,13 +2081,13 @@ N 40000 52300 40400 52300 4
N 40400 51400 40000 51400 4
C 39900 51100 1 0 0 gnd-1.sym
C 39800 53100 1 0 0 vcc-1.sym
C 36800 52500 1 0 0 io-1.sym
C 39100 49300 1 90 0 io-1.sym
{
T 37700 52700 5 10 0 0 0 0 1
T 38900 50200 5 10 0 0 90 0 1
net=HKB3:1
T 37000 53100 5 10 0 0 0 0 1
T 38500 49500 5 10 0 0 90 0 1
device=none
T 37300 52600 5 8 1 1 0 4 1
T 39000 49800 5 8 1 1 90 4 1
value=HKB3
}
C 40500 52300 1 90 0 io-1.sym
@ -2099,13 +2099,13 @@ device=none
T 40400 52800 5 8 1 1 90 4 1
value=HKC3
}
C 41600 52300 1 90 0 io-1.sym
C 37800 49300 1 90 0 io-1.sym
{
T 41400 53200 5 10 0 0 90 0 1
T 37600 50200 5 10 0 0 90 0 1
net=HKD3:1
T 41000 52500 5 10 0 0 90 0 1
T 37200 49500 5 10 0 0 90 0 1
device=none
T 41500 52800 5 8 1 1 90 4 1
T 37700 49800 5 8 1 1 90 4 1
value=HKD3
}
C 41700 51400 1 90 0 capacitor-1.sym
@ -2352,22 +2352,22 @@ net=VccS:1
T 19200 36350 3 8 1 1 0 3 1
description=VccS
}
C 19700 35300 1 90 0 io-1.sym
C 32500 51300 1 0 0 io-1.sym
{
T 19500 36200 5 10 0 0 90 0 1
T 33400 51500 5 10 0 0 0 0 1
net=HKA5:1
T 19100 35500 5 10 0 0 90 0 1
T 32700 51900 5 10 0 0 0 0 1
device=none
T 19600 35800 5 8 1 1 90 4 1
T 33000 51400 5 8 1 1 0 4 1
value=HKA5
}
C 20800 35300 1 90 0 io-1.sym
C 36800 52500 1 0 0 io-1.sym
{
T 20600 36200 5 10 0 0 90 0 1
T 37700 52700 5 10 0 0 0 0 1
net=HKB5:1
T 20200 35500 5 10 0 0 90 0 1
T 37000 53100 5 10 0 0 0 0 1
device=none
T 20700 35800 5 8 1 1 90 4 1
T 37300 52600 5 8 1 1 0 4 1
value=HKB5
}
C 21800 35300 1 90 0 resistor-2.sym
@ -2448,43 +2448,36 @@ refdes=R57
T 22650 35550 5 10 1 1 90 0 1
value=10kΩ
}
C 23000 34500 1 180 0 generic-power.sym
{
T 22800 34250 5 10 0 1 180 3 1
net=VccP:1
T 22800 34250 3 8 1 1 180 3 1
description=VccP
}
C 21500 36100 1 0 0 generic-power.sym
{
T 21700 36350 5 10 0 1 0 3 1
net=VssP:1
T 21700 36350 3 8 1 1 0 3 1
description=VssP
}
C 22600 36100 1 0 0 generic-power.sym
{
T 22800 36350 5 10 0 1 0 3 1
net=VssP:1
net=VccP:1
T 22800 36350 3 8 1 1 0 3 1
description=VccP
}
C 23000 34500 1 180 0 generic-power.sym
{
T 22800 34250 5 10 0 1 180 3 1
net=VssP:1
T 22800 34250 3 8 1 1 180 3 1
description=VssP
}
C 22200 35300 1 90 0 io-1.sym
C 40300 49300 1 90 0 io-1.sym
{
T 22000 36200 5 10 0 0 90 0 1
T 40100 50200 5 10 0 0 90 0 1
net=HKC5:1
T 21600 35500 5 10 0 0 90 0 1
T 39700 49500 5 10 0 0 90 0 1
device=none
T 22100 35800 5 8 1 1 90 4 1
T 40200 49800 5 8 1 1 90 4 1
value=HKC5
}
C 23300 35300 1 90 0 io-1.sym
C 41600 52300 1 90 0 io-1.sym
{
T 23100 36200 5 10 0 0 90 0 1
T 41400 53200 5 10 0 0 90 0 1
net=HKD5:1
T 22700 35500 5 10 0 0 90 0 1
T 41000 52500 5 10 0 0 90 0 1
device=none
T 23200 35800 5 8 1 1 90 4 1
T 41500 52800 5 8 1 1 90 4 1
value=HKD5
}
C 40400 33800 1 90 0 capacitor-1.sym
@ -2745,13 +2738,13 @@ net=Vprim:1
T 37300 50350 3 8 1 1 0 3 1
description=Vprim
}
C 37800 49300 1 90 0 io-1.sym
C 22200 35300 1 90 0 io-1.sym
{
T 37600 50200 5 10 0 0 90 0 1
T 22000 36200 5 10 0 0 90 0 1
net=HKA4:1
T 37200 49500 5 10 0 0 90 0 1
T 21600 35500 5 10 0 0 90 0 1
device=none
T 37700 49800 5 8 1 1 90 4 1
T 22100 35800 5 8 1 1 90 4 1
value=HKA4
}
C 40400 48400 1 90 0 capacitor-1.sym
@ -2798,33 +2791,24 @@ refdes=C63
N 41000 49300 41400 49300 4
C 41300 48100 1 0 0 gnd-1.sym
N 41000 50100 41000 50200 4
C 39100 49300 1 90 0 io-1.sym
C 20800 35300 1 90 0 io-1.sym
{
T 38900 50200 5 10 0 0 90 0 1
T 20600 36200 5 10 0 0 90 0 1
net=HKB4:1
T 38500 49500 5 10 0 0 90 0 1
T 20200 35500 5 10 0 0 90 0 1
device=none
T 39000 49800 5 8 1 1 90 4 1
T 20700 35800 5 8 1 1 90 4 1
value=HKB4
}
C 40300 49300 1 90 0 io-1.sym
C 19700 35300 1 90 0 io-1.sym
{
T 40100 50200 5 10 0 0 90 0 1
T 19500 36200 5 10 0 0 90 0 1
net=HKC4:1
T 39700 49500 5 10 0 0 90 0 1
T 19100 35500 5 10 0 0 90 0 1
device=none
T 40200 49800 5 8 1 1 90 4 1
T 19600 35800 5 8 1 1 90 4 1
value=HKC4
}
C 41500 49300 1 90 0 io-1.sym
{
T 41300 50200 5 10 0 0 90 0 1
net=HKD4:1
T 40900 49500 5 10 0 0 90 0 1
device=none
T 41400 49800 5 8 1 1 90 4 1
value=HKD4
}
C 38700 49300 1 90 0 resistor-2.sym
{
T 38350 49700 5 10 0 0 90 0 1
@ -4582,112 +4566,112 @@ footprint=OmneVSM37
T 46300 49300 5 10 1 1 0 0 1
net=GND:0
}
C 45900 37800 1 180 0 io-1.sym
C 45900 41400 1 180 0 io-1.sym
{
T 45000 37600 5 10 0 0 180 0 1
T 45000 41200 5 10 0 0 180 0 1
net=SA0:1
T 45700 37200 5 10 0 0 180 0 1
T 45700 40800 5 10 0 0 180 0 1
device=none
T 45400 37700 5 8 1 1 180 4 1
T 45400 41300 5 8 1 1 180 4 1
value=SA0
}
C 45900 38400 1 180 0 io-1.sym
{
T 45000 38200 5 10 0 0 180 0 1
net=SA1:1
T 45700 37800 5 10 0 0 180 0 1
device=none
T 45400 38300 5 8 1 1 180 4 1
value=SA1
}
C 45900 39000 1 180 0 io-1.sym
{
T 45000 38800 5 10 0 0 180 0 1
net=SA2:1
T 45700 38400 5 10 0 0 180 0 1
device=none
T 45400 38900 5 8 1 1 180 4 1
value=SA2
}
C 45900 39600 1 180 0 io-1.sym
{
T 45000 39400 5 10 0 0 180 0 1
net=SB0:1
T 45700 39000 5 10 0 0 180 0 1
device=none
T 45400 39500 5 8 1 1 180 4 1
value=SB0
}
C 45900 40200 1 180 0 io-1.sym
{
T 45000 40000 5 10 0 0 180 0 1
net=SB1:1
T 45700 39600 5 10 0 0 180 0 1
device=none
T 45400 40100 5 8 1 1 180 4 1
value=SB1
}
C 45900 40800 1 180 0 io-1.sym
{
T 45000 40600 5 10 0 0 180 0 1
net=SB2:1
net=SA1:1
T 45700 40200 5 10 0 0 180 0 1
device=none
T 45400 40700 5 8 1 1 180 4 1
value=SA1
}
C 45900 40200 1 180 0 io-1.sym
{
T 45000 40000 5 10 0 0 180 0 1
net=SA2:1
T 45700 39600 5 10 0 0 180 0 1
device=none
T 45400 40100 5 8 1 1 180 4 1
value=SA2
}
C 45900 38400 1 180 0 io-1.sym
{
T 45000 38200 5 10 0 0 180 0 1
net=SB0:1
T 45700 37800 5 10 0 0 180 0 1
device=none
T 45400 38300 5 8 1 1 180 4 1
value=SB0
}
C 45900 37800 1 180 0 io-1.sym
{
T 45000 37600 5 10 0 0 180 0 1
net=SB1:1
T 45700 37200 5 10 0 0 180 0 1
device=none
T 45400 37700 5 8 1 1 180 4 1
value=SB1
}
C 45900 39000 1 180 0 io-1.sym
{
T 45000 38800 5 10 0 0 180 0 1
net=SB2:1
T 45700 38400 5 10 0 0 180 0 1
device=none
T 45400 38900 5 8 1 1 180 4 1
value=SB2
}
C 45900 41400 1 180 0 io-1.sym
C 45900 39600 1 180 0 io-1.sym
{
T 45000 41200 5 10 0 0 180 0 1
T 45000 39400 5 10 0 0 180 0 1
net=SC0:1
T 45700 40800 5 10 0 0 180 0 1
T 45700 39000 5 10 0 0 180 0 1
device=none
T 45400 41300 5 8 1 1 180 4 1
T 45400 39500 5 8 1 1 180 4 1
value=SC0
}
C 45900 42000 1 180 0 io-1.sym
{
T 45000 41800 5 10 0 0 180 0 1
net=SC1:1
T 45700 41400 5 10 0 0 180 0 1
device=none
T 45400 41900 5 8 1 1 180 4 1
value=SC1
}
C 45900 42600 1 180 0 io-1.sym
{
T 45000 42400 5 10 0 0 180 0 1
net=SC2:1
T 45700 42000 5 10 0 0 180 0 1
device=none
T 45400 42500 5 8 1 1 180 4 1
value=SC2
}
C 45900 43200 1 180 0 io-1.sym
{
T 45000 43000 5 10 0 0 180 0 1
net=SD0:1
T 45700 42600 5 10 0 0 180 0 1
device=none
T 45400 43100 5 8 1 1 180 4 1
value=SD0
}
C 45900 43800 1 180 0 io-1.sym
{
T 45000 43600 5 10 0 0 180 0 1
net=SD1:1
T 45700 43200 5 10 0 0 180 0 1
device=none
T 45400 43700 5 8 1 1 180 4 1
value=SD1
}
C 45900 44400 1 180 0 io-1.sym
{
T 45000 44200 5 10 0 0 180 0 1
net=SD2:1
net=SC1:1
T 45700 43800 5 10 0 0 180 0 1
device=none
T 45400 44300 5 8 1 1 180 4 1
value=SC1
}
C 45900 43200 1 180 0 io-1.sym
{
T 45000 43000 5 10 0 0 180 0 1
net=SC2:1
T 45700 42600 5 10 0 0 180 0 1
device=none
T 45400 43100 5 8 1 1 180 4 1
value=SC2
}
C 45900 42000 1 180 0 io-1.sym
{
T 45000 41800 5 10 0 0 180 0 1
net=SD0:1
T 45700 41400 5 10 0 0 180 0 1
device=none
T 45400 41900 5 8 1 1 180 4 1
value=SD0
}
C 45900 42600 1 180 0 io-1.sym
{
T 45000 42400 5 10 0 0 180 0 1
net=SD1:1
T 45700 42000 5 10 0 0 180 0 1
device=none
T 45400 42500 5 8 1 1 180 4 1
value=SD1
}
C 45900 43800 1 180 0 io-1.sym
{
T 45000 43600 5 10 0 0 180 0 1
net=SD2:1
T 45700 43200 5 10 0 0 180 0 1
device=none
T 45400 43700 5 8 1 1 180 4 1
value=SD2
}
C 45600 38100 1 270 0 gnd-1.sym
@ -4734,22 +4718,22 @@ description=VssP
}
C 45600 48300 1 270 0 gnd-1.sym
C 45600 47100 1 270 0 gnd-1.sym
C 45900 45000 1 180 0 io-1.sym
{
T 45000 44800 5 10 0 0 180 0 1
net=HKA7:1
T 45700 44400 5 10 0 0 180 0 1
device=none
T 45400 44900 5 8 1 1 180 4 1
value=HKA7
}
C 45900 45300 1 180 0 io-1.sym
{
T 45000 45100 5 10 0 0 180 0 1
net=HKB7:1
net=HKA7:1
T 45700 44700 5 10 0 0 180 0 1
device=none
T 45400 45200 5 8 1 1 180 4 1
value=HKA7
}
C 45900 45000 1 180 0 io-1.sym
{
T 45000 44800 5 10 0 0 180 0 1
net=HKB7:1
T 45700 44400 5 10 0 0 180 0 1
device=none
T 45400 44900 5 8 1 1 180 4 1
value=HKB7
}
C 45900 45600 1 180 0 io-1.sym
@ -4821,3 +4805,19 @@ net=GND:2
T 18350 46400 5 10 1 1 90 0 1
net=Vadc:1
}
C 41500 49300 1 90 0 io-1.sym
{
T 41300 50200 5 10 0 0 90 0 1
net=HKD4:1
T 40900 49500 5 10 0 0 90 0 1
device=none
T 41400 49800 5 8 1 1 90 4 1
value=HKD4
}
C 21500 36100 1 0 0 generic-power.sym
{
T 21700 36350 5 10 0 1 0 3 1
net=VccP:1
T 21700 36350 3 8 1 1 0 3 1
description=VccP
}