thhor_crs/dorn.sch
Stephan I. Böttcher 8470575aa7 shaper layout from leia
2025-12-20 05:02:39 +01:00

471 lines
9.1 KiB
Text

v 20220529 2
C 61100 31800 0 0 0 title-A3.sym
{
T 74700 31900 15 10 1 1 0 0 1
author=$Author: stephan $
T 74700 32200 15 10 1 1 0 0 1
revision=$Revision: 9391 $
T 70900 32800 15 10 1 1 0 0 1
id=$Id: dorn-leia.sch 9391 2025-10-16 14:31:23Z stephan $
}
T 46400 60100 8 10 0 1 0 0 1
netname=X41out
T 72300 40300 8 10 0 1 0 0 1
netname=X35in
T 72300 35900 8 10 0 1 0 0 1
netname=X36in
C 71100 37700 1 0 0 ADC128S102-16.sym
{
T 71900 38300 5 10 1 1 0 0 1
device=ADC128S102
T 72200 39000 5 10 1 1 0 0 1
refdes=U1
T 73100 38300 5 10 1 1 0 2 1
footprint=TSSOP_4_16
T 72700 38550 5 7 0 1 180 0 1
value=ADC128S102
}
C 72300 37400 1 0 0 gnd-1.sym
C 71800 37400 1 0 0 gnd-1.sym
C 72200 40100 1 0 0 generic-power.sym
{
T 72400 40350 5 10 0 1 270 7 1
net=Vdig:1
T 72400 40350 3 7 1 1 0 3 1
value=Vdig
}
N 67300 39200 71100 39200 4
{
T 69200 39300 5 10 1 1 0 7 1
netname=OUTA
}
C 70700 39700 1 270 1 capacitor-1.sym
{
T 71000 40050 5 10 1 1 270 1 1
refdes=C0
T 70600 40150 5 10 1 1 90 4 1
value=10nF NP0
T 71400 39900 5 10 0 0 90 2 1
device=CAPACITOR
T 71600 39900 5 10 0 0 90 2 1
symversion=0.1
T 70700 40200 5 10 1 1 90 2 1
footprint=C0805
}
C 71000 40900 1 180 0 gnd-1.sym
N 65600 39400 71100 39400 4
{
T 69200 39500 5 10 1 1 0 7 1
netname=OUTB
}
N 70300 39400 70300 39700 4
N 68100 39600 71100 39600 4
{
T 69200 39700 5 10 1 1 0 7 1
netname=OUTC
}
N 69700 39200 69700 39700 4
N 70900 39600 70900 39700 4
C 71000 37200 1 90 0 capacitor-1.sym
{
T 70900 37300 5 10 1 1 90 1 1
refdes=C7
T 70900 37700 5 10 1 1 90 1 1
value=100nF
T 70300 37400 5 10 0 0 90 0 1
device=CAPACITOR
T 70100 37400 5 10 0 0 90 0 1
symversion=0.1
T 71000 37700 5 10 0 1 90 0 1
footprint=C0603
}
C 70500 37200 1 90 0 capacitor-1.sym
{
T 70400 37300 5 10 1 1 90 1 1
refdes=C6
T 70400 37700 5 10 1 1 90 1 1
value=100nF
T 69800 37400 5 10 0 0 90 0 1
device=CAPACITOR
T 69600 37400 5 10 0 0 90 0 1
symversion=0.1
T 70500 37700 5 10 0 1 90 0 1
footprint=C0603
}
C 70000 37200 1 90 0 capacitor-1.sym
{
T 69900 37300 5 10 1 1 90 1 1
refdes=C5
T 69900 37700 5 10 1 1 90 1 1
value=100nF
T 69300 37400 5 10 0 0 90 0 1
device=CAPACITOR
T 69100 37400 5 10 0 0 90 0 1
symversion=0.1
T 70000 37700 5 10 0 1 90 0 1
footprint=C0603
}
C 69500 37200 1 90 0 capacitor-1.sym
{
T 69400 37300 5 10 1 1 90 1 1
refdes=C4
T 69400 37700 5 10 1 1 90 1 1
value=100nF
T 68800 37400 5 10 0 0 90 0 1
device=CAPACITOR
T 68600 37400 5 10 0 0 90 0 1
symversion=0.1
T 69500 37700 5 10 0 1 90 0 1
footprint=C0603
}
C 69000 37200 1 90 0 capacitor-1.sym
{
T 68900 37300 5 10 1 1 90 1 1
refdes=C3
T 68900 37700 5 10 1 1 90 1 1
value=100nF
T 68300 37400 5 10 0 0 90 0 1
device=CAPACITOR
T 68100 37400 5 10 0 0 90 0 1
symversion=0.1
T 69000 37700 5 10 0 1 90 0 1
footprint=C0603
}
C 70700 36900 1 0 0 gnd-1.sym
N 70800 38100 70800 38200 4
N 66900 38200 71100 38200 4
N 66900 38400 71100 38400 4
N 70300 38400 70300 38100 4
N 69800 38100 69800 38600 4
N 66900 38600 71100 38600 4
N 66900 38800 71100 38800 4
N 69300 38800 69300 38100 4
N 66900 39000 71100 39000 4
N 68800 39000 68800 38100 4
C 73600 35800 1 90 0 capacitor-1.sym
{
T 73500 35900 5 10 1 1 90 1 1
refdes=C8
T 73500 36300 5 10 1 1 90 1 1
value=100nF
T 72900 36000 5 10 0 0 90 0 1
device=CAPACITOR
T 72700 36000 5 10 0 0 90 0 1
symversion=0.1
T 73600 36300 5 10 0 1 90 0 1
footprint=C0603
}
C 74100 35800 1 90 0 capacitor-1.sym
{
T 74000 35900 5 10 1 1 90 1 1
refdes=C9
T 74000 36300 5 10 1 1 90 1 1
value=100nF
T 73400 36000 5 10 0 0 90 0 1
device=CAPACITOR
T 73200 36000 5 10 0 0 90 0 1
symversion=0.1
T 74100 36300 5 10 0 1 90 0 1
footprint=C0603
}
C 73800 35500 1 0 0 gnd-1.sym
C 73300 35500 1 0 0 gnd-1.sym
C 71700 40100 1 0 0 generic-power.sym
{
T 71900 40350 5 10 0 1 270 7 1
net=Vadc:1
T 71900 40350 3 7 1 1 0 3 1
value=Vadc
}
C 73700 36700 1 0 0 generic-power.sym
{
T 73900 36950 5 10 0 1 270 7 1
net=Vdig:1
T 73900 36950 3 7 1 1 0 3 1
value=Vdig
}
C 68500 36000 1 90 0 resistor-1.sym
{
T 68200 36200 5 10 1 1 90 0 1
refdes=R7
T 68700 36200 5 10 1 1 90 0 1
footprint=C0603
T 68200 36600 5 10 1 1 90 0 1
value=$R7
}
N 68400 36900 68400 38200 4
C 75400 38800 1 0 0 output-1.sym
{
T 75500 39100 5 10 0 0 0 0 1
device=OUTPUT
T 75650 38900 5 10 1 1 0 1 1
refdes=DOUT
}
C 64700 37100 1 0 0 resistor-1.sym
{
T 64900 36900 5 10 0 1 0 0 1
footprint=C0603
T 65300 36900 5 10 1 1 0 0 1
refdes=R2
T 64800 36900 5 10 1 1 0 0 1
value=100Ω
}
N 64700 41600 64600 41600 4
{
T 64600 41550 5 5 1 1 0 1 1
netname=Aout
}
C 63600 40500 1 0 0 gnd-1.sym
C 63800 42300 1 0 0 vcc-1.sym
C 64200 40900 1 180 0 vss-1.sym
N 64000 42300 64000 42500 4
N 64000 40900 64000 40700 4
N 63700 40800 63700 40700 4
C 63100 36300 1 0 0 FSH-1.sym
{
T 63900 37400 5 10 0 1 0 0 1
device=SK
T 63500 37000 5 10 1 1 0 1 1
refdes=C
T 63500 37200 5 6 1 1 0 1 1
source=FSH-PZO.sch
}
C 64700 39300 1 0 0 resistor-1.sym
{
T 64900 39100 5 10 0 1 0 0 1
footprint=C0603
T 65300 39100 5 10 1 1 0 0 1
refdes=R1
T 64800 39100 5 10 1 1 0 0 1
value=100Ω
}
N 64700 39400 64600 39400 4
{
T 64600 39350 5 5 1 1 0 1 1
netname=Bout
}
C 63600 38300 1 0 0 gnd-1.sym
C 63800 40100 1 0 0 vcc-1.sym
C 64200 38700 1 180 0 vss-1.sym
N 64000 40100 64000 40300 4
N 64000 38700 64000 38500 4
N 63700 38600 63700 38500 4
C 63100 38500 1 0 0 FSH-1.sym
{
T 63900 39600 5 10 0 1 0 0 1
device=SK
T 63500 39200 5 10 1 1 0 1 1
refdes=B
T 63500 39400 5 6 1 1 0 1 1
source=FSH-PZO.sch
}
C 64700 41500 1 0 0 resistor-1.sym
{
T 64900 41300 5 10 0 1 0 0 1
footprint=C0603
T 65300 41300 5 10 1 1 0 0 1
refdes=R0
T 64800 41300 5 10 1 1 0 0 1
value=100Ω
}
N 64700 37200 64600 37200 4
{
T 64600 37150 5 5 1 1 0 1 1
netname=Cout
}
C 63600 36100 1 0 0 gnd-1.sym
C 63800 37900 1 0 0 vcc-1.sym
C 64200 36500 1 180 0 vss-1.sym
N 64000 37900 64000 38100 4
N 64000 36500 64000 36300 4
N 63700 36400 63700 36300 4
C 63100 40700 1 0 0 FSH-1.sym
{
T 63900 41800 5 10 0 1 0 0 1
device=SK
T 63500 41400 5 10 1 1 0 1 1
refdes=A
T 63500 41600 5 6 1 1 0 1 1
source=FSH-PZO.sch
}
C 73200 36700 1 0 0 generic-power.sym
{
T 73400 36950 5 10 0 1 270 7 1
net=Vadc:1
T 73400 36950 3 7 1 1 0 3 1
value=Vadc
}
C 68600 36000 1 180 0 generic-power.sym
{
T 68400 35750 5 10 0 1 90 7 1
net=Vadc:1
T 68400 35750 3 7 1 1 180 3 1
value=Vadc
}
N 68100 39600 68100 41600 4
N 68100 41600 65600 41600 4
N 67300 37200 67300 39200 4
N 67300 37200 65600 37200 4
C 64700 35500 1 0 0 input-1.sym
{
T 64700 35800 5 10 0 0 0 0 1
device=INPUT
T 64750 35600 5 10 1 1 0 1 1
refdes=VCC
}
C 64700 35000 1 0 0 input-1.sym
{
T 64700 35300 5 10 0 0 0 0 1
device=INPUT
T 64750 35100 5 10 1 1 0 1 1
refdes=VSS
}
C 72500 35700 1 0 0 input-1.sym
{
T 72500 36000 5 10 0 0 0 0 1
device=INPUT
T 72550 35800 5 10 1 1 0 1 1
refdes=AGND
}
C 62300 41500 1 0 0 input-1.sym
{
T 62300 41800 5 10 0 0 0 0 1
device=INPUT
T 62350 41600 5 10 1 1 0 1 1
refdes=IN0
}
C 62300 39300 1 0 0 input-1.sym
{
T 62300 39600 5 10 0 0 0 0 1
device=INPUT
T 62350 39400 5 10 1 1 0 1 1
refdes=IN1
}
C 62300 37100 1 0 0 input-1.sym
{
T 62300 37400 5 10 0 0 0 0 1
device=INPUT
T 62350 37200 5 10 1 1 0 1 1
refdes=IN2
}
N 73300 35800 73400 35800 4
C 74800 36800 1 180 0 input-1.sym
{
T 74800 36500 5 10 0 0 180 0 1
device=INPUT
T 74750 36700 5 10 1 1 180 1 1
refdes=VD
}
N 73900 36700 74000 36700 4
C 72500 36600 1 0 0 input-1.sym
{
T 72500 36900 5 10 0 0 0 0 1
device=INPUT
T 72550 36700 5 10 1 1 0 1 1
refdes=VA
}
N 73300 36700 73400 36700 4
C 76200 39600 1 180 0 input-1.sym
{
T 76200 39300 5 10 0 0 180 0 1
device=INPUT
T 76150 39500 5 10 1 1 180 1 1
refdes=SCLK
}
C 66100 38900 1 0 0 input-1.sym
{
T 66100 39200 5 10 0 0 0 0 1
device=INPUT
T 66150 39000 5 10 1 1 0 1 1
refdes=IN3
}
C 66100 38700 1 0 0 input-1.sym
{
T 66100 39000 5 10 0 0 0 0 1
device=INPUT
T 66150 38800 5 10 1 1 0 1 1
refdes=IN4
}
C 66100 38500 1 0 0 input-1.sym
{
T 66100 38800 5 10 0 0 0 0 1
device=INPUT
T 66150 38600 5 10 1 1 0 1 1
refdes=IN5
}
C 66100 38300 1 0 0 input-1.sym
{
T 66100 38600 5 10 0 0 0 0 1
device=INPUT
T 66150 38400 5 10 1 1 0 1 1
refdes=IN6
}
C 66100 38100 1 0 0 input-1.sym
{
T 66100 38400 5 10 0 0 0 0 1
device=INPUT
T 66150 38200 5 10 1 1 0 1 1
refdes=IN7
}
C 74700 35900 1 180 0 input-1.sym
{
T 74700 35600 5 10 0 0 180 0 1
device=INPUT
T 74650 35800 5 10 1 1 180 1 1
refdes=DGND
}
N 75400 39500 74000 39500 4
C 76200 39300 1 180 0 input-1.sym
{
T 76200 39000 5 10 0 0 180 0 1
device=INPUT
T 76150 39200 5 10 1 1 180 1 1
refdes=nCS
}
N 75400 39200 74000 39200 4
C 76200 38700 1 180 0 input-1.sym
{
T 76200 38400 5 10 0 0 180 0 1
device=INPUT
T 76150 38600 5 10 1 1 180 1 1
refdes=DIN
}
N 75400 38600 74000 38600 4
C 65500 35800 1 270 0 vcc-1.sym
C 65500 35300 1 270 0 vss-1.sym
C 70200 36900 1 0 0 gnd-1.sym
C 69700 36900 1 0 0 gnd-1.sym
C 69200 36900 1 0 0 gnd-1.sym
C 68700 36900 1 0 0 gnd-1.sym
C 70400 40900 1 180 0 gnd-1.sym
C 69800 40900 1 180 0 gnd-1.sym
C 70100 39700 1 270 1 capacitor-1.sym
{
T 70400 40050 5 10 1 1 270 1 1
refdes=C1
T 70000 40150 5 10 1 1 90 4 1
value=10nF NP0
T 70800 39900 5 10 0 0 90 2 1
device=CAPACITOR
T 71000 39900 5 10 0 0 90 2 1
symversion=0.1
T 70100 40200 5 10 1 1 90 2 1
footprint=C0805
}
C 69500 39700 1 270 1 capacitor-1.sym
{
T 69800 40050 5 10 1 1 270 1 1
refdes=C2
T 69400 40150 5 10 1 1 90 4 1
value=10nF NP0
T 70200 39900 5 10 0 0 90 2 1
device=CAPACITOR
T 70400 39900 5 10 0 0 90 2 1
symversion=0.1
T 69500 40200 5 10 1 1 90 2 1
footprint=C0805
}
T 65400 40000 9 10 1 0 0 0 2
Channel Order was reversed
for easier routing
N 74000 38900 75400 38900 4